From 8f23ec609c671d3012e38151f4646b5f6ed578ce Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Fri, 9 Dec 2016 21:07:33 +0100 Subject: ar71xx: remove obsolete flash chip locking code Signed-off-by: Felix Fietkau --- .../patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch') diff --git a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch index 27d47dc9fb..777f7b2c88 100644 --- a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -147,7 +147,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. else --- a/arch/mips/ath79/common.c +++ b/arch/mips/ath79/common.c -@@ -104,6 +104,8 @@ void ath79_device_reset_set(u32 mask) +@@ -103,6 +103,8 @@ void ath79_device_reset_set(u32 mask) reg = AR933X_RESET_REG_RESET_MODULE; else if (soc_is_ar934x()) reg = AR934X_RESET_REG_RESET_MODULE; @@ -156,7 +156,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. else if (soc_is_qca955x()) reg = QCA955X_RESET_REG_RESET_MODULE; else -@@ -132,6 +134,8 @@ void ath79_device_reset_clear(u32 mask) +@@ -131,6 +133,8 @@ void ath79_device_reset_clear(u32 mask) reg = AR933X_RESET_REG_RESET_MODULE; else if (soc_is_ar934x()) reg = AR934X_RESET_REG_RESET_MODULE; -- cgit v1.2.3