From d14aa199048cafa258dbe6a7b31cf8b5422b0272 Mon Sep 17 00:00:00 2001 From: Koen Vandeputte Date: Wed, 18 Sep 2019 15:04:48 +0200 Subject: kernel: bump 4.14 to 4.14.144 Refreshed all patches. Altered patches: - 816-pcie-support-layerscape.patch Fixes: - CVE-2019-15030 Compile-tested on: ar71xx, cns3xxx, imx6, x86_64 Runtime-tested on: ar71xx, cns3xxx, imx6 Signed-off-by: Koen Vandeputte --- ...-MIPS-ath79-Fix-potentially-missed-IRQ-handling-durin.patch | 7 +------ .../620-MIPS-ath79-add-support-for-QCA953x-SoC.patch | 8 ++++---- .../621-MIPS-ath79-add-support-for-QCA956x-SoC.patch | 6 +++--- .../patches-4.14/630-MIPS-ath79-fix-chained-irq-disable.patch | 10 +++++----- .../ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch | 4 ++-- 5 files changed, 15 insertions(+), 20 deletions(-) (limited to 'target/linux/ar71xx/patches-4.14') diff --git a/target/linux/ar71xx/patches-4.14/343-MIPS-ath79-Fix-potentially-missed-IRQ-handling-durin.patch b/target/linux/ar71xx/patches-4.14/343-MIPS-ath79-Fix-potentially-missed-IRQ-handling-durin.patch index b1389bc28d..05a1d7ef0c 100644 --- a/target/linux/ar71xx/patches-4.14/343-MIPS-ath79-Fix-potentially-missed-IRQ-handling-durin.patch +++ b/target/linux/ar71xx/patches-4.14/343-MIPS-ath79-Fix-potentially-missed-IRQ-handling-durin.patch @@ -23,11 +23,9 @@ CC: stable@vger.kernel.org # v3.2+ arch/mips/ath79/irq.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) -diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c -index 2dfff1f19004..a03a6bcaf6fd 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c -@@ -32,15 +32,21 @@ static void ar934x_ip2_irq_dispatch(struct irq_desc *desc) +@@ -32,15 +32,21 @@ static void ar934x_ip2_irq_dispatch(stru u32 status; status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS); @@ -52,6 +50,3 @@ index 2dfff1f19004..a03a6bcaf6fd 100644 } } --- -2.17.1 - diff --git a/target/linux/ar71xx/patches-4.14/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.14/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch index 4381cb8faf..722d127ec5 100644 --- a/target/linux/ar71xx/patches-4.14/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ b/target/linux/ar71xx/patches-4.14/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -307,7 +307,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. return; --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c -@@ -56,6 +56,34 @@ static void ar934x_ip2_irq_init(void) +@@ -62,6 +62,34 @@ static void ar934x_ip2_irq_init(void) irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); } @@ -342,7 +342,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. static void qca955x_ip2_irq_dispatch(struct irq_desc *desc) { u32 status; -@@ -143,7 +171,7 @@ void __init arch_init_irq(void) +@@ -149,7 +177,7 @@ void __init arch_init_irq(void) soc_is_ar913x() || soc_is_ar933x()) { irq_wb_chan2 = 3; irq_wb_chan3 = 2; @@ -351,7 +351,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. irq_wb_chan3 = 2; } -@@ -154,6 +182,7 @@ void __init arch_init_irq(void) +@@ -160,6 +188,7 @@ void __init arch_init_irq(void) else if (soc_is_ar724x() || soc_is_ar933x() || soc_is_ar934x() || @@ -359,7 +359,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. soc_is_qca955x()) misc_is_ar71xx = false; else -@@ -164,6 +193,8 @@ void __init arch_init_irq(void) +@@ -170,6 +199,8 @@ void __init arch_init_irq(void) if (soc_is_ar934x()) ar934x_ip2_irq_init(); diff --git a/target/linux/ar71xx/patches-4.14/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.14/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch index 3d79463545..670f7bef0a 100644 --- a/target/linux/ar71xx/patches-4.14/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch +++ b/target/linux/ar71xx/patches-4.14/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch @@ -291,7 +291,7 @@ return; --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c -@@ -156,6 +156,87 @@ static void qca955x_irq_init(void) +@@ -162,6 +162,87 @@ static void qca955x_irq_init(void) irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); } @@ -379,7 +379,7 @@ void __init arch_init_irq(void) { unsigned irq_wb_chan2 = -1; -@@ -183,7 +264,9 @@ void __init arch_init_irq(void) +@@ -189,7 +270,9 @@ void __init arch_init_irq(void) soc_is_ar933x() || soc_is_ar934x() || soc_is_qca953x() || @@ -390,7 +390,7 @@ misc_is_ar71xx = false; else BUG(); -@@ -197,4 +280,6 @@ void __init arch_init_irq(void) +@@ -203,4 +286,6 @@ void __init arch_init_irq(void) qca953x_irq_init(); else if (soc_is_qca955x()) qca955x_irq_init(); diff --git a/target/linux/ar71xx/patches-4.14/630-MIPS-ath79-fix-chained-irq-disable.patch b/target/linux/ar71xx/patches-4.14/630-MIPS-ath79-fix-chained-irq-disable.patch index 2b92b88d03..a74eb4f43e 100644 --- a/target/linux/ar71xx/patches-4.14/630-MIPS-ath79-fix-chained-irq-disable.patch +++ b/target/linux/ar71xx/patches-4.14/630-MIPS-ath79-fix-chained-irq-disable.patch @@ -10,7 +10,7 @@ static void ar934x_ip2_irq_dispatch(struct irq_desc *desc) { u32 status; -@@ -50,8 +53,7 @@ static void ar934x_ip2_irq_init(void) +@@ -56,8 +59,7 @@ static void ar934x_ip2_irq_init(void) for (i = ATH79_IP2_IRQ_BASE; i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) @@ -20,7 +20,7 @@ irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); } -@@ -79,7 +81,7 @@ static void qca953x_irq_init(void) +@@ -85,7 +87,7 @@ static void qca953x_irq_init(void) for (i = ATH79_IP2_IRQ_BASE; i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) @@ -29,7 +29,7 @@ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch); } -@@ -143,15 +145,13 @@ static void qca955x_irq_init(void) +@@ -149,15 +151,13 @@ static void qca955x_irq_init(void) for (i = ATH79_IP2_IRQ_BASE; i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) @@ -47,7 +47,7 @@ irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); } -@@ -222,13 +222,13 @@ static void qca956x_irq_init(void) +@@ -228,13 +228,13 @@ static void qca956x_irq_init(void) for (i = ATH79_IP2_IRQ_BASE; i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) @@ -63,7 +63,7 @@ irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch); -@@ -237,12 +237,40 @@ static void qca956x_irq_init(void) +@@ -243,12 +243,40 @@ static void qca956x_irq_init(void) late_time_init = &qca956x_enable_timer_cb; } diff --git a/target/linux/ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch b/target/linux/ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch index ef22edb319..16d17b8a0e 100644 --- a/target/linux/ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch +++ b/target/linux/ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch @@ -11,7 +11,7 @@ ath79_ddr_pci_win_base = ath79_ddr_base + 0x7c; --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c -@@ -99,12 +99,12 @@ static void qca955x_ip2_irq_dispatch(str +@@ -105,12 +105,12 @@ static void qca955x_ip2_irq_dispatch(str } if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) { @@ -26,7 +26,7 @@ generic_handle_irq(ATH79_IP2_IRQ(1)); } } -@@ -124,17 +124,17 @@ static void qca955x_ip3_irq_dispatch(str +@@ -130,17 +130,17 @@ static void qca955x_ip3_irq_dispatch(str } if (status & QCA955X_EXT_INT_USB1) { -- cgit v1.2.3