From c83bdd094ec4722b35811bd64781d8aacddb2344 Mon Sep 17 00:00:00 2001 From: Piotr Dymacz Date: Mon, 23 Oct 2017 13:30:20 +0200 Subject: ar71xx: add support for Wallys DR342 Wallys DR342 is a 5 GHz, 2T2R AP/CPE board based on Atheros AR9342. Short specification: - 560/450/225 MHz (CPU/DDR/AHB) - 1x Gbps Ethernet (AR8035) with passive PoE support (24-56 V) - 64 MB of RAM (DDR2) - 16 MB of FLASH - 2T2R 5 GHz with external FEM (SKY85728-11), up to 30 dBm - 2x MMCX connectors - miniPCIe connector with PCIe and USB 2.0 buses - optional miniSIM slot - 7x LED, 1x button - UART, (E)JTAG and LED headers - 1x DC jack for main power (12-56 V) Flash instruction (do it under U-Boot, using UART): 1. tftp 0x82000000 lede-ar71xx-generic-dr342-squashfs-sysupgrade.bin 2. erase 0x9f050000 +$filesize 3. cp.b $fileaddr 0x9f050000 $filesize 4. setenv bootcmd "bootm 0x9f050000" 5. saveenv && reset Signed-off-by: Piotr Dymacz --- target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt') diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index 8facdd2b74..453893a62e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -638,9 +638,21 @@ config ATH79_MACH_DOMYWIFI_DW33D select ATH79_DEV_WMAC select ATH79_DEV_USB +config ATH79_MACH_DR342 + bool "Wallys DR342 board support" + select SOC_AR934X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_DR344 bool "Wallys DR344 board support" select SOC_AR934X + select ATH79_DEV_AP9X_PCI if PCI select ATH79_DEV_ETH select ATH79_DEV_GPIO_BUTTONS select ATH79_DEV_LEDS_GPIO -- cgit v1.2.3