From 4db7fa1c06f3c3681e6ae8aad75e4a1997445023 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Wed, 11 Jul 2007 13:00:27 +0000 Subject: refactor kernel code (part 1), mark it as broken now SVN-Revision: 7916 --- .../include/asm-mips/mach-adm5120/adm5120_uart.h | 75 ++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100755 target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_uart.h (limited to 'target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_uart.h') diff --git a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_uart.h b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_uart.h new file mode 100755 index 0000000000..54aacffa78 --- /dev/null +++ b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_uart.h @@ -0,0 +1,75 @@ +/* + * ADM5120 UART definitions + * + * This header file defines the hardware registers of the ADM5120 SoC + * built-in UARTs. + * + * Copyright (C) 2007 OpenWrt.org + * Copyright (C) 2007 Gabor Juhos + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the + * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + */ + +#ifndef _ADM5120_UART_H_ +#define _ADM5120_UART_H_ + +#define UART_BAUDDIV(clk, baud) ((clk/(16 * (baud)))-1) + +#define UART_REG_DATA 0x00 +#define UART_REG_RSR 0x04 +#define UART_REG_ECR UART_REG_RSR +#define UART_REG_LCRH 0x08 +#define UART_REG_LCRM 0x0C +#define UART_REG_LCRL 0x10 +#define UART_REG_CTRL 0x14 +#define UART_REG_FLAG 0x18 + +/* Receive Status Register bits */ +#define UART_RSR_FE ( 1 << 0 ) +#define UART_RSR_PE ( 1 << 1 ) +#define UART_RSR_BE ( 1 << 2 ) +#define UART_RSR_OE ( 1 << 3 ) +#define UART_RSR_ERR ( UART_RSR_FE | UART_RSR_PE | UART_RSR_BE ) + +#define UART_ECR_ALL 0xFF + +/* Line Control High register bits */ +#define UART_LCRH_BRK ( 1 << 0 ) /* send break */ +#define UART_LCRH_PEN ( 1 << 1 ) /* parity enable */ +#define UART_LCRH_EPS ( 1 << 2 ) /* even parity select */ +#define UART_LCRH_STP1 ( 0 << 3 ) /* one stop bits select */ +#define UART_LCRH_STP2 ( 1 << 3 ) /* two stop bits select */ +#define UART_LCRH_FEN ( 1 << 4 ) /* FIFO enable */ + +#define UART_LCRH_WLEN5 ( 0 << 5 ) +#define UART_LCRH_WLEN6 ( 1 << 5 ) +#define UART_LCRH_WLEN7 ( 2 << 5 ) +#define UART_LCRH_WLEN8 ( 3 << 5 ) + +/* Control register bits */ +#define UART_CTRL_EN ( 1 << 0 ) + +/* Flag register bits */ +#define UART_FLAG_CTS ( 1 << 0 ) +#define UART_FLAG_DSR ( 1 << 1 ) +#define UART_FLAG_DCD ( 1 << 2 ) +#define UART_FLAG_BUSY ( 1 << 3 ) +#define UART_FLAG_RXFE ( 1 << 4 ) +#define UART_FLAG_TXFF ( 1 << 5 ) +#define UART_FLAG_RXFF ( 1 << 6 ) +#define UART_FLAG_TXFE ( 1 << 7 ) + +#endif /* _ADM5120_UART_H_ */ -- cgit v1.2.3