From d5fc7430ca293213dd4f1de7f52446c17d4def6a Mon Sep 17 00:00:00 2001 From: Yutang Jiang Date: Thu, 1 Dec 2016 23:01:27 +0800 Subject: layerscape: uboot-layerscape: prefer github over git.freescale.com In order to prevent the impact of the merger of the company and the potential rebase of the SDK repositories, migrate the u-boot source to github. Signed-off-by: Yutang Jiang --- ...mv8-ls1012a-Added-CSU-assignment-for-USB2.patch | 37 ---------------------- 1 file changed, 37 deletions(-) delete mode 100644 package/boot/uboot-layerscape/patches/0029-armv8-ls1012a-Added-CSU-assignment-for-USB2.patch (limited to 'package/boot/uboot-layerscape/patches/0029-armv8-ls1012a-Added-CSU-assignment-for-USB2.patch') diff --git a/package/boot/uboot-layerscape/patches/0029-armv8-ls1012a-Added-CSU-assignment-for-USB2.patch b/package/boot/uboot-layerscape/patches/0029-armv8-ls1012a-Added-CSU-assignment-for-USB2.patch deleted file mode 100644 index 228e762002..0000000000 --- a/package/boot/uboot-layerscape/patches/0029-armv8-ls1012a-Added-CSU-assignment-for-USB2.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 57700b94f9111578d0fc05bb8f273c0b29951572 Mon Sep 17 00:00:00 2001 -From: Rajesh Bhagat -Date: Wed, 11 May 2016 14:59:39 +0530 -Subject: [PATCH 29/93] armv8: ls1012a: Added CSU assignment for USB2 - -Access settings for USB2 IP is added through CSU register. - -Added CSU ID for USB2, reg: CSL23_REG[8:0] - -Signed-off-by: Rajesh Bhagat ---- - .../include/asm/arch-fsl-layerscape/ns_access.h | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h -index d6642a7..2fd33e1 100644 ---- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h -+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h -@@ -38,6 +38,7 @@ enum csu_cslx_ind { - CSU_CSLX_ESDHC, - CSU_CSLX_IFC = 45, - CSU_CSLX_I2C1, -+ CSU_CSLX_USB_2, - CSU_CSLX_I2C3 = 48, - CSU_CSLX_I2C2, - CSU_CSLX_DUART2 = 50, -@@ -117,6 +118,7 @@ static struct csu_ns_dev ns_dev[] = { - {CSU_CSLX_ESDHC, CSU_ALL_RW}, - {CSU_CSLX_IFC, CSU_ALL_RW}, - {CSU_CSLX_I2C1, CSU_ALL_RW}, -+ {CSU_CSLX_USB_2, CSU_ALL_RW}, - {CSU_CSLX_I2C3, CSU_ALL_RW}, - {CSU_CSLX_I2C2, CSU_ALL_RW}, - {CSU_CSLX_DUART2, CSU_ALL_RW}, --- -1.7.9.5 - -- cgit v1.2.3