aboutsummaryrefslogtreecommitdiffstats
path: root/target
Commit message (Collapse)AuthorAgeFilesLines
* mvebu: sysupgrade: sdcard: keep user added partitonsTomasz Maciej Nowak2019-04-065-11/+83
| | | | | | | | Currently sysupgrade overwrites whole disk and destroys partitions added by user. Sync the sysupgrade code with the one present in x86 target to remedy this behaviour. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* mvebu: base-files: autodetect upgrade deviceTomasz Maciej Nowak2019-04-062-10/+18
| | | | | | | Since some boards could be also booted from other mediums than SD card, lets make the upgrade block device autodetected. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* mvebu: shrink amount of packages and reorganize themTomasz Maciej Nowak2019-04-066-11/+15
| | | | | | | | | Since most of devices using SD card image to boot, use ext4 as boot files system we can drop fat fs related packages. Also move packages which are added repeatedly across subtargets to their default packages, with droping the ones that are enabled in target kernel configugation. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* mvebu: use ext4 for clearfog image bootfsTomasz Maciej Nowak2019-04-061-2/+2
| | | | | | | This will allow to drop additional packages and shrink image size. Cc: Jonas Gorski <jonas.gorski@gmail.com> Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* mvebu: make bootfs size for sdcard image configurableTomasz Maciej Nowak2019-04-062-11/+7
| | | | | | | Let's take this oportunity to implement boot-part and rootfs-part feature flags. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* zynq: replace storage related configs by packagesLuis Araneda2019-04-062-10/+3
| | | | | | | Select build-in packages by default and remove the associated kernel configs Signed-off-by: Luis Araneda <luaraneda@gmail.com>
* zynq: replace CAN kconfig options by device packagesLuis Araneda2019-04-062-21/+1
| | | | | | | | | | The options are managed on a generic way by the can kmod packages Additionally, select can packages only for devices that currently has CAN enabled, which is only the ZC702 Signed-off-by: Luis Araneda <luaraneda@gmail.com>
* zynq: kernel: remove video/camera kconfig optionsLuis Araneda2019-04-061-12/+0
| | | | | | | | | | The options are managed on a generic way by video packages Additionally, only one of the currently supported boards has a camera interface, but it requires programming the FPGA fabric first Signed-off-by: Luis Araneda <luaraneda@gmail.com>
* zynq: kernel: remove sound kconfig optionsLuis Araneda2019-04-061-19/+0
| | | | | | | | | | | The options are managed on a generic way by the sound kmod packages Additionally, none of the currently supported boards have sound support out of the box, as they require programming the FPGA fabric first Signed-off-by: Luis Araneda <luaraneda@gmail.com>
* zynq: kernel: refresh configLuis Araneda2019-04-061-14/+2
| | | | Signed-off-by: Luis Araneda <luaraneda@gmail.com>
* tegra: add kernel 4.19 supportTomasz Maciej Nowak2019-04-064-0/+682
| | | | Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* tegra: add support for CompuLab TrimSliceTomasz Maciej Nowak2019-04-063-1/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is a small form factor computer with rich amount of expansion ports. Some hardware specs and supported features in this commit: CPU: NVIDIA Tegra 2 @ 1GHz RAM: 1GB DDR2-667 Storage: SDHC card slot µSDHC card slot USB to SATA bridge (depends on model) 1MB SPI NOR flash for bootloader (single partition) LAN: RTL8111DL GbE WIFI: RT3070 b/g/n with external antenna (depends on model) RTC: EM3027 (mapped as rtc0; with battery backup) Tegra 2 built-in (mapped as rtc1) Sound: Analog/Digital (TLV320AIC23b; S/PDIF not tested) Connectors: 4x USB 2.0 RS232 (mini serial) HDMI DVI-D (depends on model, not supported atm) Extension connector (24 pin ZIF, 0.5mm pitch): 2X UART SPI JTAG (1.8V) Other: power button with green led (not functional for early revisions without programmed PMIC) 2x GPIO configurable green led TrimSlice uses U-Boot placed in NOR flash. Boots Linux from any media connected to USB, SATA or SD card inserted in slot. Can also boot from TFTP. To run OpenWrt one needs to update U-Boot to fairly recent version (the versions, pre-dts/dts provided by CompuLab won't suffice): 1. Boot TrimSlice into Your current linux distro, 2. Download trimslice-spi.img from u-boot-trimslice subdir, 3. Install mtd-utils, 4. Run following commands: flash_erase /dev/mtd0 0 256 nandwrite /dev/mtd0 trimslice-spi.img 5. Poweroff, insert SD card with OpenWrt, boot and enjoy. If by some obstacle You can't follow those instructions, it is possible to flash U-Boot using serial console. 1. Insert FAT or EXT2/EXT3 formatted SD card with trimslice-spi.img, 2. Interrupt boot process to enter U-Boot command line, 3. Run following commands: ${fs}load mmc 0 0x04080000 trimslice-spi.img sf probe 0 sf erase 0 0x100000 sf write 0x04080000 0x0 ${filesize} reset 4. Poweroff, insert SD card with OpenWrt, boot and enjoy. If something went wrong with one of above steps, there is simple recovery option: 1. Open the µSD slot security door to access the recovery-boot button, 2. Insert SD card with OpenWrt to the front slot while unpowered, 3. Power on the TrimSlice while pressing the recovery-boot button, 4. With this it should boot straigth to OpenWrt, from there download trimslice-spi.img and execute following commands: mtd erase /dev/mtd0 mtd write trimslice-spi.img /dev/mtd0 5. Reboot, now it should boot straigth to OpenWrt, without pressing the recovery-boot button, with proper U-Boot flashed. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* uboot-tegra: add U-Boot for tegra boardsTomasz Maciej Nowak2019-04-062-1/+5
| | | | | | | Add U-Boot for NVIDIA Tegra based boards, with the first being CompuLab TrimSlice. This is part of initial support for this board. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* tegra: add new targetTomasz Maciej Nowak2019-04-069-0/+846
| | | | | | | | | | New target introduces initial support for NVIDIA Tegra SoC based devices. It focuses on Tegra 2 CPUs, for successors supporting NEON instruction set the target should be split in two subtargets. This initial commit doesn't create any device image, it's groundwork for further additions. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
* kernel: b53: add support for kernels 5.0+Rafał Miłecki2019-04-041-0/+10
| | | | | | | | It adjusts b53 code to upstream changes from the commit 3c1bcc8614db ("net: ethernet: Convert phydev advertize and supported from u32 to link mode"). Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* kernel: backport upstream ubifs default compression selection fixRafał Miłecki2019-04-042-1/+10
| | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* kernel: fix rtcache compilation with 4.18+ with IPv6 supportRafał Miłecki2019-04-041-2/+2
| | | | | | | | | | | | | | | | | | | | Please note that modified code isn't currently being compiled with kernels 4.19+ due to the dropped CONFIG_NF_CONNTRACK_IPV6 in upstream Linux. That requires a separated fix. This fixes: net/netfilter/nf_conntrack_rtcache.c: In function 'nf_rtcache_get_cookie': net/netfilter/nf_conntrack_rtcache.c:82:11: error: 'const struct rt6_info' has no member named 'rt6i_node'; did you mean 'rt6i_idev'? if (rt->rt6i_node) ^~~~~~~~~ rt6i_idev IPv6 structs were reworked in upstream kernel by: commit a64efe142f5e ("net/ipv6: introduce fib6_info struct and helpers") commit 77634cc67dc1 ("net/ipv6: Remove unused code and variables for rt6_info") commit 93c2fb253d17 ("net/ipv6: Rename fib6_info struct elements") Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* ramips: implement vlan rx offload on MT7621Felix Fietkau2019-04-033-4/+11
| | | | | | Avoids the overhead of software VLAN untagging in the network stack Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ath79: Add support for TP-Link CPE210 v2Adrian Schmutzler2019-04-024-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This PR adds support for a popular low-cost 2.4GHz N based AP Specifications: - SoC: Qualcomm Atheros QCA9533 (650MHz) - RAM: 64MB - Storage: 8 MB SPI NOR - Wireless: 2.4GHz N based built into SoC 2x2 - Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN Installation: Flash factory image through stock firmware WEB UI or through TFTP To get to TFTP recovery just hold reset button while powering on for around 4-5 seconds and release. Rename factory image to recovery.bin Stock TFTP server IP:192.168.0.100 Stock device TFTP adress:192.168.0.254 This is based on the support patch for the identical CPE210 v3 by Mario Schroen <m.schroen@web.de>. Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> [renamed dtsi filename] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: Add support for TP-Link CPE210 v3Mario Schroen2019-04-025-0/+156
| | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: * SoC: Qualcomm Atheros QCA9533 (650MHz) * RAM: 64MB * Storage: 8 MB SPI NOR * Wireless: 2.4GHz N based built into SoC 2x2 * Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN Installation: Flash factory image through stock firmware WEB UI or TFTP To get to TFTP recovery just hold reset button while powering on for around 4-5 seconds and release. Rename factory image to recovery.bin Stock TFTP server IP:192.168.0.100 Stock device TFTP adress:192.168.0.254 Thanks to robimarko for the work inside the ar71xx tree. Thanks to adrianschmutzler for deep discussion and fixes. Signed-off-by: Mario Schroen <m.schroen@web.de> [Split into DTS/DTSI, read-only config partition in DTSI] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> [renamed dtsi filename, light subject touches] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ar71xx: Add support for TP-Link CPE210 v3Robert Marko2019-04-027-2/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Looks identical to the v2. This PR adds support for a popular low-cost 2.4GHz N based AP Specifications: - SoC: Qualcomm Atheros QCA9533 (650MHz) - RAM: 64MB - Storage: 8 MB SPI NOR - Wireless: 2.4GHz N based built into SoC 2x2 - Ethernet: 1x 100/10 Mbps, integrated into SoC, 24V POE IN Installation: Flash factory image through stock firmware WEB UI or through TFTP To get to TFTP recovery just hold reset button while powering on for around 4-5 seconds and release. Rename factory image to recovery.bin Stock TFTP server IP:192.168.0.100 Stock device TFTP adress:192.168.0.254 Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Signed-off-by: Robert Marko <robimarko@gmail.com> [Rebased, adjusted for separate tplink-safeloader entry, dynamic partitioning] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx: Use dynamic partitions for TP-Link CPE210 v2Adrian Schmutzler2019-04-021-1/+3
| | | | | | | This is also helpful to add support in ath79. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ar71xx: ens202ext: Fix whitespace issuesPetr Štetiar2019-04-011-4/+4
| | | | | | | | I've missed leading whitespace issues in the original patch, so fixing it in this commit. Thanks to pepe2k for letting me know. Fixes: d260813d ("ar71xx: ens202ext: Fix VLAN switch") Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: add missing SPDX identifier for EX6150David Bauer2019-03-311-0/+1
| | | | | | | This adds the SPDX license identifier for the NETGEAR EX6150. It was missed when submitting the original patch. Signed-off-by: David Bauer <mail@david-bauer.net>
* ar71xx: ens202ext: Fix VLAN switchMichael Pratt2019-03-311-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The target ENS202EXT was just recently added right before the stable release of Openwrt 18. It flashes fine, but the physical switch is almost impossible to use until you have a VLAN set up. Tested on two devices. The actual problem is that eth0 represents nothing for whatever reason. In other words, both WAN and LAN are running from eth1. There may be an underlying problem in the build, but for now, I assume that this is correct and that a VLAN switch is an appropriate fix. Also, it's virtually impossible to get the switch running right through LuCI. It is one thing to get a switch to appear, but attempting to configure it breaks the whole thing. The VLAN has to be set up perfectly, otherwise, interfaces will not start up, and one is forced to reset settings, OR, the new LuCI feature kicks in and reverses any steps. It is extremely difficult to determine which virtual ports correspond to which physical ethernet ports without being able to set up the switch in LuCI. Temporary Workaround: followed directions here [openwrt/luci#867](https://github.com/openwrt/luci/issues/867) Reviewed-by: Marty Plummer <hanetzer@startmail.com> Signed-off-by: Michael Pratt <mpratt51@gmail.com> [commit author fix, subject fix, message text wrap] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: Increase GB-PC1 SPI frequency to 80MHzRosen Penev2019-03-291-1/+2
| | | | | | | | | | | | | | | | | | | | The specific flash chip used (W25Q256FVEM) accepts 50MHz for read requests and higher for others. 104MHz for fast reads. ramips seems to be limited to 80MHz based on testing with higher values (no speedup). Based on upstream commit: 97738374a310b9116f9c33832737e517226d3722 time dd if=/dev/mtdblock3 of=/dev/null bs=64k from 42.96s to 7.01s [test done with backported upstream v4.19 driver[1], for numbers on stock 4.14 driver please take a look at `ramips: Increase GB-PC2 SPI frequency to 80MHz` commit message] 1. https://github.com/openwrt/openwrt/pull/1578 Signed-off-by: Rosen Penev <rosenp@gmail.com> [expanded note about spi driver version] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: Increase GB-PC2 SPI frequency to 80MHzRosen Penev2019-03-291-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The flash chip on the board (Spansion S25FL256SAIF00) is rated to support at least 50MHz for normal read requests according to the datasheet. 133MHz for fast reads. However, ramips seems to be limited to 80MHz. >From testing this, higher values do not improve speeds. time dd if=/dev/mtdblock3 of=/dev/null bs=64k from 42.82s to 14.09s. boot speed is also faster: [ 66.884087] procd: - init - vs [ 48.976049] procd: - init - Since spi speed was requested: [ 3.538884] spi-mt7621 1e000b00.spi: sys_freq: 225000000 CPU is 900MHz: [ 0.000000] CPU Clock: 900MHz Signed-off-by: Rosen Penev <rosenp@gmail.com> [fixed commit message by adding missing 0 in the spi-mt7621 clock output] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: add Netgear EX6150David Bauer2019-03-293-0/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SoC: MediaTek MT7621 RAM: 64M (Winbond W9751G6KB-25) FLASH: 16MB (Macronix MX25L12835F) WiFi: MediaTek MT7662E bgn 2SS WiFi: MediaTek MT7662E nac 2SS BTN: ON/OFF - Reset - WPS - AP/Extender toggle LED: - Arrow Right (blue) - Arrow Left (blue) - WiFi 1 (red/green) - WiFi 2 (red/green) - Power (green/amber) - WPS (Green) UART: UART is present as Pads on the backside of the PCB. They are located on the other side of the Ethernet port. 3.3V - GND - TX - RX / 57600-8N1 3.3V is the nearest one to the antenna connectors Installation ------------ Update the factory image via the Netgear web-interfaces (by default: 192.168.1.250/24). You can also use the factory image with the nmrpflash tool. For more information see https://github.com/jclehner/nmrpflash Signed-off-by: David Bauer <mail@david-bauer.net> [merge conflict in 02_network, flash@0 node rename, wlan DTS triggers] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: add support for ZyXEL Keenetic StartVladimir Kot2019-03-294-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | Device specification: - SoC: RT5350F - CPU Frequency: 360 MHz - Flash Chip: Winbond 25Q32 (4096 KiB) - RAM: 32768 KiB - 5x 10/100 Mbps Ethernet (4x LAN, 1x WAN) - 1x external, non-detachable antenna - UART (J1) header on PCB (57800 8n1) - Wireless: SoC-intergated: 2.4GHz 802.11bgn - USB: None - 3x LED, 2x button Flash instruction: 1. Configure PC with static IP 192.168.1.2/24 and start TFTP server. 2. Rename "openwrt-ramips-rt305x-kn_st-squashfs-sysupgrade.bin" to "kstart_recovery.bin" and place it in TFTP server directory. 3. Connect PC with one of LAN ports, press the reset button, power up the router and keep button pressed until power LED start blinking. 4. Router will download file from TFTP server, write it to flash and reboot. Signed-off-by: Vladimir Kot <vova28rus@gmail.com> [fixed git commit author and whitespace issues in DTS] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: add support for WIZnet WizFi630S boardTobias Welz2019-03-293-0/+204
| | | | | | | | | | | | | | | | | | | | The WIZnet WizFi630S board is in the miniPCIe form factor. SoC: Mediatek MT7688AN RAM: 128MB Flash: 32Mb WiFi: 2.4GHz Ethernet: 3x 100Mbit USB: 1 (USB 2.0) serial ports: 2 (1x full, 1xlite) Flash and recovery instructions: Use the factory installed u-boot boot loader. It is available on UART2 (115200,8,n,1). Then get the sysupgrade image from a tftp server. Signed-off-by: Tobias Welz <tw@wiznet.eu> [whitespace and device name in makefile fixes] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* kernel: bump 4.14 to 4.14.108Koen Vandeputte2019-03-279-23/+24
| | | | | | | | | | | | Refreshed all patches. Altered patches: - 950-0033-i2c-bcm2835-Add-debug-support.patch Compile-tested on: ar71xx, cns3xxx, imx6, x86_64 Runtime-tested on: ar71xx, cns3xxx, imx6 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* kernel: bump 4.9 to 4.9.165Koen Vandeputte2019-03-271-1/+1
| | | | | | | | | Refreshed all patches. Compile-tested on: ar7 Runtime-tested on: none Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx: add support for MikroTik RouterBOARD 922UAGS-5HPacDKoen Vandeputte2019-03-266-29/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the MikroTik RouterBOARD 922UAGS-5HPacD with a built-in 802.11ac High-Power radio (31dBm). See https://mikrotik.com/product/RB922UAGS-5HPacD for more info. Specifications: - SoC: Qualcomm Atheros QCA9557 (720 MHz) - RAM: 128 MB - Storage: 128 MB NAND - Wireless: external QCA9882 802.11a/ac 2x2:2 - Ethernet: 1x 1000/100/10 Mbps, integrated, via AR8031 PHY, passive PoE-in 24V - SFP: 1x host - USB: 1x 2.0 type A - PCIe: 1x Mini slot (also contains USB 2.0 for 3G/LTE modems) - SIM slot: 1x mini-SIM Working: - Board/system detection - NAND storage detection - PCIe - USB: Type A & mini PCIe - Wireless - Ethernet - LED's (excl. SFP and RSSI levels) - Reset button - Sysupgrade Not working: - SFP cage Installation: - Boot vmlinux-initramfs image via BOOTP/TFTP and then flash sysupgrade image using "sysupgrade -n" Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
* mvebu: Add dependency to kmod-i2c-mux-pca954x for armada-macchiatobinHauke Mehrtens2019-03-261-1/+1
| | | | | | This driver is needed for the I2C mux on the board. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@intel.com>
* mvebu: Refresh kernel configurationHauke Mehrtens2019-03-263-12/+16
| | | | | | | | | | | | | | | | | This refreshes the current kernel configuration to remove unneeded options, add some automatically added ones and reorders them. The normal build did this automatically, so the builds already used this configuration. CONFIG_HW_RANDOM_OMAP is explicitly activated for the cortexa72 subtarget because it has an inside-secure,safexcel-eip76 IP core. This was done with this command on the cortexa9 subtarget: make kernel_oldconfig and this one on the other subtargets: make kernel_oldconfig CONFIG_TARGET=subtarget Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* mvebu: Fix typo in MACCHIATOBin detectionHauke Mehrtens2019-03-251-1/+1
| | | | | | The name in the device tree file is written with two C. Signed-off-by: Hauke Mehrtens <hauke.mehrtens@intel.com>
* gemini: Classify Raidsonic NAS IB-4220-B as a NASChristian Lamparter2019-03-251-0/+1
| | | | Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* gemini: D-Link DNS-313 is a NASChristian Lamparter2019-03-251-0/+1
| | | | Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* apm821xx: MBL: set DEVICE_TYPE to NASChristian Lamparter2019-03-251-0/+1
| | | | | | The MyBook Live is a NAS. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: essedma: Add fix for memory allocation issuesChristian Lamparter2019-03-242-0/+394
| | | | | | | | | | | | | This patch adds a ChromiumOS 3.18 patch [0] that fixes memory allocation issues under memory pressure by keeping track of missed allocs and rectify the omission at a later date. It also adds ethtool counters for memory allocation failures accounting so this can be verified. [0] <https://chromium.googlesource.com/chromiumos/third_party/kernel/+/d4e1e4ce6801f9eddce056c58f5a288864955265> Reported-by: Chen Minqiang <ptpt52@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ramips: allow packets with ttl=0Felix Fietkau2019-03-241-2/+2
| | | | | | | Some broken ISPs (e.g. Comcast) send DHCPv6 packets with hop limit=0. This trips up the TTL=0 check in the PPE if enabled. Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ath79: add support for COMFAST CF-E5/E7Ding Tengfei2019-03-245-10/+175
| | | | | | | | | | | | | | | | | | | | | | | | COMFAST CF-E5/E7 is a outdoor 4G LTE AP with PoE support, based on Qualcomm/Atheros QCA9531. Short specification: 2x 10/100 Mbps Ethernet, with 24v PoE support 64 MB of RAM (DDR2) 16 MB of FLASH (SPI) 2T2R 2.4 GHz, 802.11b/g/n built-in 1x 3 dBi antennas output power (max): 80 mW (19 dBm) Qucetel EC20 LTE MODULE(1x external detachable antenna) Flash instruction: Original firmware is based on OpenWrt. Use sysupgrade image directly in vendor GUI. Signed-off-by: Ding Tengfei <dtf@comfast.cn> [commit subject fix] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: add TP-Link TL-WR710N v1Marcin Jurkowski2019-03-244-0/+149
| | | | | | | | | | | | | | | | | | | | | This commit adds support for TP-Link TL-WR710N v1 router. CPU: Atheros AR9331 400MHz RAM: 32MB FLASH: 8MiB PORTS: 1 Port 100/10 LAN (connected to a switch), 1 Port 100/10 WAN WiFi: Atheros AR9331 1x2:1 bgn USB: ChipIdea HDRC USB2.0 LED: SYS BTN: Reset Sysupgrade from `ar71xx` works without glitches. Network interfaces assigned for LAN and WAN ports are `eth1` and `eth0` respectively, what's consistent with `ar71xx` target. Wireless radio path is automatically upgraded from `platform/ar933x_wmac` to `platform/ahb/18100000.wmac`. Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
* ath79: add support for TP-Link TL-WR941N v7 (CN)Chuanhong Guo2019-03-243-2/+138
| | | | | | | | | | | | | | | | | This adds support for the Chinese version of TL-WR941N v7. It uses QCA9558+AR8236 while the international version uses TP9343 instead. Specification: - SoC: Qualcomm Atheros QCA9558 - Flash: 4 MB - RAM: 64 MB - Ethernet: Atheros AR8236 with 5 FE ports Flash instruction: Upload the generated factory firmware on web interface. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: remove switch driver in ag71xxChuanhong Guo2019-03-242-1345/+0
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: use ar8216 for builtin switchChuanhong Guo2019-03-247-10/+17
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: introduce qca,mib-poll-interval propertyChuanhong Guo2019-03-242-2/+13
| | | | | | | | This allows users to specify a shorter mib poll interval so that the swconfig leds could behave normal with current get_port_stats() implementation. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: do a software reset for switch during hw_initChuanhong Guo2019-03-241-0/+3
| | | | | | | | | | | | | | This applies to ar8216 and ar8236. QCA's newer U-boot will enable the switch mdio master for FE switches which makes phy inaccessible from CPU mdio. (e.g. on TP-Link TL-WR941N v7 Chinese version which uses QCA9558+AR8236.) For these devices PHY probing is broken and mdio device probing is a must. We also need to disable switch mdio master in driver for later PHY initialization. Do a soft reset during hw_init so that mdio master can be disabled and expose PHYs to CPU mdio for later PHY accessing. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: mib_work_func: read all port mibs everytimeChuanhong Guo2019-03-242-9/+5
| | | | | | | | ar8xxx_mib_capture will update mib counters for all ports. Current code only update one port at a time and the data for other ports are lost. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: add support for get_port_stats()Chuanhong Guo2019-03-243-25/+59
| | | | | | | | | | | | | | | | | | | | | | | Partially reverts commit eff3549c5883a9abc5dbff00c084cabbcfdf4437. AR7240 and AR9341 have buggy hardware switch LED trigger. The AR7240 one doesn't blink and the blinking of port0/port5 is reversed on AR9341 if we swap PHY0 and PHY4. (Only blinking is reversed, which means LED for PHY0 will lit when PHY0 is link up and will blink when PHY4 has active link and vice versa.) On these two chips a software swconfig LED trigger is required. This commit adds swconfig port stats back but: 1. move checking of mib_t/rxb_id into ar8xxx_chip since we can't distinguish ar7240sw and ar8216 using only chip id. 2. don't update mib counter in get_port_stat. This function is called every 0.01s and this capturing procedure will take up a lot of CPU. We already have a mib_work_func updating mib counters every 2s so return the saved counter instead of fetching new data. The blinking rate will be weird but it should solve the previously mentioned CPU time problem. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-11 16:35:36 +0000