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* mediatek: fix sysupgrade on MTK7986 rfba APDaniel Golle2022-09-061-0/+1
| | | | | | | | | A line in platform.sh was accidentally removed when adding support for the Bananapi BPi-R3. Re-add it to fix sysupgrade on the MTK7986 rfba AP. Fixes: a96382c1bb ("mediatek: add support for Bananapi BPi-R3") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ath79: move 5.15 testing kernel to common MakefileNick Hainke2022-09-065-8/+1
| | | | | | | All subtargets are using now 5.15 as testing kernel. Move KERNEL_TESTING_PATCHVER:=5.15 to the common Makefile. Signed-off-by: Nick Hainke <vincent@systemli.org>
* ath79: tiny: add 5.15 support for tiny subtargetNick Hainke2022-09-061-0/+2
| | | | | | Tested on Ubiquiti Nanostation M5 XM with low_mem. Signed-off-by: Nick Hainke <vincent@systemli.org>
* ath79: add low_mem to tiny imageNick Hainke2022-09-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices with SMALL_FLASH enabled have "SQUASHFS_BLOCK_SIZE=1024" in their config. This significantly increases the cache memory required by squashfs [0]. This commit enables low_mem leading to a much better performance because the SQUASHFS_BLOCK_SIZE is reduced to 256. Example Nanostation M5 (XM): The image size increases by 128 KiB. However, the memory statisitcs look much better: Default tiny build: ------ MemTotal: 26020 kB MemFree: 5648 kB MemAvailable: 6112 kB Buffers: 0 kB Cached: 3044 kB low_mem enabled: ----- MemTotal: 26976 kB MemFree: 6748 kB MemAvailable: 11504 kB Buffers: 0 kB Cached: 7204 kB [0] - https://github.com/freifunk-gluon/gluon/commit/7e8af99cf504ca1dc389f282a0c94f4a911571be Signed-off-by: Nick Hainke <vincent@systemli.org>
* ipq40xx: add support for Extreme Networks WS-AP3915iDavid Bauer2022-09-065-0/+296
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- Qualcomm IPQ4029 WiSoC 2T2R 802.11 abgn 2T2R 802.11 nac Macronix MX25L25635E SPI-NOR (32M) 512M DDR3 RAM 1x Gigabit LAN 1x Cisco RJ-45 Console port Settings: 115200 8N1 Installation ------------ 1. Attach to the Console port. Power up the device and press the s key to interrupt autoboot. 2. The default username / password to the bootloader is admin / new2day 3. Update the bootcommand to allow loading OpenWrt. $ setenv ramboot_openwrt "setenv serverip 192.168.1.66; setenv ipaddr 192.168.1.1; tftpboot 0x86000000 openwrt-3915.bin; bootm" $ setenv boot_openwrt "sf probe; sf read 0x88000000 0x280000 0xc00000; bootm 0x88000000" $ setenv bootcmd "run boot_openwrt" $ saveenv 4. Download the OpenWrt initramfs image. Serve it using a TFTP server as "openwrt-3915.bin" at 192.1681.66. 5. Download & boot the OpenWrt initramfs image on the access point. $ run ramboot_openwrt 6. Wait for OpenWrt to start. 7. Download and transfer the sysupgrade image to the device using e.g. SCP. 8. Install OpenWrt to the device using "sysupgrade" $ sysupgrade -n /path/to/openwrt.bin Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: point to externally compiled dtbs in recipesTomasz Maciej Nowak2022-09-064-194/+11
| | | | | | | | | | | | | | | | Adjusting dts will cause a rebuild of whole kernel as the buildroot considers this a part of kernel source. It's a royal PITA when trying to prepare support for new device, since this takes a lot of time on slower systems. As it stands, buildroot itself, with own rule, also compiles dtbs and the results are $(KDIR)/image-$(DEVICE_DTS).dtb. With setting DEVICE_DTS_DIR to directory holding the device dts (similarly to some other targets), buildroot doesn't consider changed dts as part of kernel source and rebuilds only dtb. This really speeds up development. And since the kernel built dts are no longer used, drop the paches adding dtses to its build. Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> Reviewed-by: Robert Marko <robimarko@gmail.com>
* kernel: fix mvneta Ethernet after generic phylink validateDaniel Golle2022-09-0510-35/+1222
| | | | | | | | Import patches from Linux v5.16 and v5.17 to get 2500Base-X SFP working again with mvneta driver after the generic phylink validate backport. Fixes: aab466f422 ("kernel: backport generic phylink validate") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: fix fallout after etron spinand backportFelix Fietkau2022-09-051-5/+5
| | | | Signed-off-by: Felix Fietkau <nbd@nbd.name>
* airoha: Add new target platformDaniel Danzberger2022-09-0518-0/+1867
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Airoha is a new ARM platform based on Cortex-A53 which has recently been merged into linux-next. Due to BootROM limitations on this platform, the Cortex-A53 can't run in Aarch64 mode and code must be compiled for 32-Bit ARM. This support is based mostly on those linux-next commits backported for kernel 5.15. Patches: 1 - platform support = linux-next 2 - clock driver = linux-next 3 - gpio driver = linux-next 4 - linux,usable-memory-range dts support = linux-next 5 - mtd spinand driver 6 - spi driver 7 - pci driver (kconfig only, uses mediatek PCI) = linux-next Still missing: - Ethernet driver - Sysupgrade support A.t.m there exists one subtarget EN7523 with only one evaluation board. The initramfs can be run with the following commands from u-boot: - u-boot> setenv bootfile \ openwrt-airoha-airoha_en7523-evb-initramfs-kernel.bin u-boot> tftpboot u-boot> bootm 0x81800000 - Signed-off-by: Daniel Danzberger <daniel@dd-wrt.com>
* realtek: replace fix for spurious GPIO interruptsSander Vanheule2022-09-042-30/+373
| | | | | | | | | | | | | 8 and 16 bit writes to the GPIO peripheral are apparently not supported, and only worked most of the time. This resulted in garbabe writes to the interrupt mask registers, causing spurious unhandled interrupts, which could lead to CPU lock-ups as these kept retriggering. Instead of clearing these spurious interrupt when they occur, the upstream patch will just make sure all register writes have the intended result, so these don't happen at all. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* bcm4908: fix Asus GT-AX6000 imageRafał Miłecki2022-09-033-2/+65
| | | | | | | 1. Include Linux DTB 2. Add 50991 variant (seems to differ by 1 PHY we don't support yet) Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* mediatek: mt7622: fix DTS compatible of UniFi 6 LR variantsDaniel Golle2022-09-033-3/+3
| | | | | | | Make sure the compatible string in DTS matches the now v1/v2 differentiated board name in target/linux/mediatek/image/mt7622.mk. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* bcm4908: use upstream patches for Asus GT-AC5300 LEDsRafał Miłecki2022-09-023-3/+12
| | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* kernel: bump 5.15 to 5.15.64John Audia2022-09-0212-33/+33
| | | | | | | | | | All patches automatically rebased Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200 Run-tested: bcm2711/RPi4B, mt7622/RT3200 Signed-off-by: John Audia <therealgraysky@proton.me>
* mpc85xx: Drop pci aliases to avoid domain changesMartin Kennedy2022-09-026-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of upstream Linux commit 0fe1e96fef0a ("powerpc/pci: Prefer PCI domain assignment via DT 'linux,pci-domain' and alias"), the PCIe domain address is no longer numbered by the lowest 16 bits of the PCI register address after a fallthrough. Instead of the fallthrough, the enumeration process accepts the alias ID (as determined by `of_alias_scan()`). This causes e.g.: 9000:00:00.0 PCI bridge: Freescale Semiconductor Inc P1020E (rev 11) 9000:01:00.0 Network controller: Qualcomm Atheros AR958x 802.11abgn ... to become 0000:00:00.0 PCI bridge: Freescale Semiconductor Inc P1020E (rev 11) 0000:01:00.0 Network controller: Qualcomm Atheros AR958x 802.11abgn ... ... which then causes the sysfs path of the netdev to change, invalidating the `wifi_device.path`s enumerated in `/etc/config/wireless`. One other solution might be to migrate the uci configuration, as was done for mvebu in commit 0bd5aa89fcf2 ("mvebu: Migrate uci config to new PCIe path"). However, there are concerns that the sysfs path will change once again once some upstream patches[^2][^3] are merged and backported (and `CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT` is enabled). Instead, remove the aliases and allow the fallthrough to continue for now. We will provide a migration in a later release. This was first reported as a Github issue[^1]. [^1]: https://github.com/openwrt/openwrt/issues/10530 [^2]: https://lore.kernel.org/linuxppc-dev/20220706104308.5390-1-pali@kernel.org/t/#u [^3]: https://lore.kernel.org/linuxppc-dev/20220706101043.4867-1-pali@kernel.org/ Fixes: #10530 Tested-by: Martin Kennedy <hurricos@gmail.com> [Tested on the Aerohive HiveAP 330 and Extreme Networks WS-AP3825i] Signed-off-by: Martin Kennedy <hurricos@gmail.com>
* at91bootstrap: use sdmmc0 as booting media for sama5d27_som1_ekClaudiu Beznea2022-09-021-2/+2
| | | | | | | | | | Commit 0b7c66c ("at91bootstrap: add sama5d27_som1_eksd1_uboot as default defconfig") changed default booting media for sama5d27_som1_ek board w/o any reason. Changed it back to sdmmc0 as it is for all the other Microchip supported distributions for this board (Buildroot, Yocto Project). The initial commit cannot be cleanly reverted. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
* uboot-at91: use sdmmc0 as booting media for sama5d27_som1_ekClaudiu Beznea2022-09-022-13/+7
| | | | | | | | | | | Commit adc69fe (""uboot-at91: changed som1 ek default defconfigs") changed the booting media to sdmmc1 as default booting w/o any reason. The Microchip releases for the rest of supported distributions (Buildroot, Yocto Project) uses sdmmc0 as default booting media for this board. Thus change it back to sdmmc0. With this remove references to sdmmc1 config. The initial commit cannot be cleanly reverted. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
* kernel: fix DSA mac_select_pcs backportDaniel Golle2022-09-021-0/+88
| | | | | | | | Backport commit from Linux 5.18 fixing phylink with DSA drivers which do not provide mac_select_pcs yet. Fixes: aab466f422 ("kernel: backport generic phylink validate") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* realtek: Fix missing clock module CONFIG settingMarkus Stockhausen2022-08-311-0/+1
| | | | | | | Since introduction of clock driver we have a new kernel config setting. Provide an initial value for the 930x targets. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: fix PLL register inconsistenciesMarkus Stockhausen2022-08-311-0/+3
| | | | | | | Some devices have wrong/empty values in the PLL registers. Work around that by reporting the default values. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* kernel: bump 5.10 to 5.10.139John Audia2022-08-312-27/+21
| | | | | | All patches automatically rebased. Signed-off-by: John Audia <therealgraysky@proton.me>
* mediatek: add support for Bananapi BPi-R3Daniel Golle2022-08-309-2/+920
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Bananapi BPi-R3 is a development router board built around the MediaTek Filogic 830 (MT7986A) SoC. The board can boot either from microSD, SPI-NAND, SPI-NOR or eMMC. Only either SPI-NAND or SPI-NOR can be used at the same time, also only either microSD or eMMC can be used. The various storage options can be selected using small SMD switches on the board. Specs: * MediaTek MT7986A (Filogic 830) 4x ARM Cortex A53 * 4T4R 2.4G 802.11bgnax (MT7975N) * 4T4R 5G 802.11anac/ax (MT7975P) * 2 GB DDR4 RAM * 8 GB eMMC * 128 MB SPI-NAND flash * 32 MB SPI-NOR flash * on-board MT7531 GbE switch * 2x SFP+ (1 GbE / 2.5 GbE) * 5x GbE network port * miniPCIe slot (only USB 2.0 connected) * uSIM slot (connected to miniPCIe interface) * M.2 KEY-E PCIe interface (PCIe x2) * microSD card interface * 26 PIN GPIO Hardware details: https://wiki.banana-pi.org/Banana_Pi_BPI-R3 Working: * all 4 boot methods incl. installation via U-Boot, sysupgrade, ... * copper LAN and WAN ports * SFP1 (connected to gmac1, eth1 in Linux) * WiFi * LEDs * Buttons * PSTORE/ramoops based dual-boot Not Working (missing driver features): * SFP2 (connected to MT7531 switch) Untested: * M.2/NGFF slot (PCIe x2) * mPCIe slot (USB 2.0 + SIM) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* kernel: add pending mtk_sgmii and phy improvements from @lynxisDaniel Golle2022-08-3010-0/+467
| | | | | | | | | | | | | Add pending patches from Alexander 'lynxis' Couzens which are required for RealTek NBase-T PHYs or SFP+ cages to work when connected to the SGMII interface provided by recent MediaTek SoCs [1]. The patches for MT753x fix link speed limitation on CPU ports observed by many users which is due to reset being carried out wrongly [2]. [1]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669488&state=* [2]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669486&state=* Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* kernel: backport generic phylink validateDaniel Golle2022-08-3056-28/+4446
| | | | | | | Backport generic phylink validate series and make use of it for mtk_eth_soc Ethernet driver as well as mt7530 DSA driver. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ramips: define Yuncore AX820 switch LEDsThibaut VARÈNE2022-08-292-0/+20
| | | | | | | | | This patch defines the two switch LED to bring them under user control. Fixes: a0e1d3ab7b4f ("ramips: improve YunCore AX820 LEDs") Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> [rmilecki: leave "label"s in place] Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* realtek: tl-sg2008p: fix labeling of lan portsAlexandru Gagniuc2022-08-291-8/+8
| | | | | | | | The SG2008P has its ethernet ports in the rear, and LEDs in the front. The ports should be labeled lan8->lan1, not lan1->lan8. To resolve this, fix the phy mapping in the "ports" node. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
* realtek: tl-sg2008p: use correct i2c address for TPS23861Alexandru Gagniuc2022-08-291-2/+2
| | | | | | | | Address 0x30 is a "broadcast" address for the TPS23861. It should not be used by drivers, as all TPS23861 devices on the bus are supposed to respond. Change this to the correct address, 0x28. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
* realtek: ignore disabled switch portsSander Vanheule2022-08-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | When marking a switch port as disabled in the device tree, by using 'status = "disabled";', the switch driver fails on boot, causing a restart: CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802c3064, ra == 8022b4b4 [ ... ] Call Trace: [<802c3064>] strlen+0x0/0x2c [<8022b4b4>] start_creating.part.0+0x78/0x194 [<8022bd3c>] debugfs_create_dir+0x44/0x1c0 [<80396dfc>] rtl838x_dbgfs_port_init+0x54/0x258 [<80397508>] rtl838x_dbgfs_init+0xe0/0x56c This is caused by the DSA subsystem (mostly) ignoring the port, while rtl83xx_mdio_probe() still extracts some details on this disabled port from the device tree, resulting in the usage of a NULL pointer where a port name is expected. By not probing ignoring disabled ports, no attempt is made to create a debugfs directory later. The device then boots as expected without the disabled port. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* ath79: add support for Extreme Networks WS-AP3805iAlbin Hellström2022-08-296-0/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: - SoC: Qualcomm Atheros QCA9557-AT4A - RAM: 2x 128MB Nanya NT5TU64M16HG - FLASH: 64MB - SPANSION FL512SAIFG1 - LAN: Atheros AR8035-A (RGMII GbE with PoE+ IN) - WLAN2: Qualcomm Atheros QCA9557 2x2 2T2R - WLAN5: Qualcomm Atheros QCA9882-BR4A 2x2 2T2R - SERIAL: UART pins at J10 (115200 8n1) Pinout is 3.3V - GND - TX - RX (Arrow Pad is 3.3V) - LEDs: Power (Green/Amber) WiFi 5 (Green) WiFi 2 (Green) - BTN: Reset Installation: 1. Download the OpenWrt initramfs-image. Place it into a TFTP server root directory and rename it to 1D01A8C0.img Configure the TFTP server to listen at 192.168.1.66/24. 2. Connect the TFTP server to the access point. 3. Connect to the serial console of the access point. Attach power and interrupt the boot procedure when prompted. Credentials are admin / new2day 4. Configure U-Boot for booting OpenWrt from ram and flash: $ setenv boot_openwrt 'setenv bootargs; bootm 0xa1280000' $ setenv ramboot_openwrt 'setenv serverip 192.168.1.66; tftpboot 0x89000000 1D01A8C0.img; bootm' $ setenv bootcmd 'run boot_openwrt' $ saveenv 5. Load OpenWrt into memory: $ run ramboot_openwrt 6. Transfer the OpenWrt sysupgrade image to the device. Write the image to flash using sysupgrade: $ sysupgrade -n /path/to/openwrt-sysupgrade.bin Signed-off-by: Albin Hellström <albin.hellstrom@gmail.com> [rename vendor - minor style fixes - update commit message] Signed-off-by: David Bauer <mail@david-bauer.net>
* kernel: enable inside secure driver for MediaTek platformsDaniel Golle2022-08-284-4/+5
| | | | | | | | Older MT7623 ARMv7 SoC as well as new Filogic platforms come with inside-secure,safexcel-eip97 units. Enable them in DTS and select the driver kernel module by default on those platforms. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add filogic subtargetFelix Fietkau2022-08-286-1/+552
| | | | | | | | Initially this covers MT7986 only, but it will later be expanded to cover other Filogic branded platforms by MediaTek Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add mt7986 soc support to the targetSam Shih2022-08-2825-0/+4286
| | | | | | | | | It will be supported by the new filogic subtarget Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: mt7622: use variable sector size for spi-norDaniel Golle2022-08-281-0/+1
| | | | | | Make use of minor sector size (4k) on supported SPI-NOR flash chips. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* kernel: replace downstream get_mtd_device_by_node() implementationRafał Miłecki2022-08-284-152/+2
| | | | | | | | | | | | | | Use upstream of_get_mtd_device_by_node() which should behave pretty much the same. Implementation differences: get_mtd_device_by_node() of_get_mtd_device_by_node() ---- ---- np->dev.of_node mtd_get_of_node(np) -EPROBE_DEFER -ENODEV Cc: Bernhard Frauendienst <openwrt@nospam.obeliks.de> Cc: Bernhard Frauendienst <kernel@nospam.obeliks.de> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* realtek: switch RTL838X/RTL839X DT to new clock driverMarkus Stockhausen2022-08-282-20/+141
| | | | | | | | | | | | | | Use new DT clockdriver syntax for RTL838X/RTL839X targets. To make it work we need to change some nodes: - define the external oscillator speed (25MHz) - define SRAM - add clock controller - Add second CPU for RTL839X - map all devices to new clocks - Remove dummy LXB clock - add CPU OPP table Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: activate clock driver for RTL838X/RTL839X targetsMarkus Stockhausen2022-08-282-0/+40
| | | | | | | | Make use the new clock driver for RTL838X and RTL839x target devices. Of course we will enable their primary consumer (cpufreq-dt) too. To be careful just set the default governor to userspace. As we rely on SRAM activate that module too. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: enable basic config for cpufreq frameworkMarkus Stockhausen2022-08-281-1/+5
| | | | | | | | | | | | | | | | A new clock driver makes more sense if it can be used from consumers like cpufreq. Before we enable the driver we must tell the config that the RTL838X and RTL839X targets allow CPU frequency changing. Even though these targets currently rely on the CPU's internal R4K timer, MIPS_EXTERNAL_TIMER is selected to allow for CPU frequency change testing. The Realtek timers, which are clocked by the Lexra bus, still need to be supported and used in order to provide correct wall times when reclocking the CPU. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> [add paragraph about MIPS_EXTERNAL_TIMER to commit message] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add patch to enable new clock driver in kernelMarkus Stockhausen2022-08-281-0/+26
| | | | | | Allow building the clock driver with kernel config options. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: add RTL83XX clock driverMarkus Stockhausen2022-08-286-0/+1151
| | | | | | | | | | | | | | | | | | | Add a new self-contained combined clock & platform driver that allows to access the PLL hardware clocks of RTL83XX devices. Currently it provides info about CPU, MEM and LXB clocks on RTL838X and RTL839X devices and additionally allows to change the CPU clocks. Changing the clocks multiple times on a DGS-1210-20 and a DGS-1210-52 already works well and is multithreading safe on the RTL839X. Even a cpufreq initiated change of the CPU clock works fine. Loading the driver will add some meaningful logging. [0.000000] rtl83xx-clk: initialized, CPU 500 MHz, MEM 300 MHz (8 Bit DDR3), LXB 200 MHz [0.279456] rtl83xx-clk soc:clock-controller: rate setting enabled, CPU 325-600 MHz, MEM 300-300 MHz, LXB 200-200 MHz, OVERCLOCK AT OWN RISK Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> [remove trailing whitespaces, C-style SPDX comments for ASM and headers] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add PLL DT binding includesMarkus Stockhausen2022-08-281-0/+15
| | | | | | Add some constants for sharing between DT and drivers. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* kernel: add quirk for Huawei-compatible OEM SFP GE-TDaniel Golle2022-08-261-0/+47
| | | | | | | Ignore TX_FAULT signal on certain cheap copper/TP gigabit Ethernet SFP modules. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* bcm53xx: 5.15: add missing LEDS_BCM63138 config symbolPetr Štetiar2022-08-251-0/+1
| | | | | | | | | Fixes following build issue found during build testing with 5.15.63 kernel: LED Support for Broadcom BCM63138 SoC (LEDS_BCM63138) [N/m/y/?] (NEW) Signed-off-by: Petr Štetiar <ynezz@true.cz>
* kernel: bump 5.15 to 5.15.63John Audia2022-08-2514-28/+28
| | | | | | | | | | All patches automatically rebased. Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200 Run-tested: bcm2711/RPi4B, mt7622/RT3200 Signed-off-by: John Audia <therealgraysky@proton.me>
* kernel: bump 5.10 to 5.10.138John Audia2022-08-255-8/+8
| | | | | | All patches automatically rebased. Signed-off-by: John Audia <therealgraysky@proton.me>
* kernel: bump 5.15 to 5.15.62Petr Štetiar2022-08-2392-1488/+296
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Deleted following upstreamed patches: bcm27xx: 950-0006-drm-vc4-hdmi-Fix-HPD-GPIO-detection.patch bcm27xx: 950-0420-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx: 950-0425-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx: 950-0432-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx: 950-0433-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx: 950-0435-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx: 950-0436-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx: 950-0437-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx: 950-0438-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx: 950-0443-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx: 950-0445-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch bcm27xx: 950-0475-drm-vc4-Reset-HDMI-MISC_CONTROL-register.patch bcm27xx: 950-0476-drm-vc4-Release-workaround-buffer-and-DMA-in-error-p.patch bcm27xx: 950-0477-drm-vc4-Correct-DSI-divider-calculations.patch bcm27xx: 950-0664-drm-vc4-dsi-Correct-max-divider-to-255-not-7.patch bcm53xx: 072-next-ARM_dts_BCM53015-add-mr26.patch mediatek: 920-linux-next-dts-mt7622-bpi-r64-fix-wps-button.patch Manually rebased following patches: bcm27xx: 950-0004-drm-vc4-hdmi-Remove-the-DDC-probing-for-status-detec.patch bcm27xx: 950-0700-net-phy-lan87xx-Decrease-phy-polling-rate.patch bcm27xx: 950-0711-drm-vc4-Rename-bridge-to-out_bridge.patch bcm27xx: 950-0713-drm-vc4-Remove-splitting-the-bridge-chain-from-the-d.patch bcm27xx: 950-0715-drm-vc4-Convert-vc4_dsi-to-using-a-bridge-instead-of.patch bcm27xx: 950-0787-vc4-drm-vc4_plane-Keep-fractional-source-coords-insi.patch bcm27xx: 950-0914-mmc-block-Don-t-do-single-sector-reads-during-recove.patch Runtime tested on turris-omnia and glinet-b1300. Tested-by: John Audia <therealgraysky@proton.me> [bcm2711/RPi4B, mt7622/RT3200] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* kernel: bump 5.10 to 5.10.137Petr Štetiar2022-08-2322-278/+36
| | | | | | | | | | Removed following upstreamed patch: * bcm53xx: 081-next-ARM_dts_BCM53015-add-mr26.patch All other patches automagically rebased. Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ipq806x: add missing scaling_available_frequencies for dedicated cpufreqChristian Marangi2022-08-212-2/+14
| | | | | | | | | | Add missing scaling_available_frequencies sysfs entry for dedicated cpufreq driver. This sysfs entry is not standard and each cpufreq driver needs to provide it and declare it in the cpufreq driver struct attr. Fixes: 5dbbefcbccc0 ("ipq806x: introduce dedicated krait cpufreq") Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
* ath79: add support for ZyXEL NWA1100-NHSebastian Schaper2022-08-214-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: * AR9342, 16 MiB Flash, 64 MiB RAM, 802.11n 2T2R, 2.4 GHz * 1x Gigabit Ethernet (AR8035), 802.3af PoE Installation: * OEM Web UI is at 192.168.1.2 login as `admin` with password `1234` * Flash factory-AASI.bin The string `AASI` needs to be present within the file name of the uploaded image to be accepted by the OEM Web-based updater, the factory image is named accordingly to save the user from the hassle of manual renaming. TFTP Recovery: * Open the case, connect to TTL UART port (this is the official method described by Zyxel, the reset button is useless during power-on) * Extract factory image (.tar.bz2), serve `vmlinux_mi124_f1e.lzma.uImage` and `mi124_f1e-jffs2` via tftp at 192.168.1.10 * Interrupt uboot countdown, execute commands `run lk` `run lf` to flash the kernel / filesystem accordingly MAC addresses as verified by OEM firmware: use address source LAN *:cc mib0 0x30 ('eth0mac'), art 0x1002 (label) 2g *:cd mib0 0x4b ('wifi0mac') Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
* ath79: add support for ZyXEL NWA1123-ACSebastian Schaper2022-08-214-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: * AR9342, 16 MiB Flash, 64 MiB RAM, 802.11n 2T2R, 2.4 GHz * QCA9882 PCIe card, 802.11ac 2T2R * 1x Gigabit Ethernet (AR8035), 802.3af PoE Installation: * OEM Web UI is at 192.168.1.2 login as `admin` with password `1234` * Flash factory-AAOX.bin The string `AAOX` needs to be present within the file name of the uploaded image to be accepted by the OEM Web-based updater, the factory image is named accordingly to save the user from the hassle of manual renaming. TFTP Recovery: * Open the case, connect to TTL UART port (this is the official method described by Zyxel, the reset button is useless during power-on) * Extract factory image (.tar.bz2), serve `vmlinux_mi124_f1e.lzma.uImage` and `mi124_f1e-jffs2` via tftp at 192.168.1.10 * Interrupt uboot countdown, execute commands `run lk` `run lf` to flash the kernel / filesystem accordingly MAC addresses as verified by OEM firmware: use address source LAN *:1c mib0 0x30 ('eth0mac'), art 0x1002 (label) 2g *:1c mib0 0x4b ('wifi0mac') 5g *:1e mib0 0x66 ('wifi1mac') Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
* ath79: add support for ZyXEL NWA1123-NISebastian Schaper2022-08-214-1/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: * AR9342, 16 MiB Flash, 64 MiB RAM, 802.11n 2T2R, 2.4 GHz * AR9382 PCIe card, 802.11n 2T2R, 5 GHz * 1x Gigabit Ethernet (AR8035), 802.3af PoE Installation: * OEM Web UI is at 192.168.1.2 login as `admin` with password `1234` * Flash factory-AAEO.bin The string `AAEO` needs to be present within the file name of the uploaded image to be accepted by the OEM Web-based updater, the factory image is named accordingly to save the user from the hassle of manual renaming. TFTP Recovery: * Open the case, connect to TTL UART port (this is the official method described by Zyxel, the reset button is useless during power-on) * Extract factory image (.tar.bz2), serve `vmlinux_mi124_f1e.lzma.uImage` and `mi124_f1e-jffs2` via tftp at 192.168.1.10 * Interrupt uboot countdown, execute commands `run lk` `run lf` to flash the kernel / filesystem accordingly MAC addresses as verified by OEM firmware: use address source LAN *:fb mib0 0x30 ('eth0mac'), art 0x1002 (label) 2g *:fc mib0 0x4b ('wifi0mac') 5g *:fd mib0 0x66 ('wifi1mac') Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-01 15:00:33 +0000