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* mpc85xx: change legacy "eeprom" compatibleChristian Lamparter2022-02-191-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | silences the following message: > eeprom 0-0051: eeprom driver is deprecated, please use at24 instead The chip was likely a Dallas Semiconductor and later MAXIM part before Analog Devices, Inc. bought MAXIM. From the datasheet: "The DS28CN01 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-1/180-2 and ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1)." ... "Write Access Requires Knowledge of the Secret and the Capability of Computing and Transmitting a 160-Bit MAC as Authorization" OpenWrt doesn't use it. There's no in-kernel driver from what I know. Let's document that the chip is at the location. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* mpc85xx: update lp5521 led-controller node for 5.10Christian Lamparter2022-02-191-10/+57
| | | | | | | | | | | | | | | | | | | | The tricolor LED which is controlled by a lp5521 needed some maintenance as the driver failed to load in the current v5.10 image: | lp5521: probe of 0-0032 failed with error -22 This is because the device-tree needed to be updated to match the latest led coloring and function trends. - removed the device name from the label - added color/function properties - added required reg and cells properties For reference a disabled multicolor/RGB is added since this reflects the real hardware. Unfortunately, the multicolor sysfs interface isn't supported by yet. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* mpc85xx: Patch HiveAP 330 u-boot to fix bootMartin Kennedy2022-02-195-48/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When Kernel 5.10 was enabled for mpc85xx, the kernel once again became too large upon decompression (>7MB or so) to decompress itself on boot (see FS#4110[1]). There have been many attempts to fix booting from a compressed kernel on the HiveAP-330: - b683f1c36d8a ("mpc85xx: Use gzip compressed kernel on HiveAP-330") - 98089bb8ba82 ("mpc85xx: Use uncompressed kernel on the HiveAP-330") - 26cb167a5ca7 ("mpc85xx: Fix Aerohive HiveAP-330 initramfs image") We can no longer compress the kernel due to size, and the stock bootloader does not support any other types of compression. Since an uncompressed kernel no longer fits in the 8MiB kernel partition at 0x2840000, we need to patch u-boot to autoboot by running variable which isn't set by the bootloader on each autoboot. This commit repartitions the HiveAP, requiring a new COMPAT_VERSION, and uses the DEVICE_COMPAT_MESSAGE to guide the user to patch u-boot, which changes the variable run on boot to be `owrt_boot`; the user can then set the value of that variable appropriately. The following has been documented in the device's OpenWrt wiki page: <https://openwrt.org/toh/aerohive/hiveap-330>. Please look there first/too for more information. The from-stock and upgrade from a previous installation now becomes: 0) setup a network with a dhcp server and a tftp server at serverip (192.168.1.101) with the initramfs image in the servers root directory. 1) Hook into UART (9600 baud) and enter U-Boot. You may need to enter a password of administrator or AhNf?d@ta06 if prompted. If the password doesn't work. Try reseting the device by pressing and holding the reset button with the stock OS. 2) Once in U-Boot, set the new owrt_boot and tftp+boot the initramfs image: Use copy and paste! # fw_setenv owrt_boot 'setenv bootargs \"console=ttyS0,$baudrate\";bootm 0xEC040000 - 0xEC000000' # save # dhcp # setenv bootargs console=ttyS0,$baudrate # tftpboot 0x1000000 192.168.1.101:openwrt-mpc85xx-p1020-aerohive_hiveap-330-initramfs-kernel.bin # bootm 3) Once openwrt booted: carefully copy and paste this into the root shell. One step at a time # 3.0 install kmod-mtd-rw from the internet and load it opkg update; opkg install kmod-mtd-rw insmod mtd-rw i_want_a_brick=y # 3.1 create scripts that modifies uboot cat <<- "EOF" > /tmp/uboot-update.sh . /lib/functions/system.sh cp "/dev/mtd$(find_mtd_index 'u-boot')" /tmp/uboot cp /tmp/uboot /tmp/uboot_patched ofs=$(strings -n80 -td < /tmp/uboot | grep '^ [0-9]* setenv bootargs.*cp\.l' | cut -f2 -d' ') for off in $ofs; do printf "run owrt_boot; " | dd of=/tmp/uboot_patched bs=1 seek=${off} conv=notrunc done md5sum /tmp/uboot* EOF # 3.2 run the script to do the modification sh /tmp/uboot-update.sh # verify that /tmp/uboot and /tmp/uboot_patched are good # # my uboot was: (is printed during boot) # U-Boot 2009.11 (Jan 12 2017 - 00:27:25), Build: jenkins-HiveOS-Honolulu_AP350_Rel-245 # # d84b45a2e8aca60d630fbd422efc6b39 /tmp/uboot # 6dc420f24c2028b9cf7f0c62c0c7f692 /tmp/uboot_patched # 98ebc7e7480ce9148cd2799357a844b0 /tmp/uboot-update.sh <-- just for reference # 3.3 this produces the /tmp/u-boot_patched file. mtd write /tmp/uboot_patched u-boot 3) scp over the sysupgrade file to /tmp/ and run sysupgrade to flash OpenWrt: sysupgrade -n /tmp/openwrt-mpc85xx-p1020-aerohive_hiveap-330-squashfs-sysupgrade.bin 4) after the reboot, you are good to go. Other notes: - Note that after this sysupgrade, the AP will be unavailable for 7 minutes to reformat flash. The tri-color LED does not blink in any way to indicate this, though there is no risk in interrupting this process, other than the jffs2 reformat being reset. - Add a uci-default to fix the compat version. This will prevent updates from previous versions without going through the installation process. - Enable CONFIG_MTD_SPLIT_UIMAGE_FW and adjust partitioning to combine the kernel and rootfs into a single dts partition to maximize storage space, though in practice the kernel can grow no larger than 16MiB due to constraints of the older mpc85xx u-boot platform. - Because of that limit, KERNEL_SIZE has been raised to 16m. - A .tar.gz of the u-boot source for the AP330 (a.k.a. Goldengate) can be found here[2]. - The stock-jffs2 partition is also removed to make more space -- this is possible only now that it is no longer split away from the rootfs. - the console-override is gone. The device will now get the console through the bootargs. This has the advantage that you can set a different baudrate in uboot and the linux kernel will stick with it! - due to the repartitioning, the partition layout and names got a makeover. - the initramfs+fdt method is now combined into a MultiImage initramfs. The separate fdt download is no longer needed. - added uboot-envtools to the mpc85xx target. All targets have uboot and this way its available in the initramfs. [1]: https://bugs.openwrt.org/index.php?do=details&task_id=4110 [2]: magnet:?xt=urn:btih:e53b27006979afb632af5935fa0f2affaa822a59 Tested-by: Martin Kennedy <hurricos@gmail.com> Signed-off-by: Martin Kennedy <hurricos@gmail.com> (rewrote parts of the commit message, Initramfs-MultiImage, dropped bootargs-override, added wiki entry + link, uboot-envtools) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* linux/modules: split up oid_registryRosen Penev2022-02-191-0/+1
| | | | | | This will be needed by ksmbd in a following commit. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* target/linux: add help text to kernel configRosen Penev2022-02-191-0/+22
| | | | | | | These options will be used for ksmbd. Once kernel 5.15 makes it in, this patch can go away. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* x86: fix support for Sophos SG/XG wireless productsRaylynn Knight2022-02-191-8/+8
| | | | | | | | | | Correct typo that caused network interfaces for Sophos SG/XG wireless devices to not be configured properly. Tested on Sophos SG 135wr2, Sophos XG 125wr2 and Sophos SG 105wr1 Signed-off-by: Raylynn Knight <rayknight@me.com>
* mvebu: mark all mtd partitions on GL.iNet GL-MV1000 read-onlyEnrico Mioso2022-02-191-0/+3
| | | | | | | | | | | | | | | On this device, two of the three defined MTD partitions are automatically set to read-only, since they do not end at an erase/write block boundary. In particular, the only partition remaining writable is the one holding the u-boot bootloader. Mark all of the partitions read-only, at least until a better understanding of why the layout has been laid out this way is gained. Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
* ipq806x: update defconfigJohn Audia2022-02-191-7/+1
| | | | | | | | | | | | Enabled `CONFIG_ALL_KMODS` and ran `make kernel_menuconfig` against ipq806x to update defconfig. The removed symbols are in fact present in target/linux/generic/config-5.10. CONFIG_MDIO_DEVRES was likely added due to this: <https://elixir.bootlin.com/linux/v5.10.100/source/drivers/net/phy/Kconfig#L16> Signed-off-by: John Audia <graysky@archlinux.us>
* ipq806x: TP-Link VR2600v convert legacy partitioningChristian Lamparter2022-02-191-88/+92
| | | | | | | | | | | | | This device still had the legacy flash partitioning. This is a problem, because neither the nvmem-cells for mac-address and calibration. Nor the denx,uimage mtd-splitter compatible would be picked up. The patch also changes the node-names of the flash and partition nodes to hopefully meet all the current FDT trends. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: document pcie wifi chip on the GL.Inet GL-B2200Christian Lamparter2022-02-191-4/+4
| | | | | | | | | | | | | | | | | | Enrico provided a bootlog that shows the chip is a WAVE-2 QCA9888v2: > pci 0000:01:00.0: [168c:0056] type 00 class 0x028000 > [...] > ath10k 5.15 driver, optimized for CT firmware, probing pci device: 0x56. > ath10k_pci 0000:01:00.0: qca9888 hw2.0 target 0x01000000 [...] chip_id 0x00000000 sub 0000:0000 > ath10k_pci 0000:01:00.0: firmware ver 10.4b-ct-9888-fW-13-5ae337bb1 api 5 features mfp,[...] > ath10k_pci 0000:01:00.0: board_file api 2 bmi_id N/A crc32 6535d835 > ath10k_pci 0000:01:00.0: htt-ver 2.2 wmi-op 6 htt-op 4 cal file max-sta 32 raw 0 hwcrypto 1 this patch switches the device over to pre-calibration. (this is more or less cosmetic) Reported-by: Enrico Mioso <mrkiko.rs@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: limit available radio channels for GL.iNet GL-B2200Enrico Mioso2022-02-191-0/+2
| | | | | | | | | The PCIe and built-in 5GHZ radios are meant to operate on different frequency bands. The hardware enforces this via RF filters. Add this information to allow software enforcing it as well. Credits to Piotr Dymacz for the invaluable help. Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com>
* apm821xx: add alternative names for supported devicesChristian Lamparter2022-02-192-3/+9
| | | | | | | with the introduction of the DEVICE_ALTX_VENDOR, DEVICE_ALTX_MODEL multiple/sibiling devices can seemingly supported by one device entry. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ramips: add Ubiquiti EdgePoint R6 as alt nameNick Hainke2022-02-191-0/+2
| | | | | | | | | | | The Ubiquiti EdgePoint R6 is identical to the EdgeRouter X SFP. However, it fits well into outdoor environments due to its water-proven case. More specifications: 9715beb04c74 ("ramips: add support for Ubiquiti EdgeRouter X-SFP") Signed-off-by: Nick Hainke <vincent@systemli.org>
* net: ethernet: mtk_eth_soc: add ipv6 flow offload supportDavid Bentham2022-02-191-0/+65
| | | | | | | | | | Add the missing IPv6 flow offloading support for routing only. Hardware flow offloading is done by the packet processing engine (PPE) of the Ethernet MAC and as it doesn't support mangling of IPv6 packets, IPv6 NAT cannot be supported. Signed-off-by: David Bentham <db260179@gmail.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
* build: scripts/config - update to kconfig-v5.14Eneas U de Queiroz2022-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Functional Changes ---------- ------- - make 'imply' not impose any restrictions: allow symbols implied by y to become m - change "modules" from sub-option to first-level attribute Bugfixes -------- - nconf: fix core dump when searching in empty menu - nconf: stop endless search loops - xconfig: fix content of the main widget - xconfig: fix support for the split view mode Other Changes ----- ------- - highlight xconfig 'comment' lines with '***' - xconfig: navigate menus on hyperlinks - xconfig: drop support for Qt4 - improve host ncurses detection Update the 'option modules' usage to just 'modules' in Config.in. Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
* ath79: Add support for Ubiquiti NanoBeam AC Gen1 XCDaniel González Cabanelas2022-02-195-0/+124
| | | | | | | | | | | | | | | | | | | | | | The Ubiquiti NanoBeam AC Gen1 XC (NBE-5AC-19) is an outdoor 802.11ac CPE with a waterproof casing (ultrasonically welded) and bulb shaped. Hardware: - SoC: Qualcomm Atheros QCA9558 - RAM: 128 MB DDR2 - Flash: 16 MB SPI NOR - Ethernet: 1x GbE, AR8033 phy connected via SGMII - PSU: 24 Vdc passive PoE - WiFi 5 GHz: Qualcomm Atheros QCA988X - Buttons: 1x reset - LEDs: 1x power, 1x Ethernet, 4x RSSI, all blue - Internal antenna: 19 dBi planar Installation from stock airOS firmware: - Follow instructions for XC-type Ubiquiti devices on OpenWrt wiki at https://openwrt.org/toh/ubiquiti/common Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
* x86: geode: add kmod-crypto-ebc needed for hw accelerationPaul Fertser2022-02-191-1/+2
| | | | | | | | | | Module kmod-crypto-hw-geode provides accelerated cbc(aes) and ecb(aes) but the software implementation is also needed when AES key size isn't 128 so that the operation can fall back. Add the kmod so that it would all work as expected out of the box. Tested-by: timur_davletshin Signed-off-by: Paul Fertser <fercerpav@gmail.com>
* ath79: use gpio-cascade for Buffalo WZR-HP-G300NHMauri Sandberg2022-02-192-11/+32
| | | | | | | Switch to a generic GPIO cascade driver. Signed-off-by: Mauri Sandberg <maukka@ext.kapsi.fi> Signed-off-by: Petr Štetiar <ynezz@true.cz> [missing commit description]
* kernel: 5.10: backport gpio-cascade and related symbolsMauri Sandberg2022-02-192-0/+238
| | | | | | | | The patch is under review at [1]. Signed-off-by: Mauri Sandberg <maukka@ext.kapsi.fi> [1] http://patchwork.ozlabs.org/project/linux-gpio/patch/20211026191506.3099-3-maukka@ext.kapsi.fi/
* realtek: fix locking bug in rtl838x_hw_receive()Birger Koblitz2022-02-181-3/+4
| | | | | | | | | | | | | | A Locking bug in the packet receive path was introduced with PR #4973. The following patch prevents the driver from locking after a few minutes with an endless flow of [ 1434.185085] rtl838x-eth 1b00a300.ethernet eth0: Ring contention: r: 0, last a28000f4, cur a28000f8 [ 1434.208971] rtl838x-eth 1b00a300.ethernet eth0: Ring contention: r: 0, last a28000f4, cur a28000fc [ 1434.794800] rtl838x-eth 1b00a300.ethernet eth0: Ring contention: r: 0, last a28000f4, cur a28000fc [ 1435.049187] rtl838x-eth 1b00a300.ethernet eth0: Ring contention: r: 0, last a28000f4, cur a28000fc Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
* sunix: fix typo in kmod-ata-corePaul Spooren2022-02-181-1/+1
| | | | | | | There was a missing `k` in the package name. s/mod-ata-core/kmod-ata-core Signed-off-by: Paul Spooren <mail@aparcar.org>
* realtek: add RTL8231 chip detectionSander Vanheule2022-02-171-1/+14
| | | | | | | | | | | | | | | | | | | | | | When initialising the driver, check if the RTL8231 chip is actually present at the specified address. If the READY_CODE value does not match the expected value, return -ENXIO to fail probing. This should help users to figure out which address an RTL8231 is configured to use, if measuring pull-up/-down resistors is not an option. On an unsuccesful probe, the driver will log: [ 0.795364] Probing RTL8231 GPIOs [ 0.798978] rtl8231_init called, MDIO bus ID: 30 [ 0.804194] rtl8231-gpio rtl8231-gpio: no device found at bus address 30 When a device is found, only the first two lines will be logged: [ 0.453698] Probing RTL8231 GPIOs [ 0.457312] rtl8231_init called, MDIO bus ID: 31 Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
* realtek: always require SMI bus ID for RTL8231Sander Vanheule2022-02-171-17/+16
| | | | | | | | | | | | | | | The SMI bus ID for RTL8231 currently defaults to 0, and can be overridden from the devicetree. However, there is no value check on the DT-provided value, aside from masking which would only cause value wrap-around. Change the driver to always require the "indirect-access-bus-id" property, as there is no real reason to use 0 as default, and perform a sanity check on the value when probing. This allows the other parts of the driver to be simplified a bit. Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
* realtek: use automatic GPIO numbering for RTL8231Sander Vanheule2022-02-171-1/+1
| | | | | | | | | Set the gpio_chip.base to -1 to use automatic GPIO line indexing. Setting base to 0 or a positive number is deprecated and should not be used. Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
* realtek: fix RTL8231 gpio countSander Vanheule2022-02-171-1/+1
| | | | | | | | | | The RTL8231's gpio_chip.ngpio was set to 36, which is the largest valid GPIO index. Fix the allowed number of GPIOs by setting ngpio to 37, the actual line count. Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
* realtek: rtl83xx-phy: abstract and document PHY featuresDaniel Golle2022-02-171-114/+135
| | | | | | | | | | | | | Replace magic values with more self-descriptive code now that I start to understand more about the design of the PHY (and MDIO controller). Remove one line before reading RTL8214FC internal PHY id which turned out to be a no-op and can hence safely be removed (confirmed by INAGAKI Hiroshi[1]) [1]: https://github.com/openwrt/openwrt/commit/df8e6be59a1fbce3f8c6878fe7440a129b1245d6#r66890713 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* realtek: fix locking issuesBirger Koblitz2022-02-172-26/+22
| | | | | | | Fixe a coupld of locking issues found by applying lock debugging to the code. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: switch to use generic MDIO accessor functionsDaniel Golle2022-02-176-473/+1238
| | | | | | | | Instead of directly calling SoC-specific functions in order to access (paged) MII registers or MMD registers, create infrastructure to allow using the generic phy_*, phy_*_paged and phy_*_mmd functions. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* realtek: implement Clause-45 MDIO write on rtl931xDaniel Golle2022-02-172-26/+65
| | | | | | | | | * Add missing Clause-45 write support for rtl931x * Switch to use helper functions in all Clause-45 access functions to make the code more readable. * More meaningful/unified debugging output (dynamic kprintf) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* realtek: backport Clause-45 MDIO helper functionsDaniel Golle2022-02-171-0/+53
| | | | | | | | Import commit ("c6af53f038aa3 net: mdio: add helpers to extract clause 45 regad and devad fields") from Linux 5.17 to allow making the MDIO code in the ethernet driver more readable. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* realtek: add support for port led configuration on RTL93XXBirger Koblitz2022-02-176-8/+175
| | | | | | | | | Using the led-set attribute of a port in the dts we allow configuration of the port leds. Each led-set is being defined in the led-set configuration of the .dts, giving a specific configuration to steer the port LEDs via a serial connection. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add support for the RTL8221B PHYBirger Koblitz2022-02-172-0/+18
| | | | | | | | | The RTL8221B PHY is a newer version of the RTL8226, also supporting 2.5GBit Ethernet. It is found with RTL931X devices such as the EdgeCore ECS4125-10P Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add specific PHY polling options to support the Zyxel XGS1250/XGS1210Birger Koblitz2022-02-172-14/+101
| | | | | | | | | | Both the Aquantia AQR113c and the RTL8226 PHYs in the Zyxel XGS1250 and the Zyxel XGS1210 require special polling configuration settings in the RTL930X_SMI_10GPHY_POLLING_REGxx_CFG configuration registers. Set them. Additionally, for RTL 1GBit phys set the RTL930X_SMI_PRVTE_POLLING_CTRL bits in the poll mask. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Fix link status detection on RTL9302 for SFP modulesBirger Koblitz2022-02-172-3/+23
| | | | | | | For SFP slots on the RTL9302, the link status is not correctly detected. Use the link media status instead. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add RTL931X sub-targetBirger Koblitz2022-02-177-1/+517
| | | | | | | | We add the RTL931X sub-target with kernel configuration for a dual core MIPS InterAptive CPU. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add HW support for RTL931X for PIE, L2 and STP agingBirger Koblitz2022-02-172-52/+1188
| | | | | | | | We add HW support routines for the RTL931X SoC family for handling the Packet Inspection Engine, L2 table handling and STP aging. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Store and Restore MC memberships for port enable/disableBirger Koblitz2022-02-172-55/+86
| | | | | | | | | We need to store and restore MC memberships in HW when a port joins or leaves a bridge as well as when it is enabled or disabled, as these properties should not change in these situations. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Copy all BPDUs to the kernelBirger Koblitz2022-02-174-8/+140
| | | | | | | | In order to receive STP information at the kernel level, we make sure that all Bridge Protocol Data Units are copied to the CPU-Port. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add L2 aging configuration functions for all SoC familiesBirger Koblitz2022-02-176-19/+58
| | | | | | | | Instead of a generic L2 aging configuration function with complex logic, we implement an individual function for all SoC types. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realted: Add DSA bridge offload configurationBirger Koblitz2022-02-174-1/+139
| | | | | | | | Add functionality to enable or disable L2 learning offload and port flooding for RTL83XX. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Backport bridge configuration for DSABirger Koblitz2022-02-171-0/+144
| | | | | | | | | Adds the DSA API for bridge configuration (flooding, L2 learning, and aging) offload as found in Linux 5.12 so that we can implement it in our drivver. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add Link Aggregation (aka trunking) supportBirger Koblitz2022-02-178-15/+369
| | | | | | | | | This adds LAG support for all 4 SoC families, including support ofr the use of different distribution algorithm for the load- balancing between individual links. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Backport LAG functionality for DSABirger Koblitz2022-02-171-0/+759
| | | | | | | | Add the LAG configuration API for DSA as found in Linux 5.12 so that we can implement it in the dsa driver. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Cleanup setting inner/outer PVID and Ingress/Egres VLAN filteringBirger Koblitz2022-02-176-28/+189
| | | | | | | | Use setting functions instead of register numbers in order to clean up the code. Also use enums to define inner/outer VLAN types and the filter type. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add support for ZxXEL XGS1250-12 SwitchBirger Koblitz2022-02-172-0/+321
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ZyXEL XGS1250-12 Switch is a 11 + 1 port multi-GBit switch with 8 x 1000BaseT, 3 x 1000/2500/5000/10000BaseT Ethernet ports and 1 SFP+ module slot. Hardware: - RTL9302B SoC - Macronix MX25L12833F (16MB flash) - Nanja NT5CC64M16GP-1 (128MB DDR3 SDRAM) - RTL8231 GPIO extender to control the port LEDs - RTL8218D 8x Gigabit PHY - Aquantia AQR113c 1/2.5/5/10 Gigabit PHYs - SFP+ 10GBit slot Power is supplied via a 12V 2A standard barrel connector. At the right side behind the grid is UART serial connector. A Serial header can be connected to from the outside of the switch trough the airvents with a standard 2.54mm header. Pins are from top to bottom Vcc(3.3V), TX, RX and GND. Serial connection is via 115200 baud, 8N1. A reset button is accessble through a hole in the front panel At the time of this commit, all ethernet ports work under OpenWRT, including the various NBaseT modes, however the 10GBit SFP+ slot is not supported. Installation -------------- * Connect serial as per the layout above. Connection parameters: 115200 8N1. * Navigate to 'Management' in the OEM web interface and click on 'Firmware upgrade' to the left. * Upload the OpenWrt initramfs image, and wait till the switch reboots. * Connect to the device through serial and change the U-boot boot command. > fw_setenv bootcmd 'rtk network on; boota' * Reboot, scp the sysupgrade image to /tmp, verify the checksum and flash it: > sysupgrade /tmp/openwrt-realtek-rtl930x-zyxel_xgs1250-12-squashfs-sysupgrade.bin * Upon reboot, you have a functional OpenWrt installation. Leave the bootcmd value as is - without 'rtk network on' the switch will fail to initialise the network. Web recovery ------------ The XGS1250-12 has a handy web recovery that will load when U-boot does not find a bootable kernel. In case you would like to trigger the web recovery manually, partially overwrite the firmware partition with some zeroes: # dd if=/dev/zero of=/dev/mtd5 bs=1M count=2 If you have serial connected you'll see U-boot will start the web recovery and print it's listening on 192.168.1.1, but by default it seems to be on the OEM default IP for the switch - 192.168.1.3. The web recovery only listens on HTTP (80) and *not* on 443 (HTTPS) unlike the web UI. Return to stock --------------- You can flash the ZyXEL firmware images to return to stock: # sysupgrade -F -n XGS1250-12_Firmware_V1.00(ABWE.1)C0.bix Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add RTL930X sub-targetBirger Koblitz2022-02-172-0/+222
| | | | | | | Adds the sub-target for the RTL930X-based routers. Adds an initial kernel configuration. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add SDS configuration routines for the RTL93XX platformsBirger Koblitz2022-02-174-44/+2144
| | | | | | | | Adds configuration routines for the internal SerDes of the RTL930X and RTL931X. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Improve MAC config handling for all SoCsBirger Koblitz2022-02-173-34/+205
| | | | | | | | | Adds a rtl931x_phylink_mac_config for the RTL931X and improve the handling of the RTL930X phylink configuration. Add separate handling of the RTL839x since some configurations are different from the RTL838X. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add support for detecting RTL9303 SoCsBirger Koblitz2022-02-171-0/+4
| | | | | | | Adds support for detecting RTL9303 SoCs as found e.g. in the Ubiquiti USW switch. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Allow PHY-IDs to differ from Port numbersBirger Koblitz2022-02-171-9/+34
| | | | | | | | | We were using the PHY-ids (the reg entries in the PHY sections of the .dts) as the port numbers. Now scan the ports section in the .dts, and use the actual port numbers, following the phy-handle to the PHY properties. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-26 18:08:59 +0000