| Commit message (Collapse) | Author | Age | Files | Lines |
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Backport some minor upstream fixes for the pinctrl drivers.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Fixes the following error when building without CONFIG_MODULE_STRIPPED:
FATAL: modpost: sound/soc/ralink/snd-soc-ralink-i2s: struct
of_device_id is not terminated with a NULL entry!
Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
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MIPS Coherent Processor Systems (CPS), which include the MT7621 SoC, support
deep sleep idle states and have a specific cpuidle driver for them.
Enable support for it, while also switching from constant timer ticks to the
idle dynticks model, with the TEO governor.
Run-tested on a Redmi AC2100.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
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We've been carrying this patch for many years [1], in order to fix a timer
calibration issue on MT7621. Turns out, after retesting with a recent kernel
(Linux 5.10), the system works perfectly fine without it (no rcu_sched stalls
or inconsistent BogoMIPS values across CPUs).
Manually refreshed:
322-mt7621-fix-cpu-clk-add-clkdev.patch
323-mt7621-memory-detect.patch
[1] https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=6f4a903533361a2906a4d94ac6f597cd9c6c47bc
Suggested-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Tested-by: Donald Hoskins <grommish@gmail.com>
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
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In order to fix random hangs on MT7621, we've been selecting
WEAK_REORDERING_BEYOND_LLSC for years [1]. However, these random hangs have been
most likely caused by an oversight in the MIPS implementation of the kernel
memory consistency model, which has already been fixed for some time (and
backported to stable) [2].
Manually refreshed:
321-mt7621-timer.patch
[1] https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=5c971cd6fdd7298a2017bdb6bea870088eddb8b9
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/mips?h=linux-5.4.y&id=42344113ba7a1ed7b5654cd5270af0d5698d8521
Suggested-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Tested-by: Donald Hoskins <grommish@gmail.com>
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
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The Pine64(+) and the SoPine64 baseboard has an optional BT+WiFi
module, carrying an RTL8723BS. The wifi part is connected via
SDIO, the BT part is connected via UART. The BT part requires
additional code changes in the drivers so we'll skip that until 5.10.
Aside from a DTS patch to enable the wifi module, add the required
packages into the device definitions.
[ 8.996970] RTL8723BS: module init start
[ 9.000922] RTL8723BS: rtl8723bs v4.3.5.5_12290.20140916_BTCOEX20140507-4E40
[ 9.007965] RTL8723BS: rtl8723bs BT-Coex version = BTCOEX20140507-4E40
[ 9.014785] pnetdev = 000000009bdd5000
[ 9.047780] RTL8723BS: rtw_ndev_init(wlan0)
[ 9.053349] RTL8723BS: module init ret =0
root@OpenWrt:/# iw list
Wiphy phy0
wiphy index: 0
max # scan SSIDs: 9
max scan IEs length: 2304 bytes
max # sched scan SSIDs: 0
max # match sets: 0
Retry short limit: 7
Retry long limit: 4
Coverage class: 0 (up to 0m)
Available Antennas: TX 0 RX 0
Supported interface modes:
* IBSS
* managed
* AP
* monitor
Band 1:
Frequencies:
* 2412 MHz [1] (20.0 dBm)
* 2417 MHz [2] (20.0 dBm)
* 2422 MHz [3] (20.0 dBm)
* 2427 MHz [4] (20.0 dBm)
* 2432 MHz [5] (20.0 dBm)
* 2437 MHz [6] (20.0 dBm)
* 2442 MHz [7] (20.0 dBm)
* 2447 MHz [8] (20.0 dBm)
* 2452 MHz [9] (20.0 dBm)
* 2457 MHz [10] (20.0 dBm)
* 2462 MHz [11] (20.0 dBm)
* 2467 MHz [12] (20.0 dBm) (no IR)
* 2472 MHz [13] (20.0 dBm) (no IR)
* 2484 MHz [14] (20.0 dBm) (no IR)
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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The Pine64(+) and the SoPine64 baseboard has two USB ports. One of
these (the lower) is connected directly to a USB host, the other
one's (upper) PHY is shared with the separate OTG controller. In
order to get it working, MUSB support needs to be enabled.
As there are other targets which compile MUSB support into the kernel
and not package it into modules, the same is done here.
[ 1.348760] usb usb5: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.04
[ 1.357029] usb usb5: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 1.364250] usb usb5: Product: MUSB HDRC host driver
[ 1.369219] usb usb5: Manufacturer: Linux 5.4.99 musb-hcd
[ 1.374617] usb usb5: SerialNumber: musb-hdrc.1.auto
[ 1.379891] hub 5-0:1.0: USB hub found
[ 1.383677] hub 5-0:1.0: 1 port detected
[...]
[ 697.299440] usb 1-1: new high-speed USB device number 2 using ehci-platform
[ 697.461855] usb 1-1: New USB device found, idVendor=090c, idProduct=1000, bcdDevice=11.00
[ 697.470038] usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[ 697.477180] usb 1-1: Product: USB Flash Disk
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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Align all bmips devices LED configurations.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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These patches have been accepted for linux v5.13.
External interrupts not supported for now.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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These GPIO keys were assigned to incorrect pins.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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These GPIO keys were assigned to incorrect pins.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Use proper DT binding.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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1. Use upstream accepted NVMEM patches
2. Minor fix for BCM4908 partitioning
3. Support for Linksys firmware partitions on Northstar
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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The original GL.iNet firmware has two different mac addresses in the
factory/art partition. The first one is for the WAN interface only and the
second one is for both lan0 and lan1.
But the original submission for OpenWrt didn't initialize the mac
addresses of the LAN ports for the DSA device at all. The ethernet mac
address was then used for all DSA ports.
Fixes: 050c24f05c85 ("mvebu: add support for GL.iNet GL-MV1000")
Signed-off-by: Sven Eckelmann <sven@narfation.org>
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There are only two lan ports and one wan port on Youku yk1
Fixes: e9baf8265bb8 ("ramips: add support for Youku YK1")
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
[add Fixes:]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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All modifications made by by update_kernel.sh.
Build system: x86_64
Build-tested: ipq806x/R7800
Run-tested: ipq806x/R7800 [only 5.4.107]
No dmesg regressions, everything functional
Run-tested by @timocapa:
- ramips/mt7621/{Xiaomi R3G, Redmi 2100}
- Lantiq/XWAY/Fritz!Box 7320/7330
Signed-off-by: John Audia <graysky@archlinux.us>
[squash, edit commit message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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On NEC Aterm WG1200CR, the MAC address for WAN is printed in the label
on the case, not LAN.
This patch fixes this issue.
Fixes: 50fdc0374b ("ath79: provide label MAC address")
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
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The original patch to support this device advertised support for the reset
button and the "switch" in the commit message. But neither were actually
integrated in the device tree or documented anywere.
The button itself is now used to trigger a reset (as described in the
official GL.iNet documentation). The switch itself is registered as BTN_0
like other devices from GL.iNet in ath79.
Fixes: 050c24f05c85 ("mvebu: add support for GL.iNet GL-MV1000")
Signed-off-by: Sven Eckelmann <sven@narfation.org>
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The CONFIG_USERIO option is unset in multiple target configurations. On
the sunxi target it is activated. Move the kernel configuration option
to the generic kernel configuration.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Instead of deactivating this in every target config, deactivate it once
in the generic kernel config. I was asked for this config option in a
x86 64 build in OpenWrt 21.02.
Fixes: 87046e87e229 ("kernel: add missing kernel config symbol")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Bump to 5.10.26 reversed dependencies on IOMMU for CONFIG_VFIO thus
malta (at least) prompted for this new symbol.
Set it to 'false' in the default config. rockchip & X86 enable it in
target specific configs.
Thanks to Tony Ambardar for falling over this one
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
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This adds detection of the Sophos SG-105 and Sophos XG-105 models
and assignment of ethernet ports these models have to LAN/WAN.
Signed-off-by: Stan Grishin <stangri@melmac.net>
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Automatically refreshed:
ath79/patches-5.10/471-mtd-cfi_cmdset_0002-AMD-chip-0x2201-write-words.patch
bcm63xx/patches-5.10/143-gpio-fix-device-tree-gpio-hogs-on-dual-role-gpio-pin.patch
generic/hack-5.10/204-module_strip.patch
Run-tested:
ath79 (TL-WDR3600)
x86_64 (APU2 - ldir)
Tested-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
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It's helpful for accessing booting data (DTS, kernel, etc.). It has to
be used carefully as CFE's JFFS2 support is quite dumb. It doesn't
recognize deleted files and has problems handling 0 inode.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Populate the recovery and production partitions of the generated sdcard
image for the Bananapi BPi-R64.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Reorder kernel patches after recent backports.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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After backporting upstream ehci overcurrent patches we need to use spurious-oc
instead of ignore-oc.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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These patches have been accepted for v5.13.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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This patch really annoys me, either it needs to go upstream or be
dropped, so it's going to be dropped here.
Checking drivers/platform/x86/pcengines-apuv2.c it also appears to be
incomplete since it mentions different dmi board names depending on bios
version.
/* APU2 w/ legacy BIOS < 4.0.8 */ is 'APU2'
/* APU2 w/ legacy BIOS >= 4.0.8 */ is 'apu2'
/* APU2 w/ mainline BIOS */ is 'PC Engines apu2'
So the patch, if applicable at all, only 'works' for legacy BIOS >=
4.0.8
My APU2 on mainline BIOS reboots fine without this patch. So let's see
if anyone screams and when they do question why legacy bios. If patch
DOES need to be re-introduced then it needs to go upstream first.
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
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Straightforward refresh of patches using update_kernel.
Removed (reverse-applicable):
bmips/patches-5.10/010-v5.11-net-dsa-implement-a-central-TX-reallocation-procedur.patch
Run tested: x86_64 (apu2)
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
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Straightforward refresh of patches using update_kernel.
Run tested: x86_64 (apu2)
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
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Netgear DGND3700v2 / Comtrend VR-3032u internal wireless not supported.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Add support for registering ATH9K PCI fixups needed to bring up wifi on some
devices.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Add support for registering fallback BCMA/SSB B43 SPROMs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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These PCI drivers are a bit hacky and definitely not suitable for upstreaming,
but hopefully we can use them as a base for developing proper upstream PCI
drivers.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Otherwise, the last defined value will be set for all devices.
Fixes: c6c8d597e183 ("realtek: Add generic zyxel_gs1900 image definition")
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Youku YK-L1 has a huge storage space up to 32 MB. It is better to
use a higher spi clock to read or write serial nor flash chips.
Youku YK-L1 has Winbond w25q256fvfg on board that can support
104 MHz spi clock so 48 MHz is safe enough.
The real frequency can only be sysclk(580MHz ) /3 /(2^n) so 80 MHz
defined in dts file will set only 48 MHz in spi bus.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
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Add the same patch to 5.10 too. The patch is in process of being
upstreamed.
Fixes: 8cc0fa8facea ("ath79: cfi: cmdset_0002: amd chip
0x2201 - write words")
Signed-off-by: Mauri Sandberg <sandberg@mailfence.com>
[add Fixes:]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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This device is a wireless router working on 2.4GHz band based on
Qualcom/Atheros AR9132 rev 2 SoC and is accompanied by Atheros AR9103
wireless chip and Realtek RTL8366RB/S switches. Due to two different
switches being used also two different devices are provided.
Specification:
- 400 MHz CPU
- 64 MB of RAM
- 32 MB of FLASH (NOR)
- 3x3:2 2.4 GHz 802.11bgn
- 5x 10/100/1000 Mbps Ethernet
- 4x LED, 3x button, On/Off slider, Auto/On/Off slider
- 1x USB 2.0
- bare UART header place on PCB
Flash instruction:
- NOTE: Pay attention to the switch variant and choose the image to
flash accordingly. (dmesg / kernel logs can tell it)
- Methods for flashing
- Apply factory image in OEM firmware web-gui.
- Sysupgrade on top of existing OpenWRT image
- U-Boot TFPT recovery for both stock or OpenWRT images:
The device U-boot contains a TFTP server that by default has
an address 192.168.11.1 (MAC 02:AA:BB:CC:DD:1A). During the boot
there is a time window, during which the device allows an image to
be uploaded from a client with address 192.168.11.2. The image will
be written on flash automatically.
1) Have a computer with static IP address 192.168.11.2 and the
router device switched off.
2) Connect the LAN port next to the WAN port in the device and the
computer using a network switch.
3) Assign IP 192.168.11.1 the MAC address 02:AA:BB:CC:DD:1A
arp -s 192.168.11.1 02:AA:BB:CC:DD:1A
4) Initiate an upload using TFTP image variant
curl -T <imagename> tftp://192.168.11.1
5) Switch on the device. The image will be uploaded subsequently.
You can keep an eye on the diag light on the device, it should
keep on blinking for a while indicating the writing of the image.
General notes:
- In the stock firmware the MAC address is the same among all
interfaces so it is left here that way too.
Recovery:
- TFTP method
- U-boot serial console
Differences to ar71xx platform
- This device is split in two different targets now due to hardware
being a bit different under the hood. Dynamic solution within the same
image is left for later time.
- GPIOs for a sliding On/Off switch, marked 'Movie engine' on the device
cover, were the wrong way around and were renamed qos_on -> movie_off,
qos_off -> movie_on. Associated key codes remained the same they were.
The device tree source code is mostly based on musashino's work
Signed-off-by: Mauri Sandberg <sandberg@mailfence.com>
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Generally, in upstream CFI flash memory driver uses buffers for write
operations. That does not work with AMD chip with id 0x2201 and we must
resort to writing word sized chunks only. That is, to not apply general
buffer write functionality for this given chip.
Without the patch kernel logs will be flooded with entries like below:
MTD do_erase_oneblock(): ERASE 0x01fa0000
MTD do_write_buffer(): WRITE 0x01fa0000(0x00001985)
MTD do_erase_oneblock(): ERASE 0x01f80000
MTD do_write_buffer(): WRITE 0x01f80000(0x00001985)
MTD do_write_buffer_wait(): software timeout, address:0x01f8000a.
jffs2: Write clean marker to block at 0x01a60000 failed: -5
MTD do_erase_oneblock(): ERASE 0x01f60000
MTD do_write_buffer(): WRITE 0x01f60000(0x00001985)
MTD do_write_buffer_wait(): software timeout, address:0x01f6000a.
jffs2: Write clean marker to block at 0x01a40000 failed: -5
References: http://patchwork.ozlabs.org/project/linux-mtd/patch/20210309174859.362060-1-sandberg@mailfence.com/
Signed-off-by: Mauri Sandberg <sandberg@mailfence.com>
[added link to usptream fix submission]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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1. CFP support for BCM4908
2. Upstream RGMII regs fix
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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It allows bcm4908_enet Linux driver to work more efficiently.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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It's required for sysupgrade which requires:
1. Flashing new firmware
2. Finding updated bootfs partition
3. Updating bootfs content
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Physical port order watched from the back of the device is:
4 / 3 / 2 / 1 / WAN which also matches corresponding leds.
This patch corrects LuCI switch webpage LAN port order.
Signed-off-by: Walter Sonius <walterav1984@gmail.com>
[improve commit title, fix sorting in 02_network]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Ran update_kernel.sh in a fresh clone without any existing toolchains.
Manually rebased:
bcm27xx/950-0993-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
layerscape/701-net-0231-enetc-Use-DT-protocol-information-to-set-up-the-port.patch
Build system: x86_64
Build-tested: ipq806x/R7800
Run-tested: ipq806x/R7800
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
[remove accidental whitespace edit]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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ELECOM WRC-1750GST2 is a 2.4/5 GHz band 11ac (Wi-Fi 5) router, based on
MT7621A.
Specification:
- SoC : MediaTek MT7621A
- RAM : DDR3 256 MiB (NT5CC128M16JR-EK)
- Flash : SPI-NOR 32 MiB (MX25L25645GMI-08G)
- WLAN : 2.4/5 GHz 3T3R (2x MediaTek MT7615)
- Ethernet : 10/100/1000 Mbps x5
- Switch : MediaTek MT7530 (SoC)
- LEDs/Keys : 4x/6x (2x buttons, 1x slide-switch)
- UART : through-hole on PCB
- J4: 3.3V, GND, TX, RX, from ethernet port side
- 57600n8
- Power : 12 VDC, 1.5 A
Flash instruction using factory image:
1. Boot WRC-1750GST2 normally with "Router" mode
2. Access to "http://192.168.2.1/" and open firmware update page
("ファームウェア更新")
3. Select the OpenWrt factory image and click apply ("適用") button
4. Wait ~120 seconds to complete flashing
MAC addresses:
LAN : 04:AB:18:xx:xx:23 (Factory, 0xE000 (hex))
WAN : 04:AB:18:xx:xx:24 (Factory, 0xE006 (hex))
2.4GHz : 04:AB:18:xx:xx:25 (Factory, 0x4 (hex))
5GHz : 04:AB:18:xx:xx:26 (Factory, 0x8004 (hex))
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
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Improve compatibility of the device tree include file. Now a new .dtsi
file will support both PSG1218A, PSG1218B and K2G.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
[improve commit title, rebase]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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From many teardown image in the internet, I find Phicomm K1/k2 series use
Winbond W25Q64/W25Q128 or GigaDevice GD25Q64/GD25Q128 Flash chips. both of
them support 100+ MHz clock spi operate and fast-read instruction. PSG1218
with W25x or GD25x has been tested and it can run well in OpenWrt v19.07.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
[improve commit title]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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HIWIFI HC5x61 devices support high speed spi clock up to 100+ MHz.
So set spi frequency to 80 MHz here (Due to frequency division the
real clock is 48 MHz).
I have tested HC5661 and it can run well in OpenWrt v19.07.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
[adjust commit title and wrap message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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There is an ASMedia ASM1480 PCIe switch found on mt7622-rfb1 and the
BPi-R64, allowing the user to switch between SATA and PCIe1 which share
the same pins on the SoC.
This chip is not present on the Linksys E8450, it doesn't have SATA.
Remove definitions for GPIO90 from DTSI to prevent it from being
copy&pasted or otherwise causing confusion.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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