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* kernel: bump 5.4 to 5.4.192Hauke Mehrtens2022-05-1810-19/+19
| | | | | | | Compile-tested: armvirt/64 Run-tested: armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* kernel: bump 5.4 to 5.4.191Hauke Mehrtens2022-05-1859-217/+111
| | | | | | | | | | | | | | | | Merged upstream: apm821xx/patches-5.4/150-ata-sata_dwc_460ex-Fix-crash-due-to-OOB-write.patch Similar patch merged upstream: bcm27xx/patches-5.4/950-0210-usb-xhci-Disable-the-XHCI-5-second-timeout.patch Manually adapted: layerscape/patches-5.4/801-audio-0008-Revert-ASoC-Remove-dev_err-usage-after-platform_get_.patch Compile-tested: armvirt/64 Run-tested: armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ramips: zbt-wg2626: Add the reset gpio for PCIe port 1Alban Bedel2022-05-011-0/+3
| | | | | | | | | | | | | | The 2.4GHz interface doesn't come up properly with the log showing: mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK) As seen on other MT7621 boards this is caused by a missing reset GPIO. The MT7621 dtsi set GPIO 19 as PCIe reset GPIO, which on this board reset the 5GHz interface on port 0. Add GPIO 8 to the PCIe reset GPIO list to also reset the 2.4GHz interface on port 1. Signed-off-by: Alban Bedel <albeu@free.fr> (cherry picked from commit f953a1a4bfba2fa70c12bb80938aa66481a673b6)
* ipq40xx: fix ar40xx driverNick Hainke2022-04-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is completely based on the work of adron-s: https://github.com/openwrt/openwrt/pull/4721#issuecomment-1101108651 The commit fixes the data corruption on TX packets. Packets are transmitted, but their contents are replaced with zeros. This error is caused by the lack of guard (50 ms) intervals between calibration phases. This error is treated by adding mdelay(50) to the calibration function code. In the original qca-ssda code [0], these mdelays were existing, but in the ar41xx.c they are gone. Tested on: - Fritz!Box 4040 - Fritz!Box 7530 - Mikrotik SXTsq 5AC - ZyXEL NBG6617 - [0] https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk/-/blob/NHSS.QSDK.11.4/src/init/ssdk_init.c#L2072 Suggested-by: Serhii Serhieiev <adron@mstnt.com> Reviewed-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Nick Hainke <vincent@systemli.org> (cherry picked from commit ab7e53e5cce703c7a62efbe1d41fb94c2228a178) [Deleted 5.10 from commit title] Signed-off-by: Nick Hainke <vincent@systemli.org>
* kernel: add missing config symbolsFelix Fietkau2022-04-201-0/+2
| | | | | | | | | MPLS feature symbols are normally only set when kmod-mpls is enabled, but the CONFIG_MPLS symbol they depend on could also have been selected by openvswitch instead Signed-off-by: Felix Fietkau <nbd@nbd.name> (cherry-picked from commit 92add80414c2f39ba8fd0d221d0f37e75fb19951)
* ramips: mt7620: disable SOC VLANs for external switchesMichael Pratt2022-04-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | These boards have AR8327 or QCA8337 external ethernet switch. The SOC also has it's own internal switch where VLAN is now enabled by default. Changes to preinit caused all switches to have VLANs enabled by default even if they are not configured with a topology in uci_defaults (see commit f017f617aecbd47debd4d3a734dc0e471342db96) When both internal and external switches have VLANs, and the external switch has both LAN and WAN, the TX traffic from the SOC cannot flow to the tagged port on the external switch because the VLAN IDs are not matching. So disable the internal switch VLANs by default on these boards. Also, add a topology for the internal switch, so that on LuCI there is not an "unknown topology" warning. In theory, it may be possible to have LAN ports on both switches through internal and external PHYs, but there are no known boards that have this. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 2adeada04558848058105cdad8195848d10d1486)
* ramips: mt7620: ethernet: use more macros and bump versionMichael Pratt2022-04-194-7/+11
| | | | | | | | | | | | | | | | Define and use some missing macros, and use them instead of BIT() or numbers for more readable code. Add comment for a bit change that seems unrelated to ethernet but is actually needed (PCIe Root Complex mode). Remove unknown and unused macro RST_CTRL_MCM (probably from MT7621 / MT7622) This is the last of a series of fixes, so bump version. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 88a0cebadfecb6ebb9f5f535e74f7f7574f513f3)
* ramips: mt7620: fix RGMII TXID PHY modeMichael Pratt2022-04-191-1/+1
| | | | | | | | | | | | | | | the register bits for TX delay and RX delay are opposites: when TX delay bit is set, delay is enabled when RX delay bit is set, delay is disabled So, when both bits are unset, it is RX delay and when both bits are set, it is TX delay Note: TXID is the default RGMII mode of the SOC Fixes: 5410a8e2959a ("ramips: mt7620: add rgmii delays support") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 26c84b2e46caba1ae17bc82a533c99eee65e7004)
* ramips: mt7620: add ephy-disable option to switch driverMichael Pratt2022-04-192-2/+13
| | | | | | | | | | | | | | | Add back the register write to disable internal PHYs as a separate option in the code that can be set using a DTS property. Set the option to true by default when an external mt7530 switch is identified. This makes the driver more in sync with original SDK code while keeping the lines separated into different options to accommodate any board with any PHY layout. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit cc6fd6fbb505071e08011f7998afaffefcf08fd3)
* ramips: mt7620: move mt7620_mdio_mode() to ethernet driverMichael Pratt2022-04-195-74/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function mt7620_mdio_mode is only called once and both the function and mdio_mode block have been named incorrectly, leading to confusion and useless commits. These lines in the mdio_mode block of mt7620_hw_init are only intended for boards with an external mt7530 switch. (see commit 194ca6127ee18cd3a95da4d03f02e43b5428c0bb) Therefore, move lines from mdio_mode to the place in soc_mt7620.c where the type of mt7530 switch is identified, and move lines from mt7620_mdio_mode to a main function. mt7620_mdio_mode was called from mt7620_gsw_init where the priv struct is available, so the lines must stay in mt7620_gsw_init function. In order to keep things as simple as possible, keep the DTS property related function calls together, by moving them from mt7620_gsw_probe to init. Remove the now useless DTS properties and extra phy nodes. Fixes: 5a6229a93df8 ("ramips: remove superfluous & confusing DT binding") Fixes: b85fe43ec8c4 ("ramips: mt7620: add force use of mdio-mode") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 6972e498d33ec896c676b7af91e3bfb00aa846a1)
* ramips: mt7620: use DTS to set PHY base address for external PHYsMichael Pratt2022-04-1924-7/+60
| | | | | | | | | | | | | | | | | | | | | | | | Set the PHY base address to 12 for mt7530 and 8 for others, which is based on the default setting for some devices from printing the register with the following command after it is written to by uboot during the boot cycle. `md 0x10117014 1` PHY_BASE option only uses 5 bits of the register, bits 16 to 20, so use 8-bit integer type. Set the option using the DTS property mediatek,ephy-base and create the gsw node if missing. Also, added a kernel message to display the EPHY base address. Note: If anything is written to a PHY address that is greater than 1 hex char (greater than 0xf) then there is adverse effects with Atheros switches. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 0976b6c4262a11a8d0dab9aeb64f5cdee266c44a)
* ramips: mt7620: allow both internal and external PHYsMichael Pratt2022-04-191-62/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the new variable ephy_base was introduced, it was not applied to the if block for mdio_mode. The first line in the mdio_mode if block sets the EPHY base address to 12 in the SOC by writing a register, but the corresponding variable in the driver was still set to the default of 0. This causes subsequent lines that write registers with the function _mt7620_mii_write to write to PHY addresses 0 through 4 while internal PHYs have been moved to addresses 12 through 16. All of these lines are intended only for PHYs on the SOC internal switch, however, they are being written to external ethernet switches if they exist at those PHY addresses 0 through 4. This causes some ethernet ports to be broken on boards with AR8327 or QCA8337 switch. Other suggested fixes move those lines to the else block of mdio_mode, but removing the else block completely also fixes it. Therefore, move the lines to the mt7620_hw_init function main block, and have only one instance of the function mtk_switch_w32 for writing the register with the EPHY base address. In theory, this also allows for boards that have both external switches and internal PHYs that lead to ethernet ports to be supported. Fixes: 391df3782914 ("ramips: mt7620: add EPHY base mdio address changing possibility") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit de5394a29dae9356a830d043e76591698411e97a)
* ramips: mt7620: fix ethernet driver GMAC port initMichael Pratt2022-04-192-15/+9
| | | | | | | | | | | | | | | | | | | | | | | | A workaround was added to the switch driver to set SOC port 4 as an RGMII GMAC interface based on the DTS property mediatek,port4-gmac. (previously mediatek,port4) However, the ethernet driver already does this, but is being blocked by a return statement whenever the phy-handle and fixed-link properties are both missing from nodes that define the port properties. Revert the workaround, so that both the switch driver and ethernet driver are not doing the same thing and move the phy-handle related lines down so nothing is ending the function prematurely. While at it, clean up kernel messages and delete useless return statements. Fixes: f6d81e2fa1f1 ("mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possible") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit afd60d650e769e9578eac5bb3647807f683aaf7c)
* ramips: mt7620: remove useless GMAC nodesMichael Pratt2022-04-194-27/+4
| | | | | | | | | | | | | | | | | | | | These nodes are used for configuring a GMAC interface and for defining external PHYs to be accessed with MDIO. None of this is possible on MT7620N, only MT7620A, so remove them from all MT7620N DTS. When the mdio-bus node is missing, the driver returns -NODEV which causes the internal switch to not initialize. Replace that return so that everything works without the DTS node. Also, an extra kernel message to indicate for all error conditions that mdio-bus is disabled. Fixes: d482356322c9 ("ramips: mt7620n: add mdio node and disable port4 by default") Fixes: aa5014dd1a58 ("ramips: mt7620n: enable port 4 as EPHY by default") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit a2acdf9607045e5669c305c57dd7c77be8351ba0)
* ramips: mt7620: simplify DTS properties for GMACMichael Pratt2022-04-1941-125/+23
| | | | | | | | | | | | | | | | | | | | There are only 2 options in the driver for the function of mt7620 internal switch port 4: EPHY mode (RJ-45, internal PHY) GMAC mode (RGMII, external PHY) Let the DTS property be boolean instead of string where EPHY mode is the default. Fix how the properties are written for all DTS that use them, and add missing nodes where applicable, and remove useless nodes, and minor DTS formatting. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 953bfe2eb3b7236a72fa41ab2204fdaa9fd09f65)
* ramips: mt7620: enable autonegotiation for all portsGaspare Bruno2022-04-191-0/+1
| | | | | | | | | | This enables autonegotiation for all ephy ports on probe. Some devices do not configure the ports, particularly port 4. Signed-off-by: Gaspare Bruno <gaspare@anlix.io> [replace magic values ; reword commit message] Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 0056ffb468f40f34bea006eb889b70c9a4f562e0)
* ramips: make PHY initialization more descriptiveDavid Bauer2022-04-191-3/+4
| | | | | | | | The basic mode control register of the ESW PHYs is modified in this codeblock. Use the respective macros to make this code more readable. Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 6a15abbc753ca728d798cec9153fc532fce3791d)
* ramips: add support for the Wavlink WL-WN579X3Ben Gainey2022-04-194-0/+227
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | About the device ---------------- SoC: MediaTek MT7620a @ 580MHz RAM: 64M FLASH: 8MB WiFi: SoC-integrated: MediaTek MT7620a bgn WiFi: MediaTek MT7612EN nac GbE: 2x (RTL8211F) BTN: - WPS - Reset - Router/Repeater/AP (3-way slide-switch) LED: - WPS (blue) - 3-segment Wifi signal representation (blue) - WiFi (blue) - WAN (blue) - LAN (blue) - Power (blue) UART: UART is present as Pads with through-holes on the PCB. They are located next to the reset button and are labelled Vcc/TX/RX/GND as appropriate. Use 3.3V, 57600-8N1. Installation ------------ Using the webcmd interface -------------------------- Warning: Do not update to the latest Wavlink firmware (version 20201201) as this removes the webcmd console and you will need to use the serial port instead. You will need to have built uboot/sqauashfs image for this device, and you will need to provide an HTTP service where the image can be downloaded from that is accessible by the device. You cannot use the device manufacturers firmware upgrade interface as it rejects the OpenWrt image. 1. Log into the device's admin portal. This is necessary to authenticate you as a user in order to be able to access the webcmd interface. 2. Navigate to http://<device-ip>/webcmd.shtml - you can access the console directly through this page, or you may wish to launch the installed `telnetd` and use telnet instead. * Using telnet is recommended since it provides a more convenient shell interface that the web form. * Launch telnetd from the form with the command `telnetd`. * Check the port that telnetd is running on using `netstat -antp|grep telnetd`, it is likely to be 2323. * Connect to the target using `telnet`. The username should be `admin2860`, and the password is your admin password. 3. On the target use `curl` to download the image. e.g. `curl -L -O http://<some-other-lan-ip>/openwrt-ramips-mt7620-\ wavlink_wl-wn579x3-squashfs-sysupgrade.bin`. Check the hash using `md5sum`. 4. Use the mtd_write command to flash the image. * The flash partition should be mtd4, but check /sys/class/mtd/mtd4/name first. The partition should be called 'Kernel'. * To flash use the following command: `mtd_write -r -e /dev/mtd<n> write <image-file> /dev/mtd<n>` Where mtd<n> is the Kernel partition, and <image-file> is the OpenWrt image previously downloaded. * The command above will erase, flash and then reboot the device. Once it reboots it will be running OpenWrt. Connect via ssh to the device at 192.168.1.1 on the LAN port. The WAN port will be configured via DHCP. Using the serial port --------------------- The device uses uboot like many other MT7260a based boards. To use this interface, you will need to connect to the serial interface, and provide a TFTP server. At boot follow the bootloader menu and select option 2 to erase/flash the image. Provide the address and filename details for the tftp server. The bootloader will do the rest. Once the image is flashed, the board will boot into OpenWrt. The console is available over the serial port. Signed-off-by: Ben Gainey <ba.gainey@googlemail.com> (cherry picked from commit a509b80065b6680e3e007203084c147f77b6717f)
* ramips: split Youku YK1 to YK-L1 and YK-L1cShiji Yang2022-04-195-12/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device specifications: * Model: Youku YK-L1/L1c * CPU: MT7620A * RAM: 128 MiB * Flash: 32 MiB (YK-L1)/ 16 MiB (YK-L1c) * LAN: 2* 10M/100M Ports * WAN: 1* 10M/100M Port * USB: 1* USB2.0 * SD: 1* MicroSD socket * UART: 1* TTL, Baudrate 57600 Descriptions: Previous supported device YOUKU yk1 is actually Youku YK-L1. Though they look really different, the only hardware difference between the two models is flash size, YK-L1 has 32 MiB flash but YK-L1c has 16MiB. It seems that YK-L1c can compatible with YK-L1's firmware but it's better to split it to different models. It is easy to identify the models by looking at the label on the bottom of the device. The label has the model number "YK-L1" or "YK-L1c". Due to different flash sizes, YK-L1c that using previous YK-L1's firmware needs to apply "force update" to install compatible firmware, so please backup config file before system upgrade. Signed-off-by: Shiji Yang <yangshiji66@qq.com> [use more specific name for DTSI] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit 4a9f389ed2dcee18a5c5e1f0d4e5c406f9290579)
* ramips: improve pinctrl for Youku YK-L1Shiji Yang2022-04-192-16/+4
| | | | | | | | 1. rename led pin "air" to a more common name "wlan" and use "phy0tpt" to trigger it. 2. led "wan" can be triggered by ethernet pinctrl by default so just drop it. Signed-off-by: Shiji Yang <yangshiji66@qq.com> (cherry picked from commit 882a6116d3d6394dd109350287067accebbf6114)
* ramips: speed up spi frequency for Youku YK-L1Shiji Yang2022-04-191-1/+1
| | | | | | | | | | | | Youku YK-L1 has a huge storage space up to 32 MB. It is better to use a higher spi clock to read or write serial nor flash chips. Youku YK-L1 has Winbond w25q256fvfg on board that can support 104 MHz spi clock so 48 MHz is safe enough. The real frequency can only be sysclk(580MHz ) /3 /(2^n) so 80 MHz defined in dts file will set only 48 MHz in spi bus. Signed-off-by: Shiji Yang <yangshiji66@qq.com> (cherry picked from commit bf7ddb18f1bfa0b61b4dc43732c114f20900bd4b)
* ramips: remove obsolete mx25l25635f compatible hackDENG Qingfang2022-04-194-4/+4
| | | | | | | | The kernel bump to 5.4 has removed the mx25l25635f hack, and the mx25l25635f compatible is no longer required. Signed-off-by: DENG Qingfang <dqfext@gmail.com> (cherry picked from commit 06af45ec0502d5cb0529ac46fcb34c4c63394723)
* mvebu: kernel: enable CONFIG_BLK_DEV_NVMEJosef Schlehofer2022-04-191-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_BLK_DEV_NVME [1]: - This is a kernel driver for SSD connected to PCI or PCIe bus [1]. By default, it is enabled for targets "ipq807x", "rockchip/armv8" and "x86/64". With miniPCIe adapter, there is a possibility to connect NVMe disk to Turris Omnia (cortex-a9), Turris MOX (cortex-a53). It allows to boot system from NVMe disk, because of that it can not be kmod package as you can not access the disk to be able to boot from it. CONFIG_NVME_CORE [2]: - This is selected by CONFIG_BLK_DEV_NVME It does not need to be explicitly enabled, but it is done for "ipq807", "x64_64" and rockchip/armv8", which has also enabled the previous config option as well. Kernel increase: ~28k KiB on mamba kernel Reference: [1] https://cateee.net/lkddb/web-lkddb/BLK_DEV_NVME.html [2] https://cateee.net/lkddb/web-lkddb/NVME_CORE.html Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com> (cherry picked from commit 9d530ac4bf6b9804a06dbf5df4631ee86f1304c1) [rebased for config-5.4]
* ath79: Move TPLink WPA8630Pv2 to ath79-tiny targetJoe Mullally2022-04-169-42/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These devices only have 6MiB available for firmware, which is not enough for recent release images, so move these to the tiny target. Note for users sysupgrading from the previous ath79-generic snapshot images: The tiny target kernel has a 4Kb flash erase block size instead of the generic target's 64kb. This means the JFFS2 overlay partition containing settings must be reformatted with the new block size or else there will be data corruption. To do this, backup your settings before upgrading, then during the sysupgrade, de-select "Keep Settings". On the CLI, use "sysupgrade -n". If you forget to do this and your system becomes unstable after upgrading, you can do this to format the partition and recover: * Reboot * Press RESET when Power LED blinks during boot to enter Failsafe mode * SSH to 192.168.1.1 * Run "firstboot" and reboot Signed-off-by: Joe Mullally <jwmullally@gmail.com> Tested-by: Robert Högberg <robert.hogberg@gmail.com> Signed-off-by: Petr Štetiar <ynezz@true.cz> [commit message facelift] (cherry picked from commit 44e1e5d) Signed-off-by: Petr Štetiar <ynezz@true.cz>
* bcm27xx: add AMP2 to HifiBerry DAC+ / DAC+ Pro packageTorsten Duwe2022-04-161-6/+9
| | | | | | | | | | | | | | According to the vendor [1] these HATs share the same DT overlay: hifiberry-dacplus. The PCM512x-compatible control unit is attached to I2C, so the additional snd-soc-pcm512x-i2c kernel module is required. Also explicitly note the Amp2 support to reduce confusion for those users. [1] <https://www.hifiberry.com/docs/software/configuring-linux-3-18-x/> Signed-off-by: Torsten Duwe <duwe@lst.de> (added bcm27xx tag, changed commit message) Signed-off-by: Christian Lamparter <chunkeey@gmail.com> (cherry picked from commit 7ea9936f7f32fd90af1a29775ac3b297d7775db7)
* ath79: add support for MikroTik RouterBOARD mAP liteThibaut VARÈNE2022-04-165-1/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MikroTik RouterBOARD mAPL-2nd (sold as mAP Lite) is a small 2.4 GHz 802.11b/g/n PoE-capable AP. See https://mikrotik.com/product/RBmAPL-2nD for more info. Specifications: - SoC: Qualcomm Atheros QCA9533 - RAM: 64 MB - Storage: 16 MB NOR - Wireless: Atheros AR9531 (SoC) 802.11b/g/n 2x2:2, 1.5 dBi antenna - Ethernet: Atheros AR8229 (SoC), 1x 10/100 port, 802.3af/at PoE in - 4 user-controllable LEDs: · 1x power (green) · 1x user (green) · 1x lan (green) · 1x wlan (green) Flashing: TFTP boot initramfs image and then perform sysupgrade. Follow common MikroTik procedure as in https://openwrt.org/toh/mikrotik/common. Note: following 781d4bfb397cdd12ee0151eb66c577f470e3377d The network setup avoids using the integrated switch and connects the single Ethernet port directly. This way, link speed (10/100 Mbps) is properly reported by eth0. Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> (cherry picked from commit eb38af788180d624e5b37aa5db1fe3766b138dc8)
* ath79: add support for Yuncore A930Thibaut VARÈNE2022-04-162-0/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specification: - QCA9533 (650 MHz), 64 or 128MB RAM, 16MB SPI NOR - 2x 10/100 Mbps Ethernet, with 802.3at PoE support (WAN) - 2T2R 802.11b/g/n 2.4GHz Flash instructions: If your device comes with generic QSDK based firmware, you can login over telnet (login: root, empty password, default IP: 192.168.188.253), issue first (important!) 'fw_setenv' command and then perform regular upgrade, using 'sysupgrade -n -F ...' (you can use 'wget' to download image to the device, SSH server is not available): fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000" sysupgrade -n -F openwrt-...-yuncore_...-squashfs-sysupgrade.bin In case your device runs firmware with YunCore custom GUI, you can use U-Boot recovery mode: 1. Set a static IP 192.168.0.141/24 on PC and start TFTP server with 'tftp' image renamed to 'upgrade.bin' 2. Power the device with reset button pressed and release it after 5-7 seconds, recovery mode should start downloading image from server (unfortunately, there is no visible indication that recovery got enabled - in case of problems check TFTP server logs) Signed-off-by: Clemens Hopfer <openwrt@wireloss.net> Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> (cherry-picked from commit a05dcb07241aa83a4416b56201e31b4af8518981) [switch to mtd-mac-address instead of nvmem-cells]
* ath79: add support for Yuncore XD3200Thibaut VARÈNE2022-04-165-2/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specification: - QCA9563 (775MHz), 128MB RAM, 16MB SPI NOR - 2T2R 802.11b/g/n 2.4GHz - 2T2R 802.11n/ac 5GHz - 2x 10/100/1000 Mbps Ethernet, with 802.3at PoE support (WAN port) LED for 5 GHz WLAN is currently not supported as it is connected directly to the QCA9882 radio chip. Flash instructions: If your device comes with generic QSDK based firmware, you can login over telnet (login: root, empty password, default IP: 192.168.188.253), issue first (important!) 'fw_setenv' command and then perform regular upgrade, using 'sysupgrade -n -F ...' (you can use 'wget' to download image to the device, SSH server is not available): fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000" sysupgrade -n -F openwrt-...-yuncore_...-squashfs-sysupgrade.bin In case your device runs firmware with YunCore custom GUI, you can use U-Boot recovery mode: 1. Set a static IP 192.168.0.141/24 on PC and start TFTP server with 'tftp' image renamed to 'upgrade.bin' 2. Power the device with reset button pressed and release it after 5-7 seconds, recovery mode should start downloading image from server (unfortunately, there is no visible indication that recovery got enabled - in case of problems check TFTP server logs) Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org> (cherry-picked from commit c91df224f54fdd44c9c0487a8c91876f5d273164)
* ramips: fix reboot for remaining 32 MB boardsMichael Pratt2022-04-0818-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following devices have a Winbond W25Q256FV flash chip, which does not have the RESET pin enabled by default, and otherwise would require setting a bit in a status register. Before moving to Linux 5.4, we had the patch: 0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch which kept specific flash chips with explicit 3-byte and 4-byte address modes to stay in 3-byte address mode while idle (after an erase or write) by using a custom flag SPI_NOR_4B_READ_OP that was part of the patch. this was obsoleted by the patch: 481-mtd-spi-nor-rework-broken-flash-reset-support.patch which uses the newer upstream flag SNOR_F_BROKEN_RESET for devices with a flash chip that cannot be hardware reset with RESET pin and therefore must be left in 3-byte address mode when idle. The new patch requires that the DTS of affected devices have the property "broken-flash-reset", which was not yet added for most of them. This commit adds the property for remaining affected devices in ramips target, specifically because of the flash chip model. However, it is possible that there are other devices where the flash chip uses an explicit 4-byte address mode and the RESET pin is not connected to the SOC on the board, and those DTS would also need this property. Ref: 22d982ea0033 ("ramips: add support for switching between 3-byte and 4-byte addressing") Ref: dfa521f12953 ("generic: spi-nor: rework broken-flash-reset") Signed-off-by: Michael Pratt <mcpratt@pm.me> [pepe2k@gmail.com: backported to 21.02] Fixes: #9655, #9636, #9547 Signed-off-by: Piotr Dymacz <pepe2k@gmail.com> (backported from commit 74516f4357d281f093f0daac01c4c5c239acc443)
* kernel: bump 5.4 to 5.4.188Hauke Mehrtens2022-04-0714-52/+47
| | | | | | | | | | | | | | Added the new configuration options: CONFIG_HARDEN_BRANCH_HISTORY=y CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y Manually adapted: target/linux/generic/hack-5.4/220-gc_sections.patch Compile-tested: lantiq/xrx200, armvirt/64 Run-tested: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ath79: migrate Archer C5 5GHz radio device pathsJan-Niklas Burfeind2022-03-311-0/+1
| | | | | | | | | | | | When upgrading a TP-Link Archer C5 v1 from ar71xx to ath79, the 5ghz radio stops working because the device path changed. Same has been done for the Archer C7 before: commit e19506f20618 ("ath79: migrate Archer C7 5GHz radio device paths") Signed-off-by: Jan-Niklas Burfeind <git@aiyionpri.me> (cherry picked from commit c6eb63d48f942f1e54737ed182776cf9a08de542)
* ath79: fix label MAC address for Ubiquiti UniFi AP Outdoor+Matthias Schiffer2022-03-303-2/+4
| | | | | | | | | | The label has the MAC address of eth0, not the WLAN PHY address. We can merge the definition back into ar7241_ubnt_unifi.dtsi, as both DTS derived from it use the same interface for their label MAC addresses after all. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> (cherry picked from commit aee9ccf5c1b536189ebee8c232273657334da843)
* apm821xx: fix crash/panic related to SATA/SSD choiceChristian Lamparter2022-03-261-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ticerex on the OpenWrt Forum reported a gnarly crash when he was using Samsung 840 and 850 EVOs with his MyBook Live: | BUG: Kernel NULL pointer dereference at 0x00000000 | Faulting instruction address: 0xc03ed4b8 | Oops: Kernel access of bad area, sig: 11 [#1] | BE PAGE_SIZE=4K PowerPC 44x Platform | CPU: 0 PID: 362 Comm: scsi_eh_1 Not tainted 5.4.163 #0 | NIP: c03ed4b8 LR: c03d27e8 CTR: c03ed36c | REGS: cfa59950 TRAP: 0300 Not tainted (5.4.163) | MSR: 00021000 <CE,ME> CR: 42000222 XER: 00000000 | DEAR: 00000000 ESR: 00000000 | GPR00: c03d27e8 cfa59a08 cfa55fe0 00000000 0fa46bc0 [...] | [..] | NIP [c03ed4b8] sata_dwc_qc_issue+0x14c/0x254 | LR [c03d27e8] ata_qc_issue+0x1c8/0x2dc | Call Trace: | [cfa59a08] [c003f4e0] __cancel_work_timer+0x124/0x194 (unreliable) | [cfa59a78] [c03d27e8] ata_qc_issue+0x1c8/0x2dc | [cfa59a98] [c03d2b3c] ata_exec_internal_sg+0x240/0x524 | [cfa59b08] [c03d2e98] ata_exec_internal+0x78/0xe0 | [cfa59b58] [c03d30fc] ata_read_log_page.part.38+0x1dc/0x204 | [cfa59bc8] [c03d324c] ata_identify_page_supported+0x68/0x130 | [...] This turned out this is an issue with upstream changing ATA_TAG_INTERNAL's value from 31 to 32 during 4.18 release. Update "SATA_DWC_QCMD_MAX" to account for that. Link: https://forum.openwrt.org/t/my-book-live-duo-reboot-loop/122464 Signed-off-by: Christian Lamparter <chunkeey@gmail.com> (cherry picked from commit 5ac672cfab60e90ab8a0bf3491fa2a27619d22d6)
* mvebu: SFP backports for GPON modulesMarek Behún2022-03-2615-31/+262
| | | | | | | | | | | | | | | This backports the following upstream Linux patches net: sfp: add mode quirk for GPON module Ubiquiti U-Fiber Instant net: sfp: relax bitrate-derived mode check net: sfp: cope with SFPs that set both LOS normal and LOS inverted for 5.4 for mvebu platform. This fixes GPON modules: Ubiquiti U-Fiber Instant SFP GPON VSOL V2801F CarlitoxxPro CPGOS03-0490 v2.0 Signed-off-by: Marek Behún <marek.behun@nic.cz>
* ath79: fix link for long cables with OCEDO RaccoonDavid Bauer2022-03-261-1/+12
| | | | | | | | | | The OCEDO Raccoon had significant packet-loss with cables longer than 50 meter. Disabling EEE restores normal operation. Also change the ethernet config to reduce loss on sub-1G links. Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 4551bfd91f31be5987727c77e58333fa06ba3acd)
* ath79: fix TPLINK_HWREV field for TL-WR1043ND v4Matthias Schiffer2022-03-251-0/+1
| | | | | | | | | | | Required to allow sysupgrades from OpenWrt 19.07. Closes #7071 Fixes: 98fbf2edc021 ("ath79: move TPLINK_HWID/_HWREV to parent for tplink-safeloader") Tested-by: J. Burfeind <git@aiyionpri.me> Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> (cherry picked from commit 8ba71f1f6f2359f9cf54201e9fc037df33f123c0)
* sunxi: cortexa7: fix ethernet link detection on a20-olinuxino-lime2Petr Štetiar2022-03-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | a20-olinuxino-lime2 is currently having hard time with link detection of certain 1000Mbit partners due to usage of generic PHY driver, probably due to following missing workaround introduced in upstream in commit 3aed3e2a143c ("net: phy: micrel: add Asym Pause workaround"): The Micrel KSZ9031 PHY may fail to establish a link when the Asymmetric Pause capability is set. This issue is described in a Silicon Errata (DS80000691D or DS80000692D), which advises to always disable the capability. This patch implements the workaround by defining a KSZ9031 specific get_feature callback to force the Asymmetric Pause capability bit to be cleared. This fixes issues where the link would not come up at boot time, or when the Asym Pause bit was set later on. As a20-olinuxino-lime2 has Micrel KSZ9031RNXCC-TR Gigabit PHY since revision H, so we need to use Micrel PHY driver on those devices. Signed-off-by: Petr Štetiar <ynezz@true.cz> (cherry picked from commit ffa1088f63267f817a3adf34c84b8e8089b1a938)
* mvebu: udpu: include LM75 kmod by defaultRobert Marko2022-03-241-1/+1
| | | | | | | | | | uDPU has 2 LM75 compatible temperature sensors, so include the driver for them by default in order to utilize them. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Petr Štetiar <ynezz@true.cz> [rebase] (cherry picked from commit a8b2d3590329386d0ae6873460b2d5126f63ddaa) (cherry picked from commit b9e90935db8e0c0166c80fc6e5e50755282e9e0b)
* mvebu: udpu: fix initramfs bootingRobert Marko2022-03-241-1/+1
| | | | | | | | | | | | uDPU provides a FIT based initramfs, but currently gets stuck after U-boot starts the kernel at "Starting kernel..". It is due to the load address being too low, so increase it in order to get the initramfs booting again. Signed-off-by: Robert Marko <robert.marko@sartura.hr> (cherry picked from commit 80f21e53360d52d493c51a4a263d9b7607b7494e) (cherry picked from commit d65269a732d82ca9d084c89d6ca05d125d4ab629)
* ath79: fix label MAC address for Ubiquiti UniFiMatthias Schiffer2022-03-243-4/+2
| | | | | | | The label has the MAC address of eth0, not the WLAN PHY address. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> (cherry picked from commit 2a02b7049966dc77ae9519ca165f29b75e0dbf0e)
* ramips: remove kmod-mt7663-firmware-sta from device packagesFelix Fietkau2022-03-231-2/+2
| | | | | | | | | This firmware should only be used for mobile devices (e.g. laptops), where AP mode functionality is typically not used. This firmware supports a lot of power saving offload functionality at the expense of AP mode support. Signed-off-by: Felix Fietkau <nbd@nbd.name> (cherry picked from commit a1ac8728f80314c574201013e7fea58536c2b3ee)
* kernel: backport DSA patches fixing null-pointer dereferenceMarek Behún2022-03-212-0/+143
| | | | | | | | | | | | [ backport of master commit fbe2c3feaa4ef5747a691cb4c808925b024ff450 ] Backport patches 381a730182f1 ("net: dsa: Move VLAN filtering syncing out of dsa_switch_bridge_leave") 108dc8741c20 ("net: dsa: Avoid cross-chip syncing of VLAN filtering") from upstream (currently in net-next) to fix null-pointer dereference. Signed-off-by: Marek Behún <marek.behun@nic.cz> Signed-off-by: Petr Štetiar <ynezz@true.cz> [master commit detail]
* bcm4908: include U-Boot in imagesRafał Miłecki2022-03-141-3/+32
| | | | | | | This is a step forward in adding support for devices with U-Boot. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 34fd5e325af5cbcb64696c9b4b1660f22299790f)
* x86: legacy: enable pata_sis driverMatthias Schiffer2022-03-101-0/+1
| | | | | | | | | This driver is needed to boot from CompactFlash on the Siemens Futro S400. The device has an AMD NX1500 CPU, which seems to be unsupported by the geode subtarget, so it must use legacy. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> (cherry picked from commit c8350dfb3cdee7653744bbb4ee3b0ac1b015912c)
* bcm4908: support "rootfs_data" on U-Boot devicesRafał Miłecki2022-03-073-13/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | 1. Create "rootfs_data" dynamicaly U-Boot firmware images can contain only 2 UBI volumes: bootfs (container with U-Boot + kernel + DTBs) and rootfs (e.g. squashfs). There is no way to include "rootfs_data" UBI volume or make firmware file tell U-Boot to create one. For that reason "rootfs_data" needs to be created dynamically. Use preinit script to handle that. Fire it right before "mount_root" one. 2. Relate "rootfs_data" to flashed firmware As already explained flashing new firmware with U-Boot will do nothing to the "rootfs_data". It could result in new firmware reusing old "rootfs_data" overlay UBI volume and its file. Users expect a clean state after flashing firmware (even if flashing the same one). Solve that by reading flash counter of running firmware and storing it in "rootfs_data" UBI volume. Every mismatch will result in wiping old data. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 93259e8ca261c7965618fe11c2d385638da5cfa6)
* bcm4908: fix USB PHY supportRafał Miłecki2022-03-071-0/+147
| | | | | | | This fixes problem with USB PHY not handling some USB 3.0 devices. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 0dbcefdd5229daacf6cd4c9996b8e6f31c90ffd1)
* kernel: bump 5.4 to 5.4.182Hauke Mehrtens2022-03-0620-64/+35
| | | | | | | | | | | | | | The following patch was integrated upstream: target/linux/bcm4908/patches-5.4/180-i2c-brcmstb-fix-support-for-DSL-and-CM-variants.patch All other updated automatically. The new config option CONFIG_BPF_UNPRIV_DEFAULT_OFF is now handled too. Compile-tested on: lantiq/xrx200, armvirt/64 Runtime-tested on: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ipq806x: base-files: asrock: fix bootcount includePetr Štetiar2022-02-281-1/+1
| | | | | | | | | | | | | | | | Fixes following warning message during image building process: Finalizing root filesystem... root-ipq806x/lib/upgrade/asrock.sh: line 1: /lib/functions.sh: No such file or directory Enabling boot root-ipq806x/lib/upgrade/asrock.sh: line 1: /lib/functions.sh: No such file or directory Enabling bootcount Fixes #9350 Fixes: 98b86296e67d ("ipq806x: add support for ASRock G10") Signed-off-by: Petr Štetiar <ynezz@true.cz> (cherry picked from commit fc317a190c930c9c338bd07c2e323b6b9eaa1f07)
* Revert "ramips: increase spi-max-frequency for ipTIME mt7620 devices"Sungbo Eo2022-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | This reverts commit 13a185bf8acb67da4a68873e560876c0e60b1a87. There was a report that one A1004ns device fails to detect its flash chip correctly: [ 1.470297] spi-nor spi0.0: unrecognized JEDEC id bytes: e0 10 0c 40 10 08 [ 1.484110] spi-nor: probe of spi0.0 failed with error -2 It also uses a different flash chip model: * in my hand: Winbond W25Q128FVSIG (SOIC-8) * reported: Macronix MX25L12845EMI-10G (SOP-16) Reducing spi-max-frequency solved the detection failure. Hence revert. Reported-by: Koasing <koasing@gmail.com> Tested-by: Koasing <koasing@gmail.com> Signed-off-by: Sungbo Eo <mans0n@gorani.run> (cherry picked from commit 9968a909c248169064446ed40e66d18986d93d11)
* ipq806x: base-files: asrock: fix bootcount includePetr Štetiar2022-02-261-5/+2
| | | | | | | | | | | | | | | | | | | | | | | Fixes following error while executing the init script on the buildhost: Enabling boot ./etc/init.d/bootcount: line 5: /lib/upgrade/asrock.sh: No such file or directory Enabling bootcount While at it fix following shellcheck issue: base-files/etc/init.d/bootcount line 11: if [ $? -eq 0 ]; then ^-- SC2181: Check exit code directly with e.g. 'if mycmd;', not indirectly with $?. Fixes: #9345 Cc: Ansuel Smith <ansuelsmth@gmail.com> Cc: Pawel Dembicki <paweldembicki@gmail.com> Cc: Christian Lamparter <chunkeey@gmail.com> Fixes: 98b86296e67d ("ipq806x: add support for ASRock G10") References: https://gitlab.com/ynezz/openwrt/-/jobs/1243290743#L1444 Signed-off-by: Petr Štetiar <ynezz@true.cz> (cherry picked from commit ce8af0ace04bb43e8156940c771b4058fa83d27a)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-09 22:28:40 +0000