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* Rename 'atheros' target to 'ath25'Felix Fietkau2015-03-1323-1/+1
| | | | | | | | Rename 'atheros' target to more precise 'ath25'. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44736
* atheros: remove odd board check during image buildFelix Fietkau2015-03-131-2/+0
| | | | | | Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44735
* atheros: remove linux 3.14Felix Fietkau2015-03-1314-6586/+0
| | | | | | Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44734
* atheros: switch to 3.18Felix Fietkau2015-03-131-1/+1
| | | | | | Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44733
* atheros: v3.18: renumber backported patchesFelix Fietkau2015-03-133-0/+0
| | | | | | | | | | Move first 3 patches to 0xx numbers range to denote that this is backported code and they should be removed when we update kernel to version >= 3.19 Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44732
* atheros: v3.18: non-functional cleanupFelix Fietkau2015-03-136-413/+321
| | | | | | | | | | To finally sync code with upsream cleanup registers headers, and update several comments and kernel config symbols descriptions. No functional changes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44731
* atheros: v3.18: cleanup includesFelix Fietkau2015-03-139-75/+53
| | | | | | | | Remove odd and add missed includes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44730
* atheros: v3.18: rearrange code between patchesFelix Fietkau2015-03-139-344/+587
| | | | | | | | | Cleanup board patch by moving code to specific patches, and factor out leds to separate patch. No functional changes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44729
* atheros: v3.18: move GPIO patches behind PCIFelix Fietkau2015-03-133-6/+8
| | | | | | | | | Move GPIO patches behind PCI patch, since they are not yet merged upstream. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44728
* atheros: v3.18: switch to IRQ domainFelix Fietkau2015-03-136-136/+196
| | | | | | | | Rework MISC and PCI IRQ controllers code to use IRQ domains and bitops. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44727
* atheros: v3.18: update register namesFelix Fietkau2015-03-134-204/+201
| | | | | | | | | | | | Make register names more consistent, mostly add appropriate prefix (AR5312_ or AR2315_) or _BASE suffix. Also add macro to simplify mask and shift operation. No functional changes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44726
* atheros: v3.18: remap flash for boardconfig parsingFelix Fietkau2015-03-134-77/+74
| | | | | | | | Rework boardconfig handling code to honestly remap flash memory region. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44725
* atheros: v3.18: make registers headers localFelix Fietkau2015-03-133-28/+15
| | | | | | | | | | There are no external users (last one was PCI driver) for these headers, so move them to arch directory. Few macroses from ar231x.h header moved to devices.h and file was removed. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44724
* atheros: v3.18: remap main SoC MMR memoryFelix Fietkau2015-03-134-203/+252
| | | | | | | | | | Honestly remap main SoC MMR mem and use accessor functions to interact with registers. Now registers defined relatively to base address (e.g. SDRAM controller base address). Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44723
* atheros: v3.18: cleanup register headersFelix Fietkau2015-03-131-58/+6
| | | | | | | | | | AFAIK, no one AR2315+ chip (AR2315, AR2316, AR2317, AR2318) does not contain IR block, so remove IR registers definitions. Also remove few unused macroses. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44722
* atheros: v3.18: pass PCI IRQ and I/O mem via resourcesFelix Fietkau2015-03-131-15/+56
| | | | | | | | | | Pass PCI IRQ and I/O memory ranges via platform device resources, this change makes PCI controller driver independed from arch headers, so also remove few includes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44721
* atheros: v3.18: remap PCI controller MMR memoryFelix Fietkau2015-03-132-50/+88
| | | | | | | | | Honestly remap PCI controller MMR and use accessor functions to interact with registers. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44720
* atheros: v3.18: add context container for PCI driverFelix Fietkau2015-03-131-53/+70
| | | | | | | | | Add container and place all context specific variables and structure to it. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44719
* atheros: v3.18: move PCI enable code to archFelix Fietkau2015-03-131-21/+23
| | | | | | | | | Move PCI host interface enable code to arch, since it touches generic SoC registers outside the PCI MMR region. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44718
* atheros: v3.18: rearrange PCI regs definitionsFelix Fietkau2015-03-132-93/+104
| | | | | | | | | Move PCI controller configuration registers from generic header to driver source. No functional changes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44717
* atheros: v3.18: relocate PCI host DMA base definitionFelix Fietkau2015-03-131-10/+9
| | | | | | | | | | Put AR2315_PCI_HOST_SDRAM_BASEADDR macro to DMA header, since this is arbitrary value and not some hw specific constant. Also this relocation decouples dma from HW specific header. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44716
* atheros: v3.18: rework early initializationFelix Fietkau2015-03-132-51/+40
| | | | | | | | | | Do not use prom_init() callback, do memory initialization in plat_mem_setup() callback and move serial port configuration to arch_initcall stage. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44715
* atheros: v3.18: rearrange interrupt handling functionsFelix Fietkau2015-03-132-72/+72
| | | | | | | | No functional changes, just change functions order in source file. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44714
* atheros: v3.18: change calls logicFelix Fietkau2015-03-134-67/+41
| | | | | | | | | | | Check SoC family (AR5312+ or AR2315+) before call instead of checking it inside the called function. Also convert ar{5312,2315}_init_device() function to void, since they both return zero and nobody care about return value. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44713
* atheros: v3.18: update names and declarationsFelix Fietkau2015-03-136-233/+211
| | | | | | | | | | | Sync functions, variables and enums names with upstream. Mostly replace 'ar231x_' prefix by 'ath25_'. No functional changes, except few 'int' -> 'unsigned' changes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44712
* atheros: v3.18: cleanup cpu-feature-overrides.hFelix Fietkau2015-03-131-21/+1
| | | | | | | | Remove mention of undefined features. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44711
* atheros: v3.18: remove eth platform device unused fieldFelix Fietkau2015-03-134-12/+8
| | | | | | | | | Ethernet controller driver don't use boarddata directly, so remove corresponding field from its platform device structure. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44710
* atheros: v3.18: remove odd header reset.hFelix Fietkau2015-03-131-9/+0
| | | | | | | | | This header provides prototype for function without realization and users. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44709
* atheros: v3.18: rename platform headerFelix Fietkau2015-03-134-8/+8
| | | | | | | | Rename ar231x_platform.h to ath25_platform.h Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44708
* atheros: v3.18: rename kernel platform to ath25Felix Fietkau2015-03-136-78/+78
| | | | | | | | | | Rename platform source directory and asm includes directory. No functional changes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44707
* atheros: v3.18: rename ATHEROS_AR231X symbol to ATH25Felix Fietkau2015-03-1312-24/+24
| | | | | | | | | | This patch starts upsteam ath25 code backporting. No functional changes. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44706
* atheros: add v3.18 supportFelix Fietkau2015-03-1314-0/+6590
| | | | | | Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> SVN-Revision: 44705
* kernel: backport fib_trie improvements/fixes from 4.0-rcFelix Fietkau2015-03-1225-0/+6099
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 44695
* ar71xx: Ext LNA patch for TUBE2H and HORNET-UB targetsJohn Crispin2015-03-122-0/+10
| | | | | | Signed-off-by: Christophe Prévotaux <c.prevotaux@rural-networks.com> SVN-Revision: 44693
* ar71xx: Hornet UB GPIO WPS/ResetJohn Crispin2015-03-121-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This problem has existed at least since Attitude Adjustment and is also present in trunk. Basically on the Hornet-UB board the functionality of RESET and WPS have "switched places". There are two tickets about the issue at dev.openwrt.org, The solution suggested on them both is incomplete though and introduces the following proglem: Patching as suggested on #14136/#15282 will result in a situation where simply pressing the RESET button on the bottom will cause FACTORY RESET to be run. This is due to GPIO high/low state being incorrect as a result of the above change and virtually the RESET button is in the pressed-down state the entire time. When it is then physically pressed, that causes the opposite, release, to be triggered and since to the board it seemed that the button was pressed long before it was released, the FACTORY RESET results. The attached patch works as expected. I have verified both the incorrect functionality as well as after fixing the issue as described in the patch and flashing the resulting firmware to a Hornet-UB board. Signed-off-by: Janne Cederberg <janne.cederberg@gmail.com> SVN-Revision: 44692
* ralink: resize the flash partition for FireWRTJohn Crispin2015-03-121-2/+2
| | | | | | Signed-off-by: wengbj <fl.service@t-firefly.com> SVN-Revision: 44691
* ralink: MT7621 add i2c controller driverJohn Crispin2015-03-122-1/+409
| | | | | | | | ralink i2c driver is not working on MT7621 platform. Porting a new drivers from MTK's source code. Signed-off-by: daixj <fl.service@t-firefly.com> SVN-Revision: 44690
* cobalt: framebuffer device has movedJohn Crispin2015-03-121-1/+1
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44686
* kernel: backport symbol export from r44653 to 3.14Felix Fietkau2015-03-111-0/+21
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 44681
* bcm53xx: fixup early device id 8012Rafał Miłecki2015-03-112-2/+4
| | | | | | | | Looks like the BCM53012 has a similar problem to the BCM53011. Signed-off-by: Ian Kent <raven@themaw.net> SVN-Revision: 44680
* bcm53xx: fix typo in bcm47xx sprom driverRafał Miłecki2015-03-111-1/+1
| | | | | | | | Fix thinko' in the bcm47xx sprom driver. Signed-off-by: Ian Kent <raven@themaw.net> SVN-Revision: 44679
* kenrel: refresh patchesJohn Crispin2015-03-1110-270/+270
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44678
* lantiq: make the new dwc2 support only work for vr9John Crispin2015-03-111-4/+5
| | | | | | | | danube needs to be added Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44677
* lantiq: Convert Zyxel P-2812HNU-FX and TP-Link TD-W8970 to support dwc2John Crispin2015-03-113-1/+19
| | | | | | | | | | | | | | Here the device tree entry for ifxhcd is listed as compatible with one supported in dwc2 (after patching the dwc driver appropriately). A second entry is added to support the second core of the hcd. This entry is listed to be compatible with only dwc2. Done this way there should be backwards support for both hcd drivers (ltq-hcd and dwc2) Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44676
* lantiq: Use platform endianness when accessing dwc2 registersJohn Crispin2015-03-111-0/+3184
| | | | | | | | | | | | | | | | | | | | This patch switches calls to readl/writel to their dwc2_readl/dwc2_writel equivalents which preserve platform endianness. This patch is necessary to access dwc2 registers correctly on big endian systems such as the mips based SoCs made by Lantiq. Then dwc2 can be used to replace ifx-hcd driver for Lantiq platforms found e.g. in OpenWrt. The patch was autogenerated with the following commands: $EDITOR core.h sed -i "s/\<readl\>/dwc2_readl/g" *.c hcd.h hw.h sed -i "s/\<writel\>/dwc2_writel/g" *.c hcd.h hw.h Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44675
* lantiq: Add sensible hw-defaults for dwc2John Crispin2015-03-111-0/+45
| | | | | | | | | | | Lantiq driver does not work with autodetected fifo sizes so use ones from original ltq-hcd driver in dwc2. Other values can be autodetected. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44674
* lantiq: Configure gpio power output pin when initializing dwc2 usbJohn Crispin2015-03-111-0/+35
| | | | | | | | | Port gpio code from original ltq-hcd driver to dwc2. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44673
* lantiq: Add usb initialization bits from ltq-hcd to platform initJohn Crispin2015-03-111-0/+95
| | | | | | | | | | | | | | Add VR9 specific usb initialization bits from ltq-hcd to platform initialization. This patch is more of a proof-of-concept than production quality since the initialization registers are different on other lantiq platforms. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44672
* cobalt: rename config fileJohn Crispin2015-03-111-0/+0
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44668
* ar71xx: improve WD's My Net Wi-fi Range Extender image creationJohn Crispin2015-03-112-3/+13
| | | | | | | | | | | | | Previously, the generated images for the My Net Wi-fi Range Extender wouldn't always work (and panic) due to the fixed mtd offsets and sizes for the kernel and rootfs. This patch fixes the problem by utilizing the shared Cybertan's partition parser to recalculate the mtd partitions for every image dynamically everytime. Reported-by: Pascal Paradis <peparadis@yahoo.com> Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> SVN-Revision: 44665
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