| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
| |
Like in the previous patches for various targets, this removes
the "devicename" from LED labels in rtl838x, as it's useless and
only creates complexity.
Since the target is fresh and so far only system LEDs were added,
this does not add a migration script.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
|
|
|
|
|
|
|
| |
The syntax of the shared SoC DTSI file determines the DTS version,
so no need to repeat the "/dts-v1/;" identifier in every file.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
|
|
|
|
| |
Signed-off-by: John Crispin <john@phrozen.org>
|
|
|
|
|
|
|
| |
Fix wrong magic number verification for FW files.
Correct handling of external RTL8218B firmware PHY name in firmware.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
|
|
|
|
|
|
|
|
|
| |
The router profile installs many packages unnecessary for
the operation of a typical ethernet switch. Instead of creating
an empty switch profile upfront, use the basic profile until
a set of common packages crystallizes.
Signed-off-by: Andreas Oberritter <obi@saftware.de>
|
|
|
|
|
|
|
|
| |
Fixes long delay on boot when booting from flash. The driver waits
for one minute for userspace to load firmware, before it becomes
available.
Signed-off-by: Andreas Oberritter <obi@saftware.de>
|
|
|
|
|
|
|
|
| |
This adds basic support for reading the internal PHYs of the RTL839x SoCs
and full support for the 2 PHYs connected to the 1000Base-X SerDes of
the RTL8393 SoC.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
|
|
|
|
|
|
|
| |
This adds correct interrupt routing settings for IRQs on the RTL839x SoCs.
It also speeds up irq handling based on work by biot for all SoCs.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
|
|
|
|
|
|
|
| |
SPDX moved from GPL-2.0 to GPL-2.0-only and from GPL-2.0+ to
GPL-2.0-or-later. Reflect that in the SPDX license headers.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
|
|
|
|
|
|
|
|
|
|
|
|
| |
All modifications made by update_kernel.sh/no manual intervention needed
Run-tested: ipq806x (R7800), ath79 (Archer C7v5), x86/64
No dmesg regressions, everything appears functional
Signed-off-by: John Audia <graysky@archlinux.us>
[add run test from PR]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
|
|
|
|
|
|
|
|
| |
Assign return value of kstrtoul to error variable instead of
conversion value.
Suggested-by: Birger Koblitz <git@birger-koblitz.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
|
|
|
|
|
|
| |
Use "make kernel_oldconfig" to update and sort target config.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
|
|
|
|
|
|
| |
Seems like leftovers from development, remove them.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
|
|
|
|
|
|
|
| |
Do some minor empty lines cleanup, i.e. remove those at EOF and
add some for cosmetic reasons/consistency.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
|
|
This adds support for the RTL838x Architecture.
SoCs of this type are used in managed and un-managed Switches and Routers
with 8-28 ports. Drivers are provided for SoC initialization, GPIOs, Flash,
Ethernet including a DSA switch driver and internal and external PHYs used
with these switches.
Supported SoCs:
RTL8380M
RTL8381M
RTL8382M
The kernel will also boot on the following RTL839x SoCs, however driver
support apart from spi-nor is missing:
RTL8390
RTL8391
RTL8393
The following PHYs are supported:
RTL8214FC (Quad QSGMII multiplexing GMAC and SFP port)
RTL8218B internal: internal PHY of the RTL838x chips
RTL8318b external (QSGMII 8-port GMAC phy)
RTL8382M SerDes for 2 SFP ports
Initialization sequences for the PHYs are provided in the form of
firmware files.
Flash driver supports 3 / 4 byte access
DSA switch driver supports VLANs, port isolation, STP and port mirroring.
The ALLNET ALL-SG8208M is supported as Proof of Concept:
RTL8382M SoC
1 MIPS 4KEc core @ 500MHz
8 Internal PHYs (RTL8218B)
128MB DRAM (Nanya NT5TU128MB)
16MB NOR Flash (MXIC 25L128)
8 GBEthernet ports with one green status LED each (SoC controlled)
1 Power LED (not configurable)
1 SYS LED (configurable)
1 On-Off switch (not configurable)
1 Reset button at the right behind right air-vent (not configurable)
1 Reset button on front panel (configurable)
12V 1A barrel connector
1 serial header with populated standard pin connector and with markings
GND TX RX Vcc(3.3V), connection properties: 115200 8N1
To install, upload the sysupgrade image to the OEM webpage.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
|