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* realtek: 5.15: Improve error handling in rtl838x_pie_rule_write()Pascal Ernster2023-01-051-6/+10
| | | | | | | In target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/rtl838x.c, make rtl838x_pie_rule_write() return non-zero value case of error. Signed-off-by: Pascal Ernster <git@hardfalcon.net>
* realtek: 5.15: Improve rtl838x dsa driver error handlingPascal Ernster2023-01-051-24/+32
| | | | | | | | | Make sure functions calling rtl838x_smi_wait_op() return its return value in target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/rtl838x.c. This brings the code style in line with the rtl839x implementation. Suggested-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Pascal Ernster <git@hardfalcon.net>
* realtek: return correct error value for phy opsPascal Ernster2023-01-051-2/+2
| | | | | | | | | | | | | | | | | | | | | A behavioural change was introduced with commit 758c88b96963 ("realtek: Whitespace and codestyle cleanup") causing rtl838x_read_phy() and rtl838x_write_phy() to unconditionally return -ETIMEDOUT. As a result, probing the device during boot fails: Error setting up netdev, freeing it again. rtl838x-eth: probe of 1b00a300.ethernet failed with error -5 Fix the bootloop caused by this regression with kernel 5.15 on rtl838x devices, by properly returning 0 on success. Tested on a Netgear GS108T v3, a Netgear GS310TP v1, a Zyxel GS1900-8HP v1 and an HPE 1920-8G. Fixes: 758c88b969639d0e6b684669d2e54dd1be3102f4 ("realtek: Whitespace and codestyle cleanup") Tested-by: Stijn Segers <foss@volatilesystems.org> Tested-by: Jan Hoffmann <jan@3e8.eu> Signed-off-by: Pascal Ernster <git@hardfalcon.net>
* realtek: Migrate to upstream generic MIPS addressesOlliver Schinagl2023-01-053-4/+4
| | | | | | | | | | Upstream generic MIPS uses 0x80100000 and 0x80100400 for the LOADADDR and ENTRY addresses. As we do not want to diverge from upstream and patch upstream when not needed, adjust our addresses as well to be future proof. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Tested-by: Jan Hoffmann <jan@3e8.eu> # HPE 1920-8G, HPE 1920-48G
* realtek: Migrate to libdeflateOlliver Schinagl2023-01-023-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | Libdeflate is a more advanced gzip compressor, which allows for faster decompression, higher compression speed (factor 3-4), while being fully gzip compatible. Some comparison gzip | libdeflate-gzip | delta | image [openwrt-realtek-rtl839x-*] --------+-----------------+--------+----------------------------------------------- 6589174 | 6298794 | 290380 | d-link_dgs-1210-52-initramfs-kernel.bin 6291632 | 6029488 | 262144 | d-link_dgs-1210-52-squashfs-factory_image1.bin 6292270 | 6030128 | 262142 | d-link_dgs-1210-52-squashfs-sysupgrade.bin 6589142 | 6298760 | 290382 | zyxel_gs1900-48-initramfs-kernel.bin 6292264 | 6030122 | 262142 | zyxel_gs1900-48-squashfs-sysupgrade.bin and changing lzma to (libdeflate-)gzip on existing rtl930x target: gzip | libdeflate-gzip | delta | image [openwrt-realtek-rtl930x-*] --------+-----------------+--------+-------------------------------------- 6816230 | 6510382 | 305848 | zyxel_xgs1250-12-initramfs-kernel.bin Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Reviewed-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Rosen Penev <rosenp@gmail.com> Reviewed-by: Sander Vanheule <sander@svanheule.net>
* realtek: Disable boston clockOlliver Schinagl2023-01-018-8/+4
| | | | | | | We are not on the 'boston' platform so no point in having that clock driver enabled. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* realtek: deduplicate GS1900 recipesSander Vanheule2022-12-283-23/+18
| | | | | | | | | | ZyXEL GS1900 devices with SoCs from both the RTL838x and RTL839x families share the same image structure and size of the firmware partition. Additionally, the GS1900-48 recipe provided a parameter for the zyxel-vers command, but this parameter is not used. Deduplicate the recipes by moving it to target/linux/realtek/image/common.mk. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: fix GS1900-48 firwmare partitionSander Vanheule2022-12-283-5/+5
| | | | | | | | | | The listed partition size doesn't match the original partition size, and actually overlaps with the following partition. The partition node name for the "firmware" partition also has an extra 'b' compared to the partition offset. Fixes: 47f5a0a3eed5 ("realtek: Add support for ZyXEL GS1900-48 Switch") Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: fix ZYXELS_VERS for GS1900-48Sander Vanheule2022-12-281-1/+1
| | | | | | | | | | | | | | | | | The GS1900-48 firmware image is identified by the 'AAHN' ID, while the GS1900-48HP is identified by 'AAHO' [1]. The latter was used, resulting in the following error message when upgrading via the stock web UI: Device only can support firmware from V1.00(AAHN.0) and later version Fix image generation by using the correct ID. [1] https://download.zyxel.com/GS1900-48/firmware/GS1900-48_2.70(AAHN.3)C0_2.pdf Link: https://forum.openwrt.org/t/146533 Fixes: 47f5a0a3eed5 ("realtek: Add support for ZyXEL GS1900-48 Switch") Suggested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: fix default image generationSander Vanheule2022-12-281-3/+3
| | | | | | | | | | | | While cleaning up the makefiles for the realtek target, the order of the default image generating commands was accidentally changed. This caused the image signature to end up somewhere in the middle, misaligning the rootfs. As a result, sysupgrade couldn't verify upgrade images anymore, and devices end up in a boot loop due to the unaligned (and not found) rootfs. Fixes: 94d8b4852b9f ("realtek: Cleanup Makefiles") Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: Fix reset register accessBirger Koblitz2022-12-282-2/+2
| | | | | | | | | | | The reset register on RTL93xx not merely have bits to execute a reset of a hardware component, but also configuration bits for reset procedures. Keep them during executing a reset. Signed-off-by: Birger Koblitz <git@birger-koblitz.de> Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> [backport to 5.10 kernel] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: Reduce variable scopesOlliver Schinagl2022-12-2712-443/+335
| | | | | | | | | | | | | | Linus prefers to have loop initializers nice and tightly scoped. In OpenWRT this has been possible since 41a1a652fbd4 ("kernel: backport gnu11 upgrade"). This patch cleans up variable scope while trying to do the above for 'simple for loops'. This cleans up and simplifies some functions and code, and pulls in variables to a smaller scope. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* realtek: Cleanup MakefilesOlliver Schinagl2022-12-279-31/+110
| | | | | | | Our current Makefiles a little bit messy and can be improved somewhat, both in whitespace and in style. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* realtek: Replace C++ style commentsOlliver Schinagl2022-12-2720-964/+966
| | | | | | | The only exception to C++ style comments are SPDX license identifier markers at the start of C files (even headers have C style markers). Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* realtek: Whitespace and codestyle cleanupOlliver Schinagl2022-12-2725-810/+767
| | | | | | | | Fix some ugly whitepsaces and codestyle issues around the realtek sources. While this is by no means perfect, it catches what it caught. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* realtek: add cond_resched to loops accessing the FDB tableJan Hoffmann2022-12-274-0/+12
| | | | | | | | | A full loop accessing all FDB entries can take several milliseconds (on RTL839x about 20 ms), so give other kernel tasks a chance to run. This is especially important for rtl83xx_port_fdb_dump which is itself called in a loop for all ports by the kernel. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: restructure rtl_table_read/writeJan Hoffmann2022-12-274-28/+62
| | | | | | | | | | | | | | | | These two functions are identical apart from writing different values to the read/write bit. Create a new function rtl_table_exec to reduce code duplication. Also replace the unbounded busy-waiting loop. The new implementation may sleep, but as the hardware typically responds before the first poll, any callers doing many table accesses still need to make sure not to block other kernel tasks themselves. So far, polling timeout errors are only handled by logging an error, but a return value is added to allow proper handling in the future. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: simplify log messages in rtl83xx_mdio_probeJan Hoffmann2022-12-272-14/+2
| | | | | | | | | | This function currently prints three messages for every switch port at KERN_INFO level. This takes a considerable amount of time during bootup and can even trigger an external watchdog. Replace these log messages by a single one at KERN_DEBUG level. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: don't set L2LEARNING flag in rtl83xx TX headerJan Hoffmann2022-12-272-4/+4
| | | | | | | | | | | | | | | | | | | As learning for the CPU port is now disabled globally, the bit in the TX header doesn't have any effect anymore. Remove it to make the header consistent with the global configuration. Originally, this change was intended to be applied before commit eb456aedfe24 ("realtek: use assisted learning on CPU port"), which is why the commit message incorrectly mentions that the TX header already disables learning. The reason for disabling learning on the CPU port in the first place is that it doesn't work correctly when packets are trapped to the CPU and then forwarded by the CPU to other ports. In that case, the switch would incorrectly learn the CPU port as source. An example that triggered this issue are Multicast Listener Reports and IGMP membership reports. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: 5.15: Fix incorrect switch patchesOlliver Schinagl2022-12-241-0/+53
| | | | | | | | | Add correct header to patche(s) to be correctly used by git am and have better tracking of it. See commit f1f97db627b2 ("realtek: Convert incorrect v5.10 patches"). Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* realtek: 5.10: Fix incorrect switch patchesOlliver Schinagl2022-12-241-0/+53
| | | | | | | | | Add correct header to patche(s) to be correctly used by git am and have better tracking of it. See commit f1f97db627b2 ("realtek: Convert incorrect v5.10 patches"). Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* kernel: bump 5.15 to 5.15.84John Audia2022-12-191-1/+1
| | | | | | | | | | All patches automatically rebased Build system: x86_64 Build-tested: bcm2711/RPi4B Run-tested: bcm2711/RPi4B Signed-off-by: John Audia <therealgraysky@proton.me>
* realtek: add Linux Kernel 5.15 as testing versionINAGAKI Hiroshi2022-12-151-0/+1
| | | | | | | | | | | | | | | | Add Linux Kernel 5.15 support for testing. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> [APRESIA ApresiaLightGS120GT-SS, Panasonic Switch-M24eG PN28240K, Switch-M48eG PN28480K] Tested-by: INAGAKI Hiroshi <musashino.open@gmail.com> TP-Link TL-SG2008P Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [D-Link DGS-1210-20, DGS-1210-52, Zyxel XGS1010-12] Tested-by: Markus Stockhausen <markus.stockhausen@gmx.de> [Zyxel XGS1250-12] Tested-by: Lucian Cristian <lucian.cristian@gmail.com> # Zyxel [HPE 1920-8G, 1920-48G] Tested-by: Jan Hoffmann <jan@3e8.eu>
* realtek: enable needs_standalone_vlan_filtering on DSA driver in 5.15INAGAKI Hiroshi2022-12-151-0/+1
| | | | | | | To configure VLAN 0, enable needs_standalone_vlan_filtering option of dsa_switch struct. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: update dsa.c of DSA driver for 5.15INAGAKI Hiroshi2022-12-151-101/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - rtl83xx_vlan_filtering() "struct switchdev_trans *trans" parameter was removed[1] and "struct netlink_ext_ack *extack" was added[2]. [1]: https://www.spinics.net/lists/netdev/msg712250.html [2]: https://www.spinics.net/lists/netdev/msg722496.html - rtl83xx_vlan_add/del() vlan->vid_begin and vlan->vid_end were removed and vlan->vid was added[3]. [3]: https://www.spinics.net/lists/netdev/msg712248.html - rtl83xx_vlan_prepare() "port_vlan_prepare" member was removed from "dsa_switch_ops" struct in dsa.h[4] and vlan_prepare function should be called from vlan_add function. Also, change return type of vlan_add function to int. [4]: https://www.spinics.net/lists/netdev/msg712252.html - rtl83xx_port_mdb_add() "port_mdb_prepare" member in "dsa_switch_ops" struct was removed and preparation need to be done in the function of "port_mdb_add" member instead. And also, int type need to be returned on "port_mdb_add" member[5]. [5]: https://www.spinics.net/lists/netdev/msg712251.html - rtl83xx_port_pre_bridge_flags(), rtl83xx_port_bridge_flags() The current "port_pre_bridge_flags" member and "port_bridge_flags" member in "dsa_switch_ops" in dsa.h has flags of "struct switchdev_brport_flags" type instead[6], so adjust to it. And, the changed features are passed by flags.mask[7] in rtl83xx_port_bridge_flags(), so check it before calling function to enable/disable fieature. [6]: https://lore.kernel.org/lkml/20210212151600.3357121-7-olteanv@gmail.com/ [7]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e18f4c18ab5b0dd47caaf8377c2e36d66f632a8c Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> [shorten final return statement of rtl83xx_port_mdb_add()] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: update platform support for 5.15INAGAKI Hiroshi2022-12-152-6/+2
| | | | | | | | | | - fw_passed_dtb and others were replaced to get_fdt() function[1] - __appended_dtb defined by asm/bootinfo.h[2] [1]: https://www.spinics.net/lists/linux-mips/msg03332.html [2]: https://www.spinics.net/lists/linux-mips/msg03332.html Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: refresh config-5.15 in all subtargetsINAGAKI Hiroshi2022-12-154-92/+123
| | | | | | Refresh config-5.15 in all subtargets by kernel_menuconfig. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: refresh patches in 5.15INAGAKI Hiroshi2022-12-1532-126/+121
| | | | | | Adjust patches for kernel 5.15. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: drop patches of upstreamed fix and changes from 5.15INAGAKI Hiroshi2022-12-154-1113/+0
| | | | | | | | | | - 007-5.16-gpio-realtek...: upstreamed on 5.16 and backported to 5.15.3 - 708-brflood-spi.patch : upstreamed - 709-lag-offloading.patch: upstreamed - 713-v5.12-net-dsa-... : upstreamed and some implementations are replaced Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: drop patches of upstreamed drivers from 5.15INAGAKI Hiroshi2022-12-156-1091/+0
| | | | | | | | | | | The following drivers were upstreamed and available on 5.15, so drop from OpenWrt tree. - realtek-otto-gpio (5.13) - realtek-rtl-spi (5.12) - realtek-rtl-intc (5.12) Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: copy dts/files/patches/configs for 5.15INAGAKI Hiroshi2022-12-15139-0/+39485
| | | | | | | | Copy dts/files/patches/configs from 5.10 to 5.15. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> [refresh with updated DGS-1210 dts files] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: update GPIO bindings for DGS-1210-10PJan-Niklas Burfeind2022-12-091-4/+26
| | | | | | | | | | | | | | | | add three missing LEDs - PoE-Max - Link/Act - PoE add two missing buttons - mode - reset The last was dropped in commit 61a3d0075b15 ("realtek: update GPIO bindings in the dts files in dts-5.10") Signed-off-by: Jan-Niklas Burfeind <git@aiyionpri.me>
* realtek: d-link: add support for dgs-1210-28mp-fAndreas Böhler2022-12-084-90/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | General hardware info: ---------------------- D-Link DGS-1210-28MP rev. F1 is a switch with 24 ethernet ports and 4 combo ports, all ports Gbit capable. It is based on a RTL8382 SoC @ 500MHz, DRAM 128MB and 32MB flash. 24 ethernet ports are 802.3af/at PoE capable with a total PoE power budget of 370W. Power over Ethernet: -------------------- The PSE hardware consists of three BCM59121 PSE chips, serving 8 ports each. They are controlled by a Nuvoton MCU. In order to enable PoE, the realtek-poe package is required. It is installed by default, but currently it requires the manual editing of /etc/config/poe. Keep in mind that the port number assignment does not match on this switch, alway 8 ports are in reversed order: 8-1, 16-9 and 24-17. LEDs and Buttons: ----------------- On stock firmware, the mode button is supposed to switch the LED indicators of all port LEDs between Link Activity and PoE status. The currently selected mode is visualized using the respective LEDs. PoE Max indicates that the maximum PoE budget has been reached. Since there is currently no support for this behavior, these LEDs and the mode button can be used independently. Serial connection: ------------------ The UART for the SoC (115200 8N1) is available via unpopulated standard 0.1" pin header marked J6. Pin1 is marked with arrow and square. Pin 1: Vcc 3.3V Pin 2: Tx Pin 3: Rx Pin 4: Gnd OEM installation from Web Interface: ------------------------------------ 1. Make sure you are booting using OEM in image 2 slot. If not, switch to image2 using the menus System > Firmware Information > Boot from image2 Tools > reboot 2. Upload image in vendor firmware via Tools > Backup / Upgrade Firmware > image1 3. Toogle startup image via System > Firmware Information > Boot from image1 4. Tools > reboot Other installation methods not tested, but since the device shares the board with the DGS-1210-28, the following should work: Boot initramfs image from U-Boot: --------------------------------- 1. Press Escape key during `Hit Esc key to stop autoboot` prompt 2. Press CTRL+C keys to get into real U-Boot prompt 3. Init network with `rtk network on` command 4. Load image with `tftpboot 0x8f000000 openwrt-rtl838x-generic-d-link_dgs-1210-28mp-f-initramfs-kernel.bin` command 5. Boot the image with `bootm` command Signed-off-by: Andreas Böhler <dev@aboehler.at>
* realtek: fix dell typoJan-Niklas Burfeind2022-12-011-3/+3
| | | | | | | should be add/delete or abbreviated add/del Signed-off-by: Jan-Niklas Burfeind <git@aiyionpri.me> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
* realtek: refactor keep vlan tag setup, fix tagged forwardingLuiz Angelo Daros de Luca2022-12-017-23/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in dsa.c:rtl83xx_port_enable() was trying to set vlan_port_tag_sts_ctrl while dealing with differences between SoCs. However, not only that register has a different address, the register structure and even the 2-bit value semantic changes for each SoC. The vlan_port_tag_sts_ctrl field was dropped and converted into a vlan_port_keep_incoming_tag_set() function that abstracts the different between SoCs. The macro referencing that register migrated to the SoC specific c file as it will be privately used by each file. All magic numbers were converted into macros using BITMASK and FIELD_PREP. The vlan_port_tag_sts_ctrl debugfs was dropped for now as it is already broken for rtl93xx. The best place for SoC specific code might be in each respective c file and not in if/else clauses. The final result is: rtl838x: set ITAG_STS=TAGGED, same as before rtl839x: set ITAG_STS=TAGGED instead of IGR_P_ITAG_KEEP=0x1, fixing forwarding of tagged packets rtl930x: set EGR_ITAG_STS=TAGGED instead of IGR_P_ITAG=0x1, possibly fixing forwarding of tagged packets rtl931x: set EGR_ITAG_STS=TAGGED instead of OTPID_KEEP=0x1, possibly fixing forwarding of tagged packets Without (EGR_)ITAG_STS=TAGGED, at least for rtl839x, forwarded packets will drop the vlan tag while packets from the CPU will still have the correct tag. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
* realtek: Fix rtl930x speed status accessorOlliver Schinagl2022-12-011-3/+3
| | | | | | | | | | | | | | The rtl930x speed status registers require 4 bits to indicate the speed status. As such, we want to divide by 8. To make things consistent with the rest of this code, use a bitshift however. This bug probably won't affect many users yet, as there aren't many rtl930x switches in the wild yet with more then 10 ports, and thus a low-impact bugfix. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> [also fix port field extraction] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: fix typo in debug messageLuiz Angelo Daros de Luca2022-11-051-2/+2
| | | | | | vid_end was mentioned twice. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
* realtek: mark clock source as continuousSander Vanheule2022-11-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | After replacing the R4K event timer and clock source with the new Realtek Otto timer, performance for RTL839x devices was severely impacted, as reported by Hiroshi. Research by Markus showed that after commit 4657a5301eb5 ("realtek: avoid busy waiting for RTL839x PHY read/write"), the ethernet driver could only update a phy once per timer interval, which also heavily impacted boot time. On e.g. a Zyxel GS1900-48, this added around a minute to the time to fully initialise the switch. By marking the otto clocksource as continuous, the kernel enables it to be used for high resolution timers. This allows readx_poll_timeout() to sleep for less than one system timer interval, reducing system dead time. Link: https://github.com/openwrt/openwrt/issues/11117 Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com> Cc: Markus Stockhausen <markus.stockhausen@gmx.de> Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: INAGAKI Hiroshi <musashino.open@gmail.com> # Panasonic Switch-M48eG PN28480K Tested-by: Jan Hoffmann <jan@3e8.eu> # HPE 1920-8G, HPE 1920-48G
* target/realtek: use netif_receive_skb_listRosen Penev2022-11-011-1/+4
| | | | | | Small performance improvement on rx. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* realtek: Fix CRC offloading for rtl83xxOlliver Schinagl2022-10-291-1/+1
| | | | | | | | | | | In rtl83xx_set_features we set bit 3 to enable, and bit 4 to disable checksuming. Looking at rtl93xx_set_features we however see that for both enable and disable the same bit is used (bit 4). This can't be right, especially as bit 4 for rtl83xx seems to be Collision threshold occupying 2 bits. Change this to make this more logical. Fixes: 9e8d62e42117 ("realtek: enable CRC offloading") Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* realtek: use assisted learning on CPU portJan Hoffmann2022-10-262-0/+22
| | | | | | | | | | | | | | | | | | | | L2 learning on the CPU port is currently not consistently configured and relies on the default configuration of the device. On RTL83xx, it is disabled for packets transmitted with a TX header, as hardware learning corrupts the forwarding table otherwise. As a result, unneeded flooding of traffic for the CPU port can already happen on some devices now. It is also likely that similar issues exist on RTL93xx, which doesn't have a field to disable learning in the TX header. To address this, disable hardware learning for the CPU port globally on all devices. Instead, enable assisted learning to let DSA write FDB entries to the switch. For now, this does not sync local/bridge entries to the switch. However, support for that was added in Linux 5.14, so the next switch to a newer kernel version is going to fix this. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: set up L2 table entries properlyJan Hoffmann2022-10-261-10/+19
| | | | | | | | | | | | | | | | | | | | | | | Initialize the data structure using memset to avoid the possibility of writing garbage values to the hardware. Always set a valid entry type, which should fix writing unicast entries on RTL930x. For unicast entries, set the is_static flag to prevent the switch from aging them out. Also set the rvid field for unicast entries. This is not strictly necessary, as the switch fills it in automatically from a non-zero vid. However, this makes the code consistent with multicast entry setup. While at it, reorder the statements and fix some style issues (double space, comma instead of semicolon at end of statement). Also remove the unneeded priv parameter and debug print for the multicast entry setup function. Fixes: cde31976e37 ("realtek: Add support for Layer 2 Multicast") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: 5.10: refresh kernel patchesChristian Marangi2022-10-251-1/+1
| | | | | | | | | Refresh kernel patches for realtek 5.10 kernel Refreshed patch: - 300-mips-add-rtl838x-platform.patch Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
* realtek: consistently flood RMA framesSander Vanheule2022-10-231-30/+40
| | | | | | | | | | | | | | | | The switches support different actions for incoming ethernet multicast frames with Reserved Multicast Addresses (01-80-C2-00-00-{01-2F}). The current code will set the 2-bit action field to FLOOD (0x3) for most classes, but the highest bit is always unset for the relevant control registers. This means the DROP (0x1) action being used for these classes; whatever class the MSB happens to be in. For RTL838x, this results in {20,23-2F} frames being dropped, instead of flooding all ports. On other switch generations, {0F,1F,2F} frames are dropped. This is inconsistent, and appears to be a mistake. Remove this inconsistency by flooding all multicast frames with RMA addresses. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: remove RTL839x path in RTL838x multicastSander Vanheule2022-10-231-19/+14
| | | | | | | | | | | | | | The multicast setup function rtl838x_eth_set_multicast_list() checks if the current SoC is a RTL839x family device. However, the function is only included in the RTL838x ops table, so this path should never be taken, making this dead code. rtl839x_eth_set_multicast_list() is already present in the RTL839x ops table, so it should be safe to remove this branch. While touching the code, also re-sort the functions to match sorting elsewhere, with rtl838x coming before rtl839x. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: reduce excessive logging for FDB operationsJan Hoffmann2022-10-232-68/+3
| | | | | | | | | | | | Currently several messages at KERN_INFO level are printed for every FDB del/dump operation. This can cause a significant slowdown for example while using "bridge fdb", and may even trigger a watchdog. Remove most of these log messages, as the new L2 table debugfs node should be a good replacement. Change the remaining messages to KERN_DEBUG level. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: add debugfs node for L2 tableJan Hoffmann2022-10-231-0/+107
| | | | | | | This allows to view all unicast and multicast entries that are currently in the L2 hash table and the CAM. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: avoid busy waiting for RTL839x PHY read/writeJan Hoffmann2022-10-231-12/+33
| | | | | | | Switch to a polling implementation similar to the one for RTL838x, to allow other kernel tasks to run while waiting. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: disable otto timer for RTL93xx targetsMarkus Stockhausen2022-10-232-0/+2
| | | | | | | | | The new timer is not yet ready for all targets. Avoid interactive questions during build Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> [rename symbol to CONFIG_REALTEK_OTTO_TIMER] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: timer driver: activate for RTL839X devicesMarkus Stockhausen2022-10-233-7/+12
| | | | | | | | | Use the new timer driver for the RTL839X devices and remove the no longer needed modules. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> [correct timer compatible order, update selected symbols] Signed-off-by: Sander Vanheule <sander@svanheule.net>
generated by cgit v1.2.3 (git 2.25.1) at 2025-02-05 23:15:47 +0000