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* realtek: add support for Panasonic Switch-M48eG PN28480KINAGAKI Hiroshi2022-08-062-0/+391
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Panasonic Switch-M48eG PN28480K is a 48 + 4 port gigabit switch, based on RTL8393M. Specification: - SoC : Realtek RTL8393M - RAM : DDR3 128 MiB (Winbond W631GG8KB-15) - Flash : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G) - Ethernet : 10/100/1000 Mbps x48 + 2 - port 1-40 : TP, RTL8218B x5 - port 41-48 : RTL8218FB - port 41-44: TP - port 45-48: TP/SFP (Combo) - LEDs/Keys : 7x / 1x - UART : RS-232 port on the front panel (connector: RJ-45) - 3:TX, 4:GND, 5:GND, 6:RX (pin number: RJ-45) - 9600n8 - Power : 100-240 VAC, 50/60 Hz, 0.5 A - Plug : IEC 60320-C13 - Stock OS : VxWorks based Flash instruction using initramfs image: 1. Prepare the TFTP server with the IP address 192.168.1.111 2. Rename the OpenWrt initramfs image to "0101A8C0.img" and place it to the TFTP directory 3. Download the official upgrading firmware (ex: pn28480k_v30000.rom) and place it to the TFTP directory 4. Boot M48eG and interrupt the U-Boot with Ctrl + C keys 5. Execute the following commands and boot with the OpenWrt initramfs image rtk network on tftpboot 0x81000000 bootm 6. Backup mtdblock files to the computer by scp or anything and reboot 7. Interrupt the U-Boot and execute the following commands to re-create filesystem in the flash ffsmount c:/ ffsfmt c:/ this step takes a long time, about ~ 4 mins 8. Execute the following commands to put the official images to the filesystem updatert <official image> example: updatert pn28480k_v30000.rom this step takes about ~ 40 secs 9. Set the environment variables of the U-Boot by the following commands setenv loadaddr 0xb4e00000 setenv bootcmd 'sleep 10; bootm;' saveenv 'sleep 10;' is required as dummy to execute 'bootm' command correctly 10: Download the OpenWrt initramfs image and boot with it tftpboot 0x81000000 0101A8C0.img bootm 11: On the initramfs image, download the sysupgrade image and perform sysupgrade with it sysupgrade <imagename> 12: Wait ~ 120 seconds to complete flashing Known Issues: - 4x SFP ports are provided as combo ports by the RTL8218FB chip, but the phy driver has no support for it. Currently, only TP ports work by the RTL8218B support. Note: - "Switch-M48eG" is a model name, and "PN28480K" is a model number. Switch-M48eG has an another (old) model number ("PN28480"), it's not a Realtek based hardware. - Switch-M48eG has a "POWER" LED (Green), but it's not connected to any GPIO pin. - U-Boot checks the runtime images in the flash when booting and fails to execute "bootcmd" variable if the images are not existing. - A filesystem is formed in the flash (0x100000-0x1DFFFFF) on the stock firmware and it includes the stock images, configuration files and checksum files. It's unknown format, can't be managed on the OpenWrt. To get the enough space for OpenWrt, move the filesystem to the head of "fs_reserved" partition by execution of "ffsfmt" and "updatert". - A GPIO pin on PCA9539 is used for resetting external RTL8218B phys and RTL8218FB phy. This should be specified as "reset-gpios" property in MDIO node, but the current configuration of RTL8218B phy in the driver seems to be incomplete and RTL8218FB won't be configured on RTL8218D support. So, ethernet ports on these phys will be broken after hard-resetting. At the moment, configure this pin as gpio-hog to avoid breaking by resetting. - This model has 2x Microchip TCN75A thermal sensors. Linux Kernel supports TCN75 chip on lm75 driver, but no support for TCN75'A' variant. At the moment, use TCN75 support for the chips instead. Back to the stock firmware: 1. Delete "loadaddr" variable and set "bootcmd" to the original value on U-Boot: setenv loadaddr setenv bootcmd 'ffsrdm c:/runtime.had 0x81000000;alphadec c:/runtime.had 0x81000240 0x80010000;' on OpenWrt: fw_setenv loadaddr fw_setenv bootcmd 'ffsrdm c:/runtime.had 0x81000000;alphadec c:/runtime.had 0x81000240 0x80010000;' 2. Perform reset or reboot on U-Boot: reset on OpenWrt: reboot Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: enable pca953x GPIO driver for rtl839x subtargetINAGAKI Hiroshi2022-08-061-0/+3
| | | | | | | | | The system status LED on Panasonic Switch-M48eG PN28480K is connected to a PCA9539PW. To use the LED as a status LED of OpenWrt while booting, enable the pca953x driver and built-in to the kernel. Also enable CONFIG_GPIO_PCA953X_IRQ to use interrupt via RTL83xx GPIO. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: add support for Panasonic Switch-M24eG PN28240KINAGAKI Hiroshi2022-08-062-0/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Panasonic Switch-M24eG PN28240K is a 24 + 2 port gigabit switch, based on RTL8382M. Specification: - SoC : Realtek RTL8382M - RAM : DDR3 128 MiB (Winbond W631GG8KB-15) - Flash : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G) - Ethernet : 10/100/1000 Mbps x24 + 2 - port 1-8 : TP, RTL8218B - port 9-16 : TP, RTL8218B (SoC) - port 17-24 : RTL8218FB - port 17-22: TP - port 23-24: TP/SFP (Combo) - LEDs/Keys : 7x / 1x - UART : RS-232 port on the front panel (connector: RJ-45) - 3:TX, 4:GND, 5:GND, 6:RX (pin number: RJ-45) - 9600n8 - Power : 100-240 VAC, 50/60 Hz, 0.5 A - Plug : IEC 60320-C13 - Stock OS : VxWorks based Flash instruction using initramfs image: 1. Prepare the TFTP server with the IP address 192.168.1.111 2. Rename the OpenWrt initramfs image to "0101A8C0.img" and place it to the TFTP directory 3. Download the official upgrading firmware (ex: pn28240k_v30000.rom) and place it to the TFTP directory 4. Boot M24eG and interrupt the U-Boot with Ctrl + C keys 5. Execute the following commands and boot with the OpenWrt initramfs image rtk network on tftpboot 0x81000000 bootm 6. Backup mtdblock files to the computer by scp or anything and reboot 7. Interrupt the U-Boot and execute the following commands to re-create filesystem in the flash ffsmount c:/ ffsfmt c:/ this step takes a long time, about ~ 4 mins 8. Execute the following commands to put the official images to the filesystem updatert <official image> example: updatert pn28240k_v30000.rom this step takes about ~ 40 secs 9. Set the environment variables of the U-Boot by the following commands setenv loadaddr 0xb4e00000 setenv bootcmd bootm saveenv 10: Download the OpenWrt initramfs image and boot with it tftpboot 0x81000000 0101A8C0.img bootm 11: On the initramfs image, download the sysupgrade image and perform sysupgrade with it sysupgrade <imagename> 12: Wait ~ 120 seconds to complete flashing Known Issues: - 2x SFP ports are provided as combo ports by the RTL8218FB chip, but the phy driver has no support for it. Currently, only TP ports work by the RTL8218D support. Note: - "Switch-M24eG" is a model name, and "PN28240K" is a model number. Switch-M24eG has an another (old) model number ("PN28240"), it's not a Realtek based hardware. - Switch-M24eG has a "POWER" LED (Green), but it's not connected to any GPIO pin. - U-Boot checks the runtime images in the flash when booting and fails to execute "bootcmd" variable if the images are not existing. - A filesystem is formed in the flash (0x100000-0x1DFFFFF) on the stock firmware and it includes the stock images, configuration files and checksum files. It's unknown format, can't be managed on the OpenWrt. To get the enough space for OpenWrt, move the filesystem to the head of "fs_reserved" partition by execution of "ffsfmt" and "updatert". - A GPIO pin on PCA9539 is used for resetting external RTL8218B phy and RTL8218FB phy. This should be specified as "reset-gpios" property in MDIO node, but the current configuration of RTL8218B phy in the phy driver seems to be incomplete and RTL8218FB won't be configured on RTL8218D support. So, ethernet ports on these phys will be broken after hard-resetting. At the moment, configure this pin as gpio-hog to avoid breaking by resetting. Back to the stock firmware: 1. Delete "loadaddr" variable and set "bootcmd" to the original value on U-Boot: setenv loadaddr setenv bootcmd 'bootm 0x81000000' on OpenWrt: fw_setenv loadaddr fw_setenv bootcmd 'bootm 0x81000000' 2. Perform reset or reboot on U-Boot: reset on OpenWrt: reboot Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: add support for Panasonic Switch-M16eG PN28160KINAGAKI Hiroshi2022-08-063-0/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Panasonic Switch-M16eG PN28160K is a 16 + 2 port gigabit switch, based on RTL8382M. Specification: - SoC : Realtek RTL8382M - RAM : DDR3 128 MiB (Winbond W631GG8KB-15) - Flash : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G) - Ethernet : 10/100/1000 Mbps x16 + 2 - port 1-8 : TP, RTL8218B (SoC) - port 9-16 : RTL8218FB - port 9-14: TP - port 15-16: TP/SFP (Combo) - LEDs/Keys : 7x / 1x - UART : RS-232 port on the front panel (connector: RJ-45) - 3:TX, 4:GND, 5:GND, 6:RX (pin number: RJ-45) - 9600n8 - Power : 100-240 VAC, 50/60 Hz, 0.5 A - Plug : IEC 60320-C13 - Stock OS : VxWorks based Flash instruction using initramfs image: 1. Prepare the TFTP server with the IP address 192.168.1.111 2. Rename the OpenWrt initramfs image to "0101A8C0.img" and place it to the TFTP directory 3. Download the official upgrading firmware (ex: pn28160k_v30003.rom) and place it to the TFTP directory 4. Boot M16eG and interrupt the U-Boot with Ctrl + C keys 5. Execute the following commands and boot with the OpenWrt initramfs image rtk network on tftpboot 0x81000000 bootm 6. Backup mtdblock files to the computer by scp or anything and reboot 7. Interrupt the U-Boot and execute the following commands to re-create filesystem in the flash ffsmount c:/ ffsfmt c:/ this step takes a long time, about ~ 4 mins 8. Execute the following commands to put the official images to the filesystem updatert <official image> example: updatert pn28160k_v30003.rom this step takes about ~ 40 secs 9. Set the environment variables of the U-Boot by the following commands setenv loadaddr 0xb4e00000 setenv bootcmd bootm saveenv 10: Download the OpenWrt initramfs image and boot with it tftpboot 0x81000000 0101A8C0.img bootm 11: On the initramfs image, download the sysupgrade image and perform sysupgrade with it sysupgrade <imagename> 12: Wait ~ 120 seconds to complete flashing Known Issues: - 2x SFP ports are provided as combo ports by the RTL8218FB chip, but the phy driver has no support for it. Currently, only TP ports work by the RTL8218D support. Note: - "Switch-M16eG" is a model name, and "PN28160K" is a model number. Switch-M16eG has an another (old) model number ("PN28160"), it's not a Realtek based hardware. - Switch-M16eG has a "POWER" LED (Green), but it's not connected to any GPIO pin. - U-Boot checks the runtime images in the flash when booting and fails to execute "bootcmd" variable if the images are not existing. - A filesystem is formed in the flash (0x100000-0x1DFFFFF) on the stock firmware and it includes the stock images, configuration files and checksum files. It's unknown format, can't be managed on the OpenWrt. To get the enough space for OpenWrt, move the filesystem to the head of "fs_reserved" partition by execution of "ffsfmt" and "updatert". - A GPIO pin on PCA9539 is used for resetting external RTL8218FB phy. This should be specified as "reset-gpios" property in MDIO node, but RTL8218FB won't be configured on RTL8218D support in the phy driver. So, ethernet ports on the phy will be broken after hard-resetting. At the moment, configure this pin as gpio-hog to avoid breaking by resetting. Back to the stock firmware: 1. Delete "loadaddr" variable and set "bootcmd" to the original value on U-Boot: setenv loadaddr setenv bootcmd 'bootm 0x81000000' on OpenWrt: fw_setenv loadaddr fw_setenv bootcmd 'bootm 0x81000000' 2. Perform reset or reboot on U-Boot: reset on OpenWrt: reboot Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: Fix typo in Kconfig promptOlliver Schinagl2022-08-051-1/+1
| | | | | | | | | As the symbol RTL930x shows, the bool enables the RTL930x platform, not the RTL839x one. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> (slightly changed commit subject) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* Revert "realtek: remove support for HPE 1920 series"Daniel Golle2022-07-2810-3/+540
| | | | | | This reverts commit a63aeaecf1f3387df020854c9b22a365207399ce. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* realtek: remove support for HPE 1920 seriesSander Vanheule2022-07-2810-540/+3
| | | | | | | | | Support for HPE 1920 images depends on two non-existent tools (mkh3cimg and mkh3cvfs) from the in the firmware-utils package. Revert commit f2f09bc00280 ("realtek: add support for HPE 1920 series") until support for these tools is merged and made available in OpenWrt. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add support for HPE 1920 seriesJan Hoffmann2022-07-2810-3/+540
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware information: --------------------- - HPE 1920-8G: - RTL8380 SoC - 8 Gigabit RJ45 ports (built-in RTL8218B) - 2 SFP ports (built-in SerDes) - HPE 1920-16G / HPE 1920-24G (same board): - RTL8382 SoC - 16/24 Gigabit RJ45 ports (built-in RTL8218B, 1/2 external RTL8218D) - 4 SFP ports (external RTL8214FC) - Common: - RJ45 RS232 port on front panel - 32 MiB NOR Flash - 128 MiB DDR3 DRAM - PT7A7514 watchdog Booting initramfs image: ------------------------ - Prepare a FTP or TFTP server serving the OpenWrt initramfs image and connect the server to a switch port. - Connect to the console port of the device and enter the extended boot menu by typing Ctrl+B when prompted. - Choose the menu option "<3> Enter Ethernet SubMenu". - Set network parameters via the option "<5> Modify Ethernet Parameter". Enter the FTP/TFTP filename as "Load File Name" ("Target File Name" can be left blank, it is not required for booting from RAM). Note that the configuration is saved on flash, so it only needs to be done once. - Select "<1> Download Application Program To SDRAM And Run". Initial installation: --------------------- - Boot an initramfs image as described above, then use sysupgrade to install OpenWrt permanently. After initial installation, the bootloader needs to be configured to load the correct image file - Enter the extended boot menu again and choose "<4> File Control", then select "<2> Set Application File type". - Enter the number of the file "openwrt-kernel.bin" (should be 1), and use the option "<1> +Main" to select it as boot image. - Choose "<0> Exit To Main Menu" and then "<1> Boot System". NOTE: The bootloader on these devices can only boot from the VFS filesystem which normally spans most of the flash. With OpenWrt, only the first part of the firmware partition contains a valid filesystem, the rest is used for rootfs. As the bootloader does not know about this, you must not do any file operations in the bootloader, as this may corrupt the OpenWrt installation (selecting the boot image is an exception, as it only stores a flag in the bootloader data, but doesn't write to the filesystem). Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: clean up rtl838x MDIO busy wait loopJan Hoffmann2022-07-281-15/+22
| | | | | | | | | | | | | Don't use udelay to allow other kernel tasks to execute if the kernel has been built without preemption. Also determine the timeout based on jiffies instead of loop iterations. This is especially important on devices containing a watchdog with a short timeout. Without this change, the watchdog is not serviced during PHY patching which can take multiple seconds. Tested-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: add SFP support for RTL8214FC PHYJan Hoffmann2022-07-281-1/+25
| | | | | | | | | | Probe the SFP module during PHY initialization and implement insertion/removal handlers to automatically configure the media type of the respective port. Suggested-by: Birger Koblitz <git@birger-koblitz.de> Tested-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: rtl83xx-phy: decouple RTL8214FC media change and power configJan Hoffmann2022-07-281-52/+70
| | | | | | | | | | | | | Move RTL8214FC power configuration to newly created suspend and resume methods. A media change now only results in power configuration if the PHY is not suspended, to avoid powering up a port when the interface is currently not up. While at it, remove the rtl8380 prefix from function names, as this is actually not SoC-specific. Tested-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: rtl83xx-phy: fix RTL8214FC media changeJan Hoffmann2022-07-281-16/+16
| | | | | | | | Toggle power on the individual PHY instead of the package. Otherwise a media change always toggles power on the first port, and not the one that is being configured. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: make DGS-1210 u-boot-env partition writeableMarkus Stockhausen2022-07-261-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | We are close to provide enduser friendly OpenWrt images for DGS-1210 switches that do not need serial console. Nevertheless a small bit is missing. We cannot switch back to the vendor partition or initiate a download of a vendor firmware image. To issue this from inside OpenWrt we need write access to U-Boot environment. Case 1: Switch back to secondary (vendor) image > fw_setenv bootcmd run addargs\; bootm 0xb4e80000 > fw_setenv image /dev/mtdblock7 > reboot Case 2: Issue D-Link Network Assistant based download on next reboot. This is a combination of some vendor specific protocol (DDP) and a TFTP download afterwards. > fw_setenv bootstop on > reboot Allow these commands by opening up u-boot-env for write access. Tested on DGS-1210-20. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: clear spurious GPIO interruptsSander Vanheule2022-07-211-0/+30
| | | | | | | | | | | | | | The interrupt controller in the internal GPIO peripheral will sometimes generate spurious interrupts. If these are not properly acknowledged, the system will be held busy until reboot. These spurious interrupts are identified by the fact that there is no system IRQ number associated, since the interrupt line was never allocated. Although most prevalent on RTL839x, RTL838x SoCs have also displayed this behaviour. Reported-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> # DGS-1210-52 Reported-by: Birger Koblitz <mail@birger-koblitz.de> # Netgear GS724TP v2 Reported-by: Jan Hoffmann <jan@3e8.eu> # HPE 1920-16G Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: correct egress frame port verificationSander Vanheule2022-07-172-39/+36
| | | | | | | | | | | | | | | | | | | | Destination switch ports for outgoing frame can range from 0 to CPU_PORT-1. Refactor the code to only generate egress frame CPU headers when a valid destination port number is available, and make the code a bit more consistent between different switch generations. Change the dest_port argument's type to 'unsigned int', since only positive values are valid. This fixes the issue where egress frames on switch port 0 did not receive a VLAN tag, because they are sent out without a CPU header. Also fixes a potential issue with invalid (negative) egress port numbers on RTL93xx switches. Reported-by: Arınç ÜNAL <arinc.unal@xeront.com> Suggested-by: Birger Koblitz <mail@birger-koblitz.de> Tested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: correct egress frame priority assignmentSander Vanheule2022-07-171-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | Priority values passed to the egress (TX) frame header initialiser are invalid when smaller than 0, and should not be assigned to the frame. Queue assignment is then left to the switch core logic. Current code for RTL83xx forces the passed priority value to be positive, by always masking it to the lower bits, resulting in the priority always being set and enabled. RTL93xx code doesn't even check the value and unconditionally assigns the (32 bit) value to the (5 bit) QID field without masking. Fix priority assignment by only setting the AS_QID/AS_PRI flag when a valid value is passed, and properly mask the value to not overflow the QID/PRI field. For RTL839x, also assign the priority to the right part of the frame header. Counting from the leftmost bit, AS_PRI and PRI are in bits 36 and 37-39. The means they should be assigned to the third 16 bit value, containing bits 32-47. Tested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: fix egress L2 learning on rtl839xSander Vanheule2022-07-171-1/+1
| | | | | | | | | | | | The flag to enable L2 address learning on egress frames is in CPU header bit 40, with bit 0 being the leftmost bit of the header. This corresponds to BIT(7) in the third 16-bit value of the header. Correctly set L2LEARNING by fixing the off-by-one error. Fixes: 9eab76c84e31 ("realtek: Improve TX CPU-Tag usage") Tested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: fix egress port mask on rtl839xSander Vanheule2022-07-171-1/+1
| | | | | | | | | | | | The flag to enable the outgoing port mask is in CPU header bit 43, with bit 0 being the leftmost bit of the header. This corresponds to BIT(4) in the third 16-bit value of the header. Correctly set AS_DPM by fixing the off-by-one error. Fixes: 9eab76c84e31 ("realtek: Improve TX CPU-Tag usage") Tested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: remove hardcoded sys-led configurationsSander Vanheule2022-07-101-40/+0
| | | | | | | | | | | | setup.c unconditionally sets the sys-led mode (blinking rate) to a permanent high output. This may cause issues when a board expects this pin to toggle periodically, e.g. when hooked up to an external watchdog. If the sys-led peripheral is used to control an LED, the mux should be configured to use the pin as GPIO0, allowing for better control as a GPIO LED. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add mux pinctrl for rtl931xSander Vanheule2022-07-101-0/+19
| | | | | | | | | | Add a pinctrl-single node to manage the sys-led mux and JTAG mux. This allows using the associated pins as GPIOs: - sys-led: GPIO0 - JTAG: GPIO6, GPIO7, others unknown (TDO, TDI, TMS, TCK /TRST) Suggested-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add system LED for ZyXEL XGS1250-12Sander Vanheule2022-07-101-0/+21
| | | | | | | | The devicetree for the ZyXEL XGS1250-12 was missing the description of the front panel LED labeled "PWR SYS". Let's add it so it can be controlled by the user. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add sys-led disable pinctrl for rtl930xSander Vanheule2022-07-101-0/+15
| | | | | | | | | Like for RTL838x devices, add a pinctrl-single node to manage the sys-led/gpio0 mux, and allow using the pin as GPIO. Co-developed-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add missing gpio0 pinctrl propertiesSander Vanheule2022-07-103-0/+9
| | | | | | | | | | | Not all devices using the gpio0/sys-led pin as a GPIO, configure the pinmux. Add the necessary pinctrl properties to these devices to ensure the pin is set up for use as GPIO. Co-developed-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Bjørn Mork <bjorn@mork.no>
* realtek: build sane factory images for DGS-1210 modelsMarkus Stockhausen2022-07-082-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | During upload of firmware images the WebUI and CLI patch process extracts a version information from the uploaded file and stores it onto the jffs2 partition. To be precise it is written into the flash.txt or flash2.txt files depending on the selected target image. This data is not used anywhere else. The current OpenWrt factory image misses this label. Therefore version information shows only garbage. Fix this. Before: DGS-1210-20> show firmware information IMAGE ONE: Version : xfo/QE~WQD"A\Scxq... Size : 5505185 Bytes After: DGS-1210-20> show firmware information IMAGE ONE: Version : OpenWrt Size : 5505200 Bytes Tested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: build factory images for all DGS-1210 modelsMarkus Stockhausen2022-07-081-7/+7
| | | | | | | | | Currently we build factory images only for DGS-1210-28 model. Relax that constraint and take care about all models. Tested on DGS-1210-20 and should work on other models too because of common flash layout. Tested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: rename u-boot-env2 to board-nameLuiz Angelo Daros de Luca2022-07-051-1/+1
| | | | | | | | | | | | | | | | | | | | Some realtek boards have two u-boot-env partitions. However, in the DGS-1210 series, the mtdblock2 partition is not a valid u-boot env and simply contains the board/device name, followed by nulls. 00000000 44 47 53 2d 31 32 31 30 2d 32 38 2d 46 31 00 00 |DGS-1210-28-F1..| 00000010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| * 00040000 00000000 44 47 53 2d 31 32 31 30 2d 35 32 2d 46 31 00 00 |DGS-1210-52-F1..| 00000010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| * 00040000 The misleading u-boot-env2 name also confuses uboot-envtools. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
* realtek: build DGS-1210 images with CAMEO tagMarkus Stockhausen2022-07-052-0/+5
| | | | | | | | From now on we will insert CAMEO tags into sysupgrade images for DGS-1210 devices. This will make the "OS:...FAILED" and "FS:...FAILED" messages go away. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: EnGenius EWS2910P: declare and hog the poe-enable GPIOAlexandru Gagniuc2022-07-021-0/+7
| | | | | | | | | | | | GPIO 1 on the RTL8231 is used to force the PoE MCU to disable power outputs. It is not used by any driver, but if accidentally set low, PoE outputs are disabled. This situation is hard to debug, and requires knowledge of the Broadcom PoE protocol used by the MCU. To prevent this situation, hog it as an output high. This is consistent with the ZyXel GS1900 series handles it. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
* realtek: add DGS-1210-28 factory imageLuiz Angelo Daros de Luca2022-06-282-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DGS-1210 switches support dual image, with each image composed of a kernel and a rootfs partition. For image1, kernel and rootfs are in sequence. The current OpenWrt image (written using a serial console), uses those partitions together as the firmware partition, ignoring the partition division. The current OEM u-boot fails to validate image1 but it will only trigger firmware recovery if both image1 and image2 fail, and it does not switch the boot image in case one of them fails the check. The OEM factory image is composed of concatenated blocks of data, each one prefixed with a 0x40-byte cameo header. A normal OEM firmware will have two of these blocks (kernel, rootfs). The OEM firmware only checks the header before writing unconditionally the data (except the header) to the correspoding partition. The OpenWrt factory image mimics the OEM image by cutting the kernel+rootfs firmware at the exact size of the OEM kernel partition and packing it as "the kernel partition" and the rest of the kernel and the rootfs as "the rootfs partition". It will only work if written to image1 because image2 has a sysinfo partition between kernel2 and rootfs2, cutting the kernel code in the middle. Steps to install: 1) switch to image2 (containing an OEM image), using web or these CLI commands: - config firmware image_id 2 boot_up - reboot 2) flash the factory_image1.bin to image1. OEM web (v6.30.016) is crashing for any upload (ssh keys, firmware), even applying OEM firmwares. These CLI commands can upload a new firmware to the other image location (not used to boot): - download firmware_fromTFTP <tftpserver> factory_image1.bin - config firmware image_id 1 boot_up - reboot To debrick the device, you'll need serial access. If you want to recover to an OpenWrt, you can replay the serial installation instructions. For returning to the original firmware, press ESC during the boot to trigger the emergency firmware recovery procedure. After that, use D-Link Network Assistant v2.0.2.4 to flash a new firmware. The device documentation does describe that holding RESET for 12s trigger the firmware recovery. However, the latest shipped U-Boot "2011.12.(2.1.5.67086)-Candidate1" from "Aug 24 2021 - 17:33:09" cannot trigger that from a cold boot. In fact, any U-Boot procedure that relies on the RESET button, like reset settings, will only work if started from a running original firmware. That, in practice, cancels the benefit of having two images and a firmware recovery procedure (if you are not consider dual-booting OpenWrt). Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
* realtek: cleanup LAG loggingMarkus Stockhausen2022-06-261-12/+14
| | | | | | | | Setting up DSA bond silently fails if mode is not 802.3ad. Add log message to fix it. As we are already here harmonize all logging messages in the add/delete functions. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: EnGenius EWS2910P: add support for SFP portsAlexandru Gagniuc2022-06-251-0/+49
| | | | | | | | | | | | | | | | | | | | | | The SFP cages 9F and 10F share the same SCL line. Currently, there isn't a good way to model this. Thus, only one SFP port can be fully supported. Cage 10F is fully supported with an I2C bus and sfp handle. Linux automatically handles enabling or disabling the TX laser. Cage 9F is only parially supported, without the sfp handle. The SDA line is hogged as an input, so that it remains high. SCL transitions sould not affect modules connected to this cage. The default value of the tx-disable line is high (active). It is exported as a gpio, but the laser is off by default. To enable the laser: echo 0 > /sys/class/gpio/sff-p9-tx-disable/value Thus, both modules can be used for networking, but only 10F will be able to detect and identify a plugged in SFP module. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
* realtek: add support for EnGenius EWS2910PAlexandru Gagniuc2022-06-252-0/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Engenius EWS2910P PoE switch. This is an RTL8380 based switch with two SFP slots, and PoE 802.3af one every RJ-45 port. The specs say 802.3af, but the vendor firmware configures the PSE for a budget of 31W, indicating 802.3at support. Specifications: --------------- * SoC: Realtek RTL8380M * Flash: 32 MiB SPI flash Macronix MX25L25635E * RAM: 256 MiB (As reported by bootloader) * Ethernet: 16x 10/100/1000 Mbps with PoE 2x SFP slots * Buttons: 1 "Reset" button on front panel 1 "LED mode: button on front panel 1 "On/Off" Toggle switch on the back * Power: 48V-54V DC barrel jack * UART: 1 serial header (JP1) with populated 2.54mm pitch header Labeled GRTV for ground, rx, tx, and 3.3V respectively * PoE: 1 STM ST32F100 microcontroller 2 BCM59111 PSE chips Works: ------ - (8) RJ-45 ethernet ports - Switch functions - LEDs and buttons Not yet enabled: ---------------- - SFP ports (will be enabled in a subsequent change) - Power-over-Ethernet (requires realtek-poe package) Install via web interface: ------------------------- The factory firmware will accept and flash the initramfs image. It is recommended to flash to "Partition 0". Flashing to "Partition 1" is not supported at this point. The factory web GUI will show the following warning: " Warning: The firmware version is v0.00.00-c0.0.00 The firmware image you are uploading is older than the current firmware of the switch. The device will reset back to default settings. Are you sure you want to proceed?" This is expected when flashing OpenWrt. After the initramfs image boots, flash the -sysupgrade using either the commandline or LuCI. Install via serial console/tftp: -------------------------------- The u-boot firmware will not stop the boot, regardless of which key is pressed. To access the u-boot console, ground out the CLK (pin 16) of the ROM (U22) when u-boot is reading the linux image. If timed correctly, the image CRC will fail, and u-boot will drop to a shell: > rtk network on > setenv ipaddr <address of tftp server> > tftp $(freemem) <name-of-initramfs-image.bin> > bootm Then flash the -sysupgrade using either the commandline or luci. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [gpio-led node names, OpenWrt and LuCI capitalization in commit message] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* generic: enable CRYPTO_LIB_BLAKE2S[_X86|_ARM]Tomasz Maciej Nowak2022-06-244-0/+8
| | | | | | | | | | | | This is now built-in, enable so it won't propagate on target configs. Link: https://lkml.org/lkml/2022/1/3/168 Fixes: 79e7a2552e89 ("kernel: bump 5.15 to 5.15.44") Fixes: 0ca93670693b ("kernel: bump 5.10 to 5.10.119") Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> (Link to Kernel's commit taht made it built-in, CRYPTO_LIB_BLAKE2S[_ARM|_X86] as it's selectable, 5.10 backport) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* realtek: fix gcc-12 build with -Werror=array-compareBjørn Mork2022-06-221-1/+1
| | | | | | | | | Removing this gcc-12 error: arch/mips/rtl838x/setup.c:64:30: error: comparison between two arrays [-Werror=array-compare] 64 | else if (__dtb_start != __dtb_end) Signed-off-by: Bjørn Mork <bjorn@mork.no>
* realtek: make "u-boot-env" partition writable for Netgear 3xx seriesAndreas Böhler2022-06-221-1/+0
| | | | | | | | | The Netgear GS3xx devices do not properly initialise the port LEDs during startup unless the boot command in U-Boot is changed. Making the U-Boot env partition writable allows this modification to be done from within OpenWrt by calling "fw_setenv bootcmd rtk network on\; boota". Signed-off-by: Andreas Böhler <dev@aboehler.at>
* realtek: make Netgear GS1xx u-boot env partition writableStijn Segers2022-06-221-1/+0
| | | | | | | | | | | Make the u-boot environment partition for the NETGEAR GS108T v3 and GS110TPP writable (they share a DTS), so the values can be manipulated from userspace. See https://forum.openwrt.org/t/57875/1567 for a real world example. Signed-off-by: Stijn Segers <foss@volatilesystems.org>
* realtek: add support for power LED on Netgear GS108Tv3Pascal Ernster2022-06-191-0/+27
| | | | | | | | | | | | | | | | | | | | | The Netgear GS108Tv3 is already supported by OpenWrt, but is missing LED support. After OpenWrt installation, all LEDs are off which makes the installation quite confusing. This enables support for the green/amber power LED to give feedback about the current status. This is basically just a verbatim copy of commit c4927747d25a ("realtek: add support for power LED on Netgear GS308Tv1"). Please note that both LEDs are wired up in an anti-parallel fashion, which means that only one of both LEDs/colors can be switched on at the same time. If both LEDs/colors are switched on simultanously, the LED goes dark. Tested-by: Pascal Ernster <git@hardfalcon.net> Signed-off-by: Pascal Ernster <git@hardfalcon.net> [add title to commit reference] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add support for D-Link DGS-1210-20Markus Stockhausen2022-06-192-0/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware specification ---------------------- * RTL8382M SoC, 1 MIPS 4KEc core @ 500MHz * 128MB DRAM * 32MB NOR Flash * 16 x 10/100/1000BASE-T ports - Internal PHY with 8 ports (RTL8218B) - External PHY with 8 ports (RTL8218B) * 4 x Gigabit RJ45/SFP Combo ports - External PHY with 4 SFP ports (RTL8214FC) * Power LED * Reset button on front panel * UART (115200 8N1) via unpopulated standard 0.1" pin header marked J6 UART pinout ----------- [o]ooo|J6 | ||`------ GND | |`------- RX | `-------- TX `---------- Vcc (3V3) Boot initramfs image from U-Boot -------------------------------- 1. Press Escape key during `Hit Esc key to stop autoboot` prompt 2. Press CTRL+C keys to get into real U-Boot prompt 3. Init network with `rtk network on` command 4. Load image with `tftpboot 0x8f000000 openwrt-realtek-rtl838x-d-link_dgs-1210-20-initramfs-kernel.bin` command 5. Boot the image with `bootm` command To install, upload the sysupgrade image to the OEM webpage or sysupgrade from the system running from initramfs image. It has been developed and tested on device with F1 revision. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> [correct initramfs image name] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: add support for power LED on Netgear GS308Tv1Andreas Böhler2022-06-181-0/+27
| | | | | | | | | | The Netgear GS308Tv1 is already supported by OpenWrt, but is missing LED support. After OpenWrt installation, all LEDs are off which makes the installation quite confusing. This enables support for the green/amber power LED to give feedback about the current status. Signed-off-by: Andreas Böhler <dev@aboehler.at>
* realtek: add gpio-restart for D-Link DGS-1210-28Luiz Angelo Daros de Luca2022-06-071-0/+6
| | | | | | | | A GPIO assert is required to reset the system. Otherwise, the system will hang on reboot. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Reviewed-by: Robert Marko <robimarko@gmail.com>
* realtek: add reset button for D-Link DGS-1210-28Luiz Angelo Daros de Luca2022-06-071-0/+18
| | | | | | | Tested in a DGS-1210-28 F3, both triggering failsafe and reboot. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Reviewed-by: Robert Marko <robimarko@gmail.com>
* kernel: bump 5.10 to 5.10.120John Audia2022-06-061-1/+1
| | | | | | | | | All patches automatically rebased. Build system: x86_64 Build-tested: ipq806x/R7800, x86/64 Signed-off-by: John Audia <therealgraysky@proton.me>
* kernel: bump 5.10 to 5.10.119John Audia2022-06-061-1/+1
| | | | | | | | | | Delete the crypto-lib-blake2s kmod package, as BLAKE2s is now built-in. Patches automatically rebased. Build system: x86_64 Build-tested: ipq806x/R7800, x86/64 Signed-off-by: John Audia <therealgraysky@proton.me>
* realtek: add support for ZyXEL GS1900-24ERaylynn Knight2022-06-062-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ZyXEL GS1900-24E is a 24 port gigabit switch similar to other GS1900 switches. Specifications -------------- * Device: ZyXEL GS1900-24E * SoC: Realtek RTL8382M 500 MHz MIPS 4KEc * Flash: 16 MiB Macronix MX25L12835F * RAM: 128 MiB DDR2 SDRAM Nanya NT5TU128M8GE * Ethernet: 24x 10/100/1000 Mbps * LEDs: 1 PWR LED (green, not configurable) 1 SYS LED (green, configurable) 24 ethernet port link/activity LEDs (green, SoC controlled) * Buttons: 1 "RESET" button on front panel * Switch: 1 Power switch on rear of device * Power 120-240V AC C13 * UART: 1 serial header (JP2) with populated standard pin connector on the left side of the PCB. Pinout (front to back): + Pin 1 - VCC marked with white dot + Pin 2 - RX + Pin 3 - TX + PIn 4 - GND Serial connection parameters: 115200 8N1. Installation ------------ OEM upgrade method: * Log in to OEM management web interface * Navigate to Maintenance > Firmware * Select the HTTP radio button * Select the Active radio button * Use the browse button to locate the realtek-rtl838x-zyxel_gs1900-24e-initramfs-kernel.bin file and select open so File Path is updated with filename. * Select the Apply button. Screen will display "Prepare for firmware upgrade ...". *Wait until screen shows "Do you really want to reboot?" then select the OK button * Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it: > sysupgrade -n /tmp/realtek-rtl838x-zyxel_gs1900-24e-squashfs-sysupgrade.bin it may be necessary to restart the network (/etc/init.d/network restart) on the running initramfs image. U-Boot TFTP method: * Configure your client with a static 192.168.1.x IP (e.g. 192.168.1.10). * Set up a TFTP server on your client and make it serve the initramfs image. * Connect serial, power up the switch, interrupt U-boot by hitting the space bar, and enable the network: > rtk network on * Since the GS1900-24E is a dual-partition device, you want to keep the OEM firmware on the backup partition for the time being. OpenWrt can only boot from the first partition anyway (hardcoded in the DTS). To make sure we are manipulating the first partition, issue the following commands: > setsys bootpartition 0 > savesys * Download the image onto the device and boot from it: > tftpboot 0x84f00000 192.168.1.10:openwrt-realtek-rtl838x-zyxel_gs1900-24e-initramfs-kernel.bin > bootm * Once OpenWrt has booted, scp the sysupgrade image to /tmp and flash it: > sysupgrade -n /tmp/openwrt-realtek-rtl838x-zyxel_gs1900-24e-squashfs-sysupgrade.bin it may be necessary to restart the network (/etc/init.d/network restart) on the running initramfs image. Signed-off-by: Raylynn Knight <rayknight@me.com>
* realtek: don't unmask non-maskable GPIO IRQsSander Vanheule2022-05-301-0/+29
| | | | | | | | | | | | | | | | On uniprocessor builds, for_each_cpu(cpu, mask) will assume 'mask' always contains exactly one CPU, and ignore the actual mask contents. This causes the loop to run, even when it shouldn't on an empty mask, and tries to access an uninitialised pointer. Fix this by wrapping the loop in a cpumask_empty() check, to ensure it will not run on uniprocessor builds if the CPU mask is empty. Fixes: af6cd37f42f3 ("realtek: replace RTL93xx GPIO patches") Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com> Reported-by: Robert Marko <robimarko@gmail.com> Tested-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: replace RTL93xx GPIO patchesSander Vanheule2022-05-224-64/+234
| | | | | | | | | | | Patches to support the SoC's GPIO controller for RTL930x and RTL931x devices have been accepted upstream. Replace the current preliminary patch with the upstream ones, excluding devictree binding changes. The updated patches add GPIO IRQ balancing support on RTL930x, but this cannot be used until these devices also support SMP. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* config: limit CONFIG_DEBUG_INFO to top-level generic configsTony Ambardar2022-05-184-4/+0
| | | | | | | | | | Remove redundant target-level entries, noting that these settings will be configured from "Kernel build options" of Kconfig. Signed-off-by: Tony Ambardar <itugrok@yahoo.com> Signed-off-by: Felix Fietkau <nbd@nbd.name> [remove from new configs introduced after patch submission] Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
* kernel: bump 5.10 to 5.10.114John Audia2022-05-162-2/+2
| | | | | | | | | | All patches automatically rebased. Build system: x86_64 Build-tested: bcm2711/RPi4B Run-tested: bcm2711/RPi4B Signed-off-by: John Audia <therealgraysky@proton.me>
* realtek: do not reset SerDes on link changeBirger Koblitz2022-05-112-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not reset the RTL930x SerDes on link changes, instead set up the SDS with internal PHYs for the SFP+ ports only. This fixes the 8 1GBit ports on the Zyxel XGS1250 which do not work without this patch. A complete SerDes reset was performed on all SerDes links. For copper 1Gbit ports, this is commonly a single XGMII link to an RTL8218D. There is however no support for setting up the XGMII link on RTL9300/RTL9310, thereby wiping the (RX/TX) setup done by u-boot and breaking the 1GBit ports. No SerDes reset should be done for these links. The handling of SGMII/HiSGMII, 1000BX or 10GR links is actually entirely different. All these modes need to be suitably RX calibrated and the pre- main and post- amplifiers set up properly for TX. The 10GBit SFP+ fiber links are recalibrated instead of reset, which e.g. is necessary when someone pulls a module out and puts another in. This makes swapping out 10GBit fiber modules possible. 1GBit modules are not yet supported, nor any modules with an internal phy. Tested-by: Stijn Segers <foss@volatilesystems.org> Signed-off-by: Birger Koblitz <git@birger-koblitz.de> [rewrite commit message based on discussion] Link: http://lists.infradead.org/pipermail/openwrt-devel/2022-May/038623.html Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: Trap all frames with switch as destination to CPU-portBirger Koblitz2022-05-081-0/+9
| | | | | | | | | | | | This fixes a bug where frames sent to the switch itself were flooded to all ports unless the MAC address of the CPU-port was learned otherwise. Tested-by: Wenli Looi <wlooi@ucalgary.ca> Tested-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: Birger Koblitz <git@birger-koblitz.de> [fix code formatting] Signed-off-by: Sander Vanheule <sander@svanheule.net>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-30 15:15:50 +0000