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* treewide: remove files for building 5.10 kernelNick Hainke2023-05-1213-15184/+0
| | | | | | | | | | | All targets are bumped to 5.15. Remove the old 5.10 patches, configs and files using: find target/linux -iname '*-5.10' -exec rm -r {} \; Further, remove the 5.10 include. Signed-off-by: Nick Hainke <vincent@systemli.org>
* realtek: remove redundant is_lagmember checksJan Hoffmann2023-05-071-13/+2
| | | | | | | | | | | | | All callers of the rtl83xx_mc_group_* functions already do the same check, so these aren't needed. For rtl83xx_mc_group_alloc, this branch also incorrectly returned 0 instead of a negative value. If the branch wasn't effectively dead code anyway, this could potentially have caused bugs, as 0 is a valid multicast group entry index. Fixes: cde31976e375 ("realtek: Add support for Layer 2 Multicast") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: remove store_mcgroups/load_mcgroupsJan Hoffmann2023-05-072-31/+0
| | | | | | | | | | | | | | | | | | | The current implementation only works when store and load are called for the same port without any other calls in between. This is because the store function only saves a single port number instead of a portmask for each group. It also doesn't take into account that the allocation of multicast group entries might change between store/load calls. As a result, the multicast port mask table gets corrupted. This also includes the reserved entry for unknown multicast, which gets corrupted even when no other mdb entries have been added. Remove the code for storing/loading multicast groups entirely, as the original commit message doesn't offer a convincing reason why this would be necessary in the first place. Fixes: 724e4af530cd ("realtek: Store and Restore MC memberships for port enable/disable") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: don't add CPU port to multicast portmasksJan Hoffmann2023-05-071-5/+2
| | | | | | | | | | | | | There shouldn't be any reason to forward all multicast to the CPU. The original commit message also doesn't provide a reason for this seemingly unrelated change. The current implementation of the delete method is also broken, as it entirely removes any entry when the portmask contains only the CPU port, even if it was explicitly created. Fixes: 724e4af530cd ("realtek: Store and Restore MC memberships for port enable/disable") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: actually remove port from multicast portmaskJan Hoffmann2023-05-071-0/+1
| | | | | Fixes: 724e4af530cd ("realtek: Store and Restore MC memberships for port enable/disable") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: don't treat first multicast portmask entry as reservedJan Hoffmann2023-05-071-1/+0
| | | | | | | | | | | | | | There doesn't appear to be a reason to do this, as only the last entry is actually reserved for unknown multicast. This also fixes two issues: - As the increment happened after the bounds check, the value of the actually reserved last entry could be overwritten. - On deletion of entries, a corresponding decrement was missing, causing the wrong entry to be marked as free. Fixes: cde31976e375 ("realtek: Add support for Layer 2 Multicast") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: fix writing/deletion of CAM entriesJan Hoffmann2023-05-071-4/+4
| | | | | | | Actually use the index returned by rtl83xx_find_l2_cam_entry. Fixes: cde31976e375 ("realtek: Add support for Layer 2 Multicast") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: handle changed flags in VLAN configurationJan Hoffmann2023-05-071-20/+22
| | | | | | | | | | | The port_vlan_add method may be called while a port is already a member of that VLAN, so it needs to be able to handle changed flags. Fix it to properly handle when the PVID or UNTAGGED flag was previously set, but now no longer is. To reduce duplication, move PVID configuration to a separate function. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: fix standalone ports in presence of static fdb entriesJan Hoffmann2023-05-074-0/+50
| | | | | | | | | | | | | | | | | | | | The registers L2_PORT_STATIC_MV_ACT seem to specify the action to take when the source address of a packet exists as a static fdb entry on another port. By default the configured action is to drop such packets. For standalone ports, this behaviour is undesired, as all traffic should be forwarded to the CPU. So change the action to forward on standalone ports. A situation where this issue can occur is when a non-offloaded bond interface is part of a bridge. In that case, the CPU port will have fdb entries for devices connected to the bond interface, which are managed by the assisted learning feature. For now, this is only implemented for RTL838x/RTL839x, as the available set of registers differs for the other devices. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: initialize port masks to match the default stateJan Hoffmann2023-05-071-12/+11
| | | | | | | | | | | | | All ports are disabled by default, so configure the port isolation masks and the pm field accordingly in the setup function. When port_enable is called for a port, the isolation masks will be set up so that traffic can flow between the port and the CPU. While at it, change the code to also use the traffic_set method in rtl83xx_setup, instead of writing to the RTL838x_PORT_ISO_CTRL(i) registers directly. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: properly update port masks when port leaves bridgeJan Hoffmann2023-05-071-5/+5
| | | | | | | | | | | | | | | | | Correctly update the isolation mask of the port being configured. The port_bitmap variable should contain all other bridge members and needs to be actually removed from the isolation mask instead of added to it. Also actually remove the port being configured from the pm field of the other ports, so that any other ports that are currently disabled will be configured correctly when they are enabled. Fixes: df8e6be59a1f ("rtl838x: add new architecture") [fixed updating pm field of other ports] Fixes: 2b88563ee5aa ("realtek: update the tree to the latest refactored version") [reintroduced incorrect pm field update] Fixes: 27029277f98d ("realtek: add switch driver support for the RTL93XX based switches") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: fix memory leak in netevent handlerJan Hoffmann2023-02-131-8/+9
| | | | | | | | | The net_event_work struct is allocated, but only freed in a single case. Move the allocation to the branch where it is actually needed, and free it after the work has been done. Fixes: 03e1d93e0779 ("realtek: add driver support for routing offload") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: add cond_resched to loops accessing the FDB tableJan Hoffmann2022-12-272-0/+6
| | | | | | | | | A full loop accessing all FDB entries can take several milliseconds (on RTL839x about 20 ms), so give other kernel tasks a chance to run. This is especially important for rtl83xx_port_fdb_dump which is itself called in a loop for all ports by the kernel. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: restructure rtl_table_read/writeJan Hoffmann2022-12-272-14/+31
| | | | | | | | | | | | | | | | These two functions are identical apart from writing different values to the read/write bit. Create a new function rtl_table_exec to reduce code duplication. Also replace the unbounded busy-waiting loop. The new implementation may sleep, but as the hardware typically responds before the first poll, any callers doing many table accesses still need to make sure not to block other kernel tasks themselves. So far, polling timeout errors are only handled by logging an error, but a return value is added to allow proper handling in the future. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: simplify log messages in rtl83xx_mdio_probeJan Hoffmann2022-12-271-7/+1
| | | | | | | | | | This function currently prints three messages for every switch port at KERN_INFO level. This takes a considerable amount of time during bootup and can even trigger an external watchdog. Replace these log messages by a single one at KERN_DEBUG level. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: fix dell typoJan-Niklas Burfeind2022-12-011-3/+3
| | | | | | | should be add/delete or abbreviated add/del Signed-off-by: Jan-Niklas Burfeind <git@aiyionpri.me> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
* realtek: refactor keep vlan tag setup, fix tagged forwardingLuiz Angelo Daros de Luca2022-12-017-23/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in dsa.c:rtl83xx_port_enable() was trying to set vlan_port_tag_sts_ctrl while dealing with differences between SoCs. However, not only that register has a different address, the register structure and even the 2-bit value semantic changes for each SoC. The vlan_port_tag_sts_ctrl field was dropped and converted into a vlan_port_keep_incoming_tag_set() function that abstracts the different between SoCs. The macro referencing that register migrated to the SoC specific c file as it will be privately used by each file. All magic numbers were converted into macros using BITMASK and FIELD_PREP. The vlan_port_tag_sts_ctrl debugfs was dropped for now as it is already broken for rtl93xx. The best place for SoC specific code might be in each respective c file and not in if/else clauses. The final result is: rtl838x: set ITAG_STS=TAGGED, same as before rtl839x: set ITAG_STS=TAGGED instead of IGR_P_ITAG_KEEP=0x1, fixing forwarding of tagged packets rtl930x: set EGR_ITAG_STS=TAGGED instead of IGR_P_ITAG=0x1, possibly fixing forwarding of tagged packets rtl931x: set EGR_ITAG_STS=TAGGED instead of OTPID_KEEP=0x1, possibly fixing forwarding of tagged packets Without (EGR_)ITAG_STS=TAGGED, at least for rtl839x, forwarded packets will drop the vlan tag while packets from the CPU will still have the correct tag. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
* realtek: fix typo in debug messageLuiz Angelo Daros de Luca2022-11-051-2/+2
| | | | | | vid_end was mentioned twice. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
* realtek: use assisted learning on CPU portJan Hoffmann2022-10-262-0/+22
| | | | | | | | | | | | | | | | | | | | L2 learning on the CPU port is currently not consistently configured and relies on the default configuration of the device. On RTL83xx, it is disabled for packets transmitted with a TX header, as hardware learning corrupts the forwarding table otherwise. As a result, unneeded flooding of traffic for the CPU port can already happen on some devices now. It is also likely that similar issues exist on RTL93xx, which doesn't have a field to disable learning in the TX header. To address this, disable hardware learning for the CPU port globally on all devices. Instead, enable assisted learning to let DSA write FDB entries to the switch. For now, this does not sync local/bridge entries to the switch. However, support for that was added in Linux 5.14, so the next switch to a newer kernel version is going to fix this. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: set up L2 table entries properlyJan Hoffmann2022-10-261-10/+19
| | | | | | | | | | | | | | | | | | | | | | | Initialize the data structure using memset to avoid the possibility of writing garbage values to the hardware. Always set a valid entry type, which should fix writing unicast entries on RTL930x. For unicast entries, set the is_static flag to prevent the switch from aging them out. Also set the rvid field for unicast entries. This is not strictly necessary, as the switch fills it in automatically from a non-zero vid. However, this makes the code consistent with multicast entry setup. While at it, reorder the statements and fix some style issues (double space, comma instead of semicolon at end of statement). Also remove the unneeded priv parameter and debug print for the multicast entry setup function. Fixes: cde31976e37 ("realtek: Add support for Layer 2 Multicast") Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: reduce excessive logging for FDB operationsJan Hoffmann2022-10-232-68/+3
| | | | | | | | | | | | Currently several messages at KERN_INFO level are printed for every FDB del/dump operation. This can cause a significant slowdown for example while using "bridge fdb", and may even trigger a watchdog. Remove most of these log messages, as the new L2 table debugfs node should be a good replacement. Change the remaining messages to KERN_DEBUG level. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: add debugfs node for L2 tableJan Hoffmann2022-10-231-0/+107
| | | | | | | This allows to view all unicast and multicast entries that are currently in the L2 hash table and the CAM. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: avoid busy waiting for RTL839x PHY read/writeJan Hoffmann2022-10-231-12/+33
| | | | | | | Switch to a polling implementation similar to the one for RTL838x, to allow other kernel tasks to run while waiting. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: cleanup rtl83{8x,9x}_enable_learning/floodINAGAKI Hiroshi2022-10-082-44/+22
| | | | | | | | | | | | | In *_enable_learning() only address learning should be configured, so remove enabling forwarding. Forwarding is configured by the respective *_enable_flood() functions. Clean up both functions for RTL838x and RTL839x, and fix the comment on the number of entries. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> [squash RTL838x, RTL839x changes] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: swap *_phylink_mac_link_down() contentsINAGAKI Hiroshi2022-10-081-7/+8
| | | | | | | | | Fix the (accidentally?) swapped contents of rtl83xx_phylink_mac_link_down() and rtl93xx_phylink_mac_link_down(). Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> [amend commit message] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: fix place of fdb/mdb info messagesINAGAKI Hiroshi2022-10-081-2/+2
| | | | | | | | | Those messages should be printed when entry was found (idx >= 0). Move them to the right place to not print invalid entry indices. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> [amden commit message] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: rtl838x: Fix ethernet polling timeout on probeOlliver Schinagl2022-09-141-1/+2
| | | | | | | | | | Due to an oversight we accidentally inverted the timeout check. This patch corrects this. Fixes: 9cec4a0ea45b ("realtek: Use built-in functionality for timeout loop") Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> [ wrap poll_timeout line to 80 char ] Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
* realtek: Use built-in functionality for timeout loopOlliver Schinagl2022-09-141-12/+7
| | | | | | | | | | In commit 81e3017609be ("realtek: clean up rtl838x MDIO busy wait loop") a hand-crafted loop was created, that nearly exactly replicate the iopoll's `read_poll_timeout` functionality. Use that instead. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
* realtek: ignore disabled switch portsSander Vanheule2022-08-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | When marking a switch port as disabled in the device tree, by using 'status = "disabled";', the switch driver fails on boot, causing a restart: CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802c3064, ra == 8022b4b4 [ ... ] Call Trace: [<802c3064>] strlen+0x0/0x2c [<8022b4b4>] start_creating.part.0+0x78/0x194 [<8022bd3c>] debugfs_create_dir+0x44/0x1c0 [<80396dfc>] rtl838x_dbgfs_port_init+0x54/0x258 [<80397508>] rtl838x_dbgfs_init+0xe0/0x56c This is caused by the DSA subsystem (mostly) ignoring the port, while rtl83xx_mdio_probe() still extracts some details on this disabled port from the device tree, resulting in the usage of a NULL pointer where a port name is expected. By not probing ignoring disabled ports, no attempt is made to create a debugfs directory later. The device then boots as expected without the disabled port. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: clean up rtl838x MDIO busy wait loopJan Hoffmann2022-07-281-15/+22
| | | | | | | | | | | | | Don't use udelay to allow other kernel tasks to execute if the kernel has been built without preemption. Also determine the timeout based on jiffies instead of loop iterations. This is especially important on devices containing a watchdog with a short timeout. Without this change, the watchdog is not serviced during PHY patching which can take multiple seconds. Tested-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Jan Hoffmann <jan@3e8.eu>
* realtek: cleanup LAG loggingMarkus Stockhausen2022-06-261-12/+14
| | | | | | | | Setting up DSA bond silently fails if mode is not 802.3ad. Add log message to fix it. As we are already here harmonize all logging messages in the add/delete functions. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
* realtek: do not reset SerDes on link changeBirger Koblitz2022-05-112-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not reset the RTL930x SerDes on link changes, instead set up the SDS with internal PHYs for the SFP+ ports only. This fixes the 8 1GBit ports on the Zyxel XGS1250 which do not work without this patch. A complete SerDes reset was performed on all SerDes links. For copper 1Gbit ports, this is commonly a single XGMII link to an RTL8218D. There is however no support for setting up the XGMII link on RTL9300/RTL9310, thereby wiping the (RX/TX) setup done by u-boot and breaking the 1GBit ports. No SerDes reset should be done for these links. The handling of SGMII/HiSGMII, 1000BX or 10GR links is actually entirely different. All these modes need to be suitably RX calibrated and the pre- main and post- amplifiers set up properly for TX. The 10GBit SFP+ fiber links are recalibrated instead of reset, which e.g. is necessary when someone pulls a module out and puts another in. This makes swapping out 10GBit fiber modules possible. 1GBit modules are not yet supported, nor any modules with an internal phy. Tested-by: Stijn Segers <foss@volatilesystems.org> Signed-off-by: Birger Koblitz <git@birger-koblitz.de> [rewrite commit message based on discussion] Link: http://lists.infradead.org/pipermail/openwrt-devel/2022-May/038623.html Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: Trap all frames with switch as destination to CPU-portBirger Koblitz2022-05-081-0/+9
| | | | | | | | | | | | This fixes a bug where frames sent to the switch itself were flooded to all ports unless the MAC address of the CPU-port was learned otherwise. Tested-by: Wenli Looi <wlooi@ucalgary.ca> Tested-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: Birger Koblitz <git@birger-koblitz.de> [fix code formatting] Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: fix locking issuesBirger Koblitz2022-02-171-1/+0
| | | | | | | Fixe a coupld of locking issues found by applying lock debugging to the code. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: switch to use generic MDIO accessor functionsDaniel Golle2022-02-171-1/+4
| | | | | | | | Instead of directly calling SoC-specific functions in order to access (paged) MII registers or MMD registers, create infrastructure to allow using the generic phy_*, phy_*_paged and phy_*_mmd functions. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* realtek: implement Clause-45 MDIO write on rtl931xDaniel Golle2022-02-171-8/+19
| | | | | | | | | * Add missing Clause-45 write support for rtl931x * Switch to use helper functions in all Clause-45 access functions to make the code more readable. * More meaningful/unified debugging output (dynamic kprintf) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* realtek: add support for port led configuration on RTL93XXBirger Koblitz2022-02-175-7/+174
| | | | | | | | | Using the led-set attribute of a port in the dts we allow configuration of the port leds. Each led-set is being defined in the led-set configuration of the .dts, giving a specific configuration to steer the port LEDs via a serial connection. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Fix link status detection on RTL9302 for SFP modulesBirger Koblitz2022-02-172-3/+23
| | | | | | | For SFP slots on the RTL9302, the link status is not correctly detected. Use the link media status instead. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add RTL931X sub-targetBirger Koblitz2022-02-171-0/+25
| | | | | | | | We add the RTL931X sub-target with kernel configuration for a dual core MIPS InterAptive CPU. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add HW support for RTL931X for PIE, L2 and STP agingBirger Koblitz2022-02-172-52/+1188
| | | | | | | | We add HW support routines for the RTL931X SoC family for handling the Packet Inspection Engine, L2 table handling and STP aging. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Store and Restore MC memberships for port enable/disableBirger Koblitz2022-02-172-55/+86
| | | | | | | | | We need to store and restore MC memberships in HW when a port joins or leaves a bridge as well as when it is enabled or disabled, as these properties should not change in these situations. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Copy all BPDUs to the kernelBirger Koblitz2022-02-174-8/+140
| | | | | | | | In order to receive STP information at the kernel level, we make sure that all Bridge Protocol Data Units are copied to the CPU-Port. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add L2 aging configuration functions for all SoC familiesBirger Koblitz2022-02-176-19/+58
| | | | | | | | Instead of a generic L2 aging configuration function with complex logic, we implement an individual function for all SoC types. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realted: Add DSA bridge offload configurationBirger Koblitz2022-02-174-1/+139
| | | | | | | | Add functionality to enable or disable L2 learning offload and port flooding for RTL83XX. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add Link Aggregation (aka trunking) supportBirger Koblitz2022-02-178-15/+369
| | | | | | | | | This adds LAG support for all 4 SoC families, including support ofr the use of different distribution algorithm for the load- balancing between individual links. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Cleanup setting inner/outer PVID and Ingress/Egres VLAN filteringBirger Koblitz2022-02-176-28/+189
| | | | | | | | Use setting functions instead of register numbers in order to clean up the code. Also use enums to define inner/outer VLAN types and the filter type. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add SDS configuration routines for the RTL93XX platformsBirger Koblitz2022-02-171-7/+19
| | | | | | | | Adds configuration routines for the internal SerDes of the RTL930X and RTL931X. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Improve MAC config handling for all SoCsBirger Koblitz2022-02-173-34/+205
| | | | | | | | | Adds a rtl931x_phylink_mac_config for the RTL931X and improve the handling of the RTL930X phylink configuration. Add separate handling of the RTL839x since some configurations are different from the RTL838X. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Allow PHY-IDs to differ from Port numbersBirger Koblitz2022-02-171-9/+34
| | | | | | | | | We were using the PHY-ids (the reg entries in the PHY sections of the .dts) as the port numbers. Now scan the ports section in the .dts, and use the actual port numbers, following the phy-handle to the PHY properties. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Use SerDes Information from .dts for phylink configBirger Koblitz2022-02-172-5/+27
| | | | | | | | When a port is brought up, read the SDS-id via the phy_device for a given port and use this to configure the SDS when it is brought up. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
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