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* realtek: Add RTL931X sub-targetBirger Koblitz2022-02-171-0/+181
| | | | | | | | We add the RTL931X sub-target with kernel configuration for a dual core MIPS InterAptive CPU. Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add support for ZxXEL XGS1250-12 SwitchBirger Koblitz2022-02-171-0/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ZyXEL XGS1250-12 Switch is a 11 + 1 port multi-GBit switch with 8 x 1000BaseT, 3 x 1000/2500/5000/10000BaseT Ethernet ports and 1 SFP+ module slot. Hardware: - RTL9302B SoC - Macronix MX25L12833F (16MB flash) - Nanja NT5CC64M16GP-1 (128MB DDR3 SDRAM) - RTL8231 GPIO extender to control the port LEDs - RTL8218D 8x Gigabit PHY - Aquantia AQR113c 1/2.5/5/10 Gigabit PHYs - SFP+ 10GBit slot Power is supplied via a 12V 2A standard barrel connector. At the right side behind the grid is UART serial connector. A Serial header can be connected to from the outside of the switch trough the airvents with a standard 2.54mm header. Pins are from top to bottom Vcc(3.3V), TX, RX and GND. Serial connection is via 115200 baud, 8N1. A reset button is accessble through a hole in the front panel At the time of this commit, all ethernet ports work under OpenWRT, including the various NBaseT modes, however the 10GBit SFP+ slot is not supported. Installation -------------- * Connect serial as per the layout above. Connection parameters: 115200 8N1. * Navigate to 'Management' in the OEM web interface and click on 'Firmware upgrade' to the left. * Upload the OpenWrt initramfs image, and wait till the switch reboots. * Connect to the device through serial and change the U-boot boot command. > fw_setenv bootcmd 'rtk network on; boota' * Reboot, scp the sysupgrade image to /tmp, verify the checksum and flash it: > sysupgrade /tmp/openwrt-realtek-rtl930x-zyxel_xgs1250-12-squashfs-sysupgrade.bin * Upon reboot, you have a functional OpenWrt installation. Leave the bootcmd value as is - without 'rtk network on' the switch will fail to initialise the network. Web recovery ------------ The XGS1250-12 has a handy web recovery that will load when U-boot does not find a bootable kernel. In case you would like to trigger the web recovery manually, partially overwrite the firmware partition with some zeroes: # dd if=/dev/zero of=/dev/mtd5 bs=1M count=2 If you have serial connected you'll see U-boot will start the web recovery and print it's listening on 192.168.1.1, but by default it seems to be on the OEM default IP for the switch - 192.168.1.3. The web recovery only listens on HTTP (80) and *not* on 443 (HTTPS) unlike the web UI. Return to stock --------------- You can flash the ZyXEL firmware images to return to stock: # sysupgrade -F -n XGS1250-12_Firmware_V1.00(ABWE.1)C0.bix Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Adding RTL930X sub-targetBirger Koblitz2022-02-171-88/+33
| | | | | | This adds the RTL931X sub-target in the realtek target Makefile. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Add support for ZyXEL GS1900-48 SwitchBirger Koblitz2022-02-171-0/+326
| | | | | | | | | | | | | | | | | | | | | | | | The GS1900-48 is a 48 + 2 port Gigabit L2 switch with 48 gigabit ports. Hardware: RTL8393M SoC Macronix MX25l12805D (16MB flash) 128MB RAM 6 * RTL8218B external PHY 2 * RTL8231 GPIO extenders to control the port LEDs, system LED and Reset button 2 Uplink ports are SFP cages which support 1000 Base-X mini GBIC modules. Power is supplied via a 230 volt mains connector. The board has a hard reset switch SW1, which is is not reachable from the outside. J4 provides a 12V RS232 serial connector which is connected through U8 to the 3.3V UART of the RTL8393. Conversion is done by U8, a SIPEX 3232EC. To connect to the UART, wires can be soldered to R603 (TX) and R602 (RX). Installation: Install the squashfs image via Realtek's original Web-Interface. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Update rtl839x.dtsi for realtek,rtl-intc, new gpio controller ↵Birger Koblitz2022-02-171-0/+225
| | | | | | | | | | | | | | | | remove RTL8231 node Update the IRQ configuration to work with the new rtl-intc controller. Also change all KSEG1 addresses in reg = <> of the devics to physical addresses. Use the new gpio-otto controller instead of the legacy driver. Also remove the memory node as this is better put into a device .dts. Also remove the RTL8231 GPIO controller node from this base file since the chip might not be found in all Realtek RTL839x devices. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: Update RTL838X DTS to new Realtek IRQ controller notationBirger Koblitz2022-02-171-26/+13
| | | | | | | | Replace the interrupt controller node with the new realtek,rtl-intc node and change all device interrupts to use the 2 field notation: interrupts = <[SoC IRQ] [Index to MIPS IRQ]> Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
* realtek: netgear-gs110tpp: Add system LEDsSander Vanheule2021-12-271-0/+33
| | | | | | | | The GS110TPP has an RGB LED used for system status indication. Expose all three components as separate GPIO LEDs connected via the device's RTL8231. Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: netgear-gigabit: Enable RTL8231Sander Vanheule2021-12-271-2/+4
| | | | | | | | | | | | | | | | Since the move to 5.10, there are now two GPIO drivers. The gpio0 node refers to the internal GPIOs, so the indirect-access-bus-id is no longer relevant for that node. Set indirect-access-bus-id to the correct value (31) on the correct node (gpio1) and enable the device. Cc: Raylynn Knight <rayknight@me.com> Cc: Michael Mohr <akihana@gmail.com> Cc: Stijn Segers <foss@volatilesystems.org> Cc: Stijn Tintel <stijn@linux-ipv6.be> Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Bjørn Mork <bjorn@mork.no>
* realtek: netgear-gigabit: Add gpio-restart nodeSander Vanheule2021-11-281-0/+6
| | | | | | | | | | | | | | | | The Netgear GS110TPP v1 switch cannot reliably perform cold reboots using the system's internal reset controller. On this device, and the other supported Netgear switches, internal GPIO line 13 is connected to the system's hard reset logic. Expose this GPIO on all systems to ensure restarts work properly. Cc: Raylynn Knight <rayknight@me.com> Cc: Michael Mohr <akihana@gmail.com> Cc: Stijn Segers <foss@volatilesystems.org> Cc: Stijn Tintel <stijn@linux-ipv6.be> Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Bjørn Mork <bjorn@mork.no>
* realtek: add missing GPIO irq propertiesSander Vanheule2021-11-281-0/+4
| | | | | | | | | The internal GPIO controller on RTL838x is also an IRQ controller, which requires the 'interrupt-controller' and '#interrupts-cells' properties to be present in the device tree. Reported-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net>
* realtek: Add and enable watchdog nodeSander Vanheule2021-11-242-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add and enable the Realtek Otto WDT peripheral found on these SoCs. Default all devices to use standard (cold) reboot and "soc" resets. Devices that require the PLL value fixup before restarting, should pick the "cpu" or "software" reset mode. These devices also need to provide a custom reboot mode, by adding the reboot argument to the kernel command line: WDT reset mode | kernel reboot mode ----------------+--------------------------------------- soc | reboot=cold (default if not specified) cpu | reboot=warm software | reboot=software Preferrably, these devices should use an alternative restart method like gpio-restart to provide reliable restarts. Note that watchdog restarts are not yet exposed, since the _machine_restart override is still present. Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Stijn Segers <foss@volatilesystems.org> Tested-by: Paul Fertser <fercerpav@gmail.com> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
* realtek: Add Lexra bus clockSander Vanheule2021-11-242-8/+13
| | | | | | | | | | | | | | | | | The CPU peripherals on RTL83xx/RTL930x are connected to the CPU via the Lexra bus. This bus can provide a clock signal to these peripherals, but no clock driver is currently available. Instead, use a fixed-clock to provide the clock frequency, and update the dependent peripherals. Lexra bus clock frequencies: - RTL838x: 200MHz - RTL839x: 200MHz - RTL930x: 175MHz Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Stijn Segers <foss@volatilesystems.org> Tested-by: Paul Fertser <fercerpav@gmail.com> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
* realtek: Consolidate bootargsSander Vanheule2021-11-248-26/+2
| | | | | | | | | | All current devices use identical bootargs, so let's move that to the common devicetree includes. Signed-off-by: Sander Vanheule <sander@svanheule.net> Tested-by: Stijn Segers <foss@volatilesystems.org> Tested-by: Paul Fertser <fercerpav@gmail.com> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
* realtek: enable uart1 on the devices with PoE support in 5.10INAGAKI Hiroshi2021-09-267-0/+28
| | | | | | | | | | | | | | | | On the devices with PoE support, the secondary UART (uart1) on the SoC is used to communicate between the SoC and controller. Enable the secondary UART on the following devices: - D-Link DGS-1210-10P - Netgear GS110TPP v1 - Netgear GS310TP v1 - ZyXEL GS1900-8HP v1/v2 - ZyXEL GS1900-10HP - ZyXEL GS1900-24HP v2 Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: use physical addresses in soc dtsi in 5.10INAGAKI Hiroshi2021-09-262-12/+12
| | | | | | Use physical addresses instead of virtual address in dts files. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: use gpio-keys instead of "-polled" if SoC GPIO is used in 5.10INAGAKI Hiroshi2021-09-262-4/+2
| | | | | | | | The new backported GPIO driver supports interrupt, so use gpio-keys instead of gpio-keys-polled for keys connected to the internal GPIO controller. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: update GPIO bindings in the dts files in dts-5.10INAGAKI Hiroshi2021-09-266-33/+29
| | | | | | | | | | | | | | | | | | | this patch includes the following changes: - adjust mapping for the new driver - GPIO 24 -> GPIO 0 - GPIO 47 -> GPIO 0 (+ disabling system LED) - disable pins in the invalid range (out of the range 0-31 of the new driver) - are these pins on the external RTL8231 (&gpio1)? - GPIO 67 (-> GPIO 3 on &gpio1?) - GPIO 94 (-> GPIO 30 on &gpio1?) - drop "indirect-access-bus-id" property from gpio0 node in device dts files Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: add pinmux node of LED_GLB_CTRL to rtl838x.dtsi in dts-5.10INAGAKI Hiroshi2021-09-261-0/+16
| | | | | | | This patch adds a pinctrl-single pinmux node to allow disabling system LED and enabling GPIO 0 (old driver: GPIO 24). Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: add "soc" node to soc dtsi in dts-5.10INAGAKI Hiroshi2021-09-262-129/+147
| | | | | | Add a "soc" node as a simple-bus to rtl838x.dtsi and rtl930x.dtsi. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: update soc dtsi in 5.10 for backported driversINAGAKI Hiroshi2021-09-262-6/+41
| | | | | | | | | | | | | | | this patch updates SoC dtsi (rtl838x.dtsi, rtl930x.dtsi) for the following backported drivers: - gpio-realtek-otto (5.13) - spi-realtek-rtl (5.12) - irq-realtek-rtl (5.12) And, disable SoC GPIO node (gpio0) in rtl930x.dtsi in dts-5.10. Currently, the upstreamed driver doesn't support the GPIO controller on RTL930x SoC. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: cleanup and update soc dtsi in 5.10INAGAKI Hiroshi2021-09-262-28/+11
| | | | | | | | | | the following changes are included in this patch: - node is enabled by default, drop 'status = "okay"' - adjust order of "compatible" lines and "reg" lines - add a new blank line before fixed-link node in rtl830x.dtsi Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* realtek: copy dts directory for Kernel 5.10INAGAKI Hiroshi2021-09-2621-0/+1707
This patch adds "dts-5.10" directory to use backported drivers. There are several specification changes in the new drivers, so there are some compatibility issues in using dts/dtsi files for 5.4. The old DTS files are moved to "dts-5.4", so their corresponding kernel version is obvious as well. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> [change "dts" to "dts-5.4", adjust Makefile] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-20 10:22:01 +0000