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* rampis: fix Reference to non-existent node for GB-PC2Arınç ÜNAL2022-12-311-2/+1
| | | | | | | | | | | | | | | Fix cannot build: Reference to non-existent node or label "macaddr_factory_e000" dtb compilation error. The cherry-pick had to be reworked to use the old mtd-mac-address way as openwrt-21.02 still wasn't migrated to nvmem implementation. Fixes: d604032c2a50 ("ramips: fix GB-PC1 and GB-PC2 device support") Fixes: #11654 Fixes: #11385 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> [ rework commit message, add more fixes tag ] Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
* generic: 5.4: refresh kernel patchesChristian Marangi2022-12-171-1/+1
| | | | | | Refresh kernel patches due to new spi nor patch. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
* ramips: fix GB-PC1 and GB-PC2 LEDsArınç ÜNAL2022-11-273-17/+15
| | | | | | | | | | | | | | | | Add the missing LEDs for GB-PC2. Some of these LEDs don't exist on the device schematics. Tests on a GB-PC2 by me and Petr proved otherwise. Remove ethblack-green and ethblue-green LEDs for GB-PC1. They are not wired to GPIO 3 or 4 and the wiring is currently unknown. Set ethyellow-orange to display link state and activity of the ethyellow interface for GB-PC2. Link: https://github.com/ngiger/GnuBee_Docs/blob/master/GB-PCx/Documents/GB-PC2_V1.1_schematic.pdf Tested-by: Petr Louda <petr.louda@outlook.cz> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> (cherry picked from commit 2a6ef7f53d7b96e4ee0200196c28ed6b0a7c8465)
* ramips: fix GB-PC1 and GB-PC2 device supportArınç ÜNAL2022-11-276-56/+69
| | | | | | | | | | | | | | | | | Change switch port labels to ethblack & ethblue. Change lan1 & lan2 LEDs to ethblack_act & ethblue_act and fix GPIO pins. Add the external phy with ethyellow label on the GB-PC2 devicetree. Do not claim rgmii2 as gpio, it's used for ethernet with rgmii2 function. Enable ICPlus PHY driver for IP1001 which GB-PC2 has got. Update interface name and change netdev function. Enable lzma compression to make up for the increased size of the kernel. Make spi flash bindings on par with mainline Linux to fix read errors. Tested on GB-PC2 by Petr. Tested-by: Petr Louda <petr.louda@outlook.cz> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> (cherry picked from commit 4807bd6a00bcf44dd821047db76a2a799f403cd4)
* kernel: mtd: backport SafeLoader parserRafał Miłecki2022-11-023-0/+3
| | | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl> (cherry picked from commit 711f1a8bcbdde1ee9e2934d707fb1765fc644268)
* ramips: rt3883: enable lzma-loader for Belkin F9K1109v1Robert Senderek2022-10-231-1/+1
| | | | | | | | Fixes boot loader LZMA decompression issues Fixes: #10968 Signed-off-by: Robert Senderek <robert.senderek@10g.pl> (cherry picked from commit ac296f621058119501ccd54e7cb2a243af5dc5a0)
* mt7620: fix missing kernel config symbolFederico Capoano2022-09-241-0/+1
| | | | | | | | | | | | | | | | Fixes following missing kernel config symbol after adding GPIO watchdog: Software watchdog (SOFT_WATCHDOG) [M/n/y/?] m Watchdog device controlled through GPIO-line (GPIO_WATCHDOG) [Y/n/m/?] y Register the watchdog as early as possible (GPIO_WATCHDOG_ARCH_INITCALL) [N/y/?] (NEW) Fixes: 1a97c03d864e ("rampis: feed zbt-we1026 external watchdog") Signed-off-by: Petr Štetiar <ynezz@true.cz> (cherry picked from commit fb2801b82c06878ae2ad20b8f95546c34ed3cdf4) [adapted to config-5.4] Signed-off-by: Federico Capoano <f.capoano@openwisp.io>
* rampis: feed zbt-we1026 external watchdogFederico Capoano2022-09-242-0/+9
| | | | | | | | | | | Without feeding the gpio watchdog, the board will reset after 90 seconds Signed-off-by: Arvid E. Picciani <aep@exys.org> (cherry picked from commit 1a97c03d864ee5ab917aff2988c62fce223c041e) [adapted to config-5.4] Signed-off-by: Federico Capoano <f.capoano@openwisp.io>
* kernel: bump 5.4 to 5.4.211Hauke Mehrtens2022-09-041-1/+1
| | | | | | | | | | | | | | Similar version was upstreamed: bcm27xx/patches-5.4/950-0392-tty-amba-pl011-Add-un-throttle-support.patch Manually adapted: ipq806x/patches-5.4/0063-2-tsens-support-configurable-interrupts.patch layerscape/patches-5.4/301-arch-0008-arm-add-new-non-shareable-ioremap.patch Compile-tested: x86/64 Run-tested: x86/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ramips: add support for YunCore AX820/HWAP-AX820Clemens Hopfer2022-08-284-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two versions which are identical apart from the enclosure: YunCore AX820: indoor ceiling mount AP with integrated antennas YunCore HWAP-AX820: outdoor enclosure with external (N) connectors Hardware specs: SoC: MediaTek MT7621DAT Flash: 16 MiB SPI NOR RAM: 128MiB (DDR3, integrated) WiFi: MT7905DAN+MT7975DN 2.4/5GHz 2T2R 802.11ax Ethernet: 10/100/1000 Mbps x2 (WAN/PoE+LAN) LED: Status (green) Button: Reset Power: 802.11af/at PoE; DC 12V,1A Antennas: AX820(indoor): 4dBi internal; HWAP-AX820(outdoor): external Flash instructions: The "OpenWRT support" version of the AX820 comes with a LEDE-based firmware with proprietary MTK drivers and a luci webinterface and ssh accessible under 192.168.1.1 on LAN; user root, no password. The sysupgrade.bin can be flashed using luci or sysupgrade via ssh, you will have to force the upgrade due to a different factory name. Remember: Do *not* preserve factory configuration! MAC addresses as used by OEM firmware: use address source 2g 44:D1:FA:*:0b Factory 0x0004 (label) 5g 46:D1:FA:*:0b LAA of 2g lan 44:D1:FA:*:0c Factory 0xe000 wan 44:D1:FA:*:0d Factory 0xe000 + 1 The wan MAC can also be found in 0xe006 but is not used by OEM dtb. Due to different MAC handling in mt76 the LAA derived from lan is used for 2g to prevent duplicate MACs when creating multiple interfaces. Signed-off-by: Clemens Hopfer <openwrt@wireloss.net> (cherry picked from commit 4891b865380e2b7f32acf0893df9c1ca9db8d4ea) [switch to mtd-mac-address instead of nvmem-cells]
* ramips: add support for Sitecom WLR-4100 v1 002Andrea Poletti2022-08-283-1/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sitecom WLR-4100 v1 002 (marked as X4 N300) is a wireless router Specification: SoC: MT7620A RAM: 64 MB DDR2 Flash: MX25L6405D SPI NOR 8 MB WIFI: 2.4 GHz integrated Ethernet: 5x 10/100/1000 Mbps QCA8337 USB: 1x 2.0 LEDS: 2x GPIO controlled, 5x switch Buttons: 1x GPIO controlled UART: row of 4 unpopulated holes near USB port, starting count from white triangle on PCB: VCC 3.3V GND TX RX baud: 115200, parity: none, flow control: none Installation Connect to one of LAN (yellow) ethernet ports, Open router configuration interface, Go to Toolbox > Firmware, Browse for OpenWrt factory image with dlf extension and hit Apply, Wait few minutes, after the Power LED will stop blinking, the router is ready for configuration. Known issues Some USB 2.0 devices work at full speed mode 1.1 only MAC addresses factory partition only contains one (binary) MAC address in 0x4. u-boot-env contains four (ascii) MAC addresses, of which two appear to be valid. factory 0x4 **:**:**:**:b9:84 binary u-boot-env ethaddr **:**:**:**:b9:84 ascii u-boot-env wanaddr **:**:**:**:b9:85 ascii u-boot-env wlanaddr 00:AA:BB:CC:DD:12 ascii u-boot-env iNICaddr 00:AA:BB:CC:DD:22 ascii The factory firmware only assigns ethaddr. Thus, we take the binary value which we can use directly in DTS. Additional information OEM firmware shell password is: SitecomSenao useful for creating backup of original firmware. There is also another revision of this device (v1 001), based on RT3352 SoC The nvmem feature (commit 06bb4a5) was introduced in master after the splitting of the 21.02 branch. It need to be reverted in 21.02.. Signed-off-by: Andrea Poletti <polex73@yahoo.it> [remove config DT label, convert to nvmem, remove MAC address setup from u-boot-env, add MAC address info to commit message] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit de0c380a5f8289839ab970e794a45f0e04a466a3) Signed-off-by: Petr Štetiar <ynezz@true.cz>
* kernel: bump 5.4 to 5.4.203Hauke Mehrtens2022-07-032-4/+4
| | | | | | | | | | | | | | | Merged upstream: bcm27xx/patches-5.4/950-1014-Revert-mailbox-avoid-timer-start-from-callback.patch generic/backport-5.4/080-wireguard-0021-crypto-blake2s-generic-C-library-implementation-and-.patch Manually adapted: layerscape/patches-5.4/801-audio-0005-Revert-ASoC-fsl_sai-Add-support-for-SAI-new-version.patch oxnas/patches-5.4/100-oxnas-clk-plla-pllb.patch Compile-tested: lantiq/xrx200 Run-tested: lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ramips: fix booting on ZyXEL NBG-419N v2Piotr Dymacz2022-06-201-0/+1
| | | | | | | | | | | | | | This fixes a well known "LZMA ERROR 1" error, reported previously on numerous of other devices from 'ramips' target. Fixes: #9842 Fixes: #8964 Reported-by: Juergen Hench <jurgen.hench@gmail.com> Tested-by: Juergen Hench <jurgen.hench@gmail.com> Signed-off-by: Demetris Ierokipides <ierokipides.dem@gmail.com> Signed-off-by: Piotr Dymacz <pepe2k@gmail.com> (cherry picked from commit fd72e595c2b2a46bab8cbc7e9415fbfeae7b5b0d)
* ramips: fix RT-AC57U button levelDavid Bauer2022-06-181-1/+1
| | | | | | | | Both buttons on the RT-AC57U are active-low. Fix the GPIO flag for the WPS cutton to fix button behavior. Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 535b0c70b1c466733b009144f81f5207f1ecd311)
* ramips: zbt-wg2626: Add the reset gpio for PCIe port 1Alban Bedel2022-05-011-0/+3
| | | | | | | | | | | | | | The 2.4GHz interface doesn't come up properly with the log showing: mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK) As seen on other MT7621 boards this is caused by a missing reset GPIO. The MT7621 dtsi set GPIO 19 as PCIe reset GPIO, which on this board reset the 5GHz interface on port 0. Add GPIO 8 to the PCIe reset GPIO list to also reset the 2.4GHz interface on port 1. Signed-off-by: Alban Bedel <albeu@free.fr> (cherry picked from commit f953a1a4bfba2fa70c12bb80938aa66481a673b6)
* ramips: mt7620: disable SOC VLANs for external switchesMichael Pratt2022-04-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | These boards have AR8327 or QCA8337 external ethernet switch. The SOC also has it's own internal switch where VLAN is now enabled by default. Changes to preinit caused all switches to have VLANs enabled by default even if they are not configured with a topology in uci_defaults (see commit f017f617aecbd47debd4d3a734dc0e471342db96) When both internal and external switches have VLANs, and the external switch has both LAN and WAN, the TX traffic from the SOC cannot flow to the tagged port on the external switch because the VLAN IDs are not matching. So disable the internal switch VLANs by default on these boards. Also, add a topology for the internal switch, so that on LuCI there is not an "unknown topology" warning. In theory, it may be possible to have LAN ports on both switches through internal and external PHYs, but there are no known boards that have this. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 2adeada04558848058105cdad8195848d10d1486)
* ramips: mt7620: ethernet: use more macros and bump versionMichael Pratt2022-04-194-7/+11
| | | | | | | | | | | | | | | | Define and use some missing macros, and use them instead of BIT() or numbers for more readable code. Add comment for a bit change that seems unrelated to ethernet but is actually needed (PCIe Root Complex mode). Remove unknown and unused macro RST_CTRL_MCM (probably from MT7621 / MT7622) This is the last of a series of fixes, so bump version. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 88a0cebadfecb6ebb9f5f535e74f7f7574f513f3)
* ramips: mt7620: fix RGMII TXID PHY modeMichael Pratt2022-04-191-1/+1
| | | | | | | | | | | | | | | the register bits for TX delay and RX delay are opposites: when TX delay bit is set, delay is enabled when RX delay bit is set, delay is disabled So, when both bits are unset, it is RX delay and when both bits are set, it is TX delay Note: TXID is the default RGMII mode of the SOC Fixes: 5410a8e2959a ("ramips: mt7620: add rgmii delays support") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 26c84b2e46caba1ae17bc82a533c99eee65e7004)
* ramips: mt7620: add ephy-disable option to switch driverMichael Pratt2022-04-192-2/+13
| | | | | | | | | | | | | | | Add back the register write to disable internal PHYs as a separate option in the code that can be set using a DTS property. Set the option to true by default when an external mt7530 switch is identified. This makes the driver more in sync with original SDK code while keeping the lines separated into different options to accommodate any board with any PHY layout. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit cc6fd6fbb505071e08011f7998afaffefcf08fd3)
* ramips: mt7620: move mt7620_mdio_mode() to ethernet driverMichael Pratt2022-04-195-74/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function mt7620_mdio_mode is only called once and both the function and mdio_mode block have been named incorrectly, leading to confusion and useless commits. These lines in the mdio_mode block of mt7620_hw_init are only intended for boards with an external mt7530 switch. (see commit 194ca6127ee18cd3a95da4d03f02e43b5428c0bb) Therefore, move lines from mdio_mode to the place in soc_mt7620.c where the type of mt7530 switch is identified, and move lines from mt7620_mdio_mode to a main function. mt7620_mdio_mode was called from mt7620_gsw_init where the priv struct is available, so the lines must stay in mt7620_gsw_init function. In order to keep things as simple as possible, keep the DTS property related function calls together, by moving them from mt7620_gsw_probe to init. Remove the now useless DTS properties and extra phy nodes. Fixes: 5a6229a93df8 ("ramips: remove superfluous & confusing DT binding") Fixes: b85fe43ec8c4 ("ramips: mt7620: add force use of mdio-mode") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 6972e498d33ec896c676b7af91e3bfb00aa846a1)
* ramips: mt7620: use DTS to set PHY base address for external PHYsMichael Pratt2022-04-1924-7/+60
| | | | | | | | | | | | | | | | | | | | | | | | Set the PHY base address to 12 for mt7530 and 8 for others, which is based on the default setting for some devices from printing the register with the following command after it is written to by uboot during the boot cycle. `md 0x10117014 1` PHY_BASE option only uses 5 bits of the register, bits 16 to 20, so use 8-bit integer type. Set the option using the DTS property mediatek,ephy-base and create the gsw node if missing. Also, added a kernel message to display the EPHY base address. Note: If anything is written to a PHY address that is greater than 1 hex char (greater than 0xf) then there is adverse effects with Atheros switches. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 0976b6c4262a11a8d0dab9aeb64f5cdee266c44a)
* ramips: mt7620: allow both internal and external PHYsMichael Pratt2022-04-191-62/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the new variable ephy_base was introduced, it was not applied to the if block for mdio_mode. The first line in the mdio_mode if block sets the EPHY base address to 12 in the SOC by writing a register, but the corresponding variable in the driver was still set to the default of 0. This causes subsequent lines that write registers with the function _mt7620_mii_write to write to PHY addresses 0 through 4 while internal PHYs have been moved to addresses 12 through 16. All of these lines are intended only for PHYs on the SOC internal switch, however, they are being written to external ethernet switches if they exist at those PHY addresses 0 through 4. This causes some ethernet ports to be broken on boards with AR8327 or QCA8337 switch. Other suggested fixes move those lines to the else block of mdio_mode, but removing the else block completely also fixes it. Therefore, move the lines to the mt7620_hw_init function main block, and have only one instance of the function mtk_switch_w32 for writing the register with the EPHY base address. In theory, this also allows for boards that have both external switches and internal PHYs that lead to ethernet ports to be supported. Fixes: 391df3782914 ("ramips: mt7620: add EPHY base mdio address changing possibility") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit de5394a29dae9356a830d043e76591698411e97a)
* ramips: mt7620: fix ethernet driver GMAC port initMichael Pratt2022-04-192-15/+9
| | | | | | | | | | | | | | | | | | | | | | | | A workaround was added to the switch driver to set SOC port 4 as an RGMII GMAC interface based on the DTS property mediatek,port4-gmac. (previously mediatek,port4) However, the ethernet driver already does this, but is being blocked by a return statement whenever the phy-handle and fixed-link properties are both missing from nodes that define the port properties. Revert the workaround, so that both the switch driver and ethernet driver are not doing the same thing and move the phy-handle related lines down so nothing is ending the function prematurely. While at it, clean up kernel messages and delete useless return statements. Fixes: f6d81e2fa1f1 ("mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possible") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit afd60d650e769e9578eac5bb3647807f683aaf7c)
* ramips: mt7620: remove useless GMAC nodesMichael Pratt2022-04-194-27/+4
| | | | | | | | | | | | | | | | | | | | These nodes are used for configuring a GMAC interface and for defining external PHYs to be accessed with MDIO. None of this is possible on MT7620N, only MT7620A, so remove them from all MT7620N DTS. When the mdio-bus node is missing, the driver returns -NODEV which causes the internal switch to not initialize. Replace that return so that everything works without the DTS node. Also, an extra kernel message to indicate for all error conditions that mdio-bus is disabled. Fixes: d482356322c9 ("ramips: mt7620n: add mdio node and disable port4 by default") Fixes: aa5014dd1a58 ("ramips: mt7620n: enable port 4 as EPHY by default") Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit a2acdf9607045e5669c305c57dd7c77be8351ba0)
* ramips: mt7620: simplify DTS properties for GMACMichael Pratt2022-04-1941-125/+23
| | | | | | | | | | | | | | | | | | | | There are only 2 options in the driver for the function of mt7620 internal switch port 4: EPHY mode (RJ-45, internal PHY) GMAC mode (RGMII, external PHY) Let the DTS property be boolean instead of string where EPHY mode is the default. Fix how the properties are written for all DTS that use them, and add missing nodes where applicable, and remove useless nodes, and minor DTS formatting. Signed-off-by: Michael Pratt <mcpratt@pm.me> (cherry picked from commit 953bfe2eb3b7236a72fa41ab2204fdaa9fd09f65)
* ramips: mt7620: enable autonegotiation for all portsGaspare Bruno2022-04-191-0/+1
| | | | | | | | | | This enables autonegotiation for all ephy ports on probe. Some devices do not configure the ports, particularly port 4. Signed-off-by: Gaspare Bruno <gaspare@anlix.io> [replace magic values ; reword commit message] Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 0056ffb468f40f34bea006eb889b70c9a4f562e0)
* ramips: make PHY initialization more descriptiveDavid Bauer2022-04-191-3/+4
| | | | | | | | The basic mode control register of the ESW PHYs is modified in this codeblock. Use the respective macros to make this code more readable. Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 6a15abbc753ca728d798cec9153fc532fce3791d)
* ramips: add support for the Wavlink WL-WN579X3Ben Gainey2022-04-194-0/+227
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | About the device ---------------- SoC: MediaTek MT7620a @ 580MHz RAM: 64M FLASH: 8MB WiFi: SoC-integrated: MediaTek MT7620a bgn WiFi: MediaTek MT7612EN nac GbE: 2x (RTL8211F) BTN: - WPS - Reset - Router/Repeater/AP (3-way slide-switch) LED: - WPS (blue) - 3-segment Wifi signal representation (blue) - WiFi (blue) - WAN (blue) - LAN (blue) - Power (blue) UART: UART is present as Pads with through-holes on the PCB. They are located next to the reset button and are labelled Vcc/TX/RX/GND as appropriate. Use 3.3V, 57600-8N1. Installation ------------ Using the webcmd interface -------------------------- Warning: Do not update to the latest Wavlink firmware (version 20201201) as this removes the webcmd console and you will need to use the serial port instead. You will need to have built uboot/sqauashfs image for this device, and you will need to provide an HTTP service where the image can be downloaded from that is accessible by the device. You cannot use the device manufacturers firmware upgrade interface as it rejects the OpenWrt image. 1. Log into the device's admin portal. This is necessary to authenticate you as a user in order to be able to access the webcmd interface. 2. Navigate to http://<device-ip>/webcmd.shtml - you can access the console directly through this page, or you may wish to launch the installed `telnetd` and use telnet instead. * Using telnet is recommended since it provides a more convenient shell interface that the web form. * Launch telnetd from the form with the command `telnetd`. * Check the port that telnetd is running on using `netstat -antp|grep telnetd`, it is likely to be 2323. * Connect to the target using `telnet`. The username should be `admin2860`, and the password is your admin password. 3. On the target use `curl` to download the image. e.g. `curl -L -O http://<some-other-lan-ip>/openwrt-ramips-mt7620-\ wavlink_wl-wn579x3-squashfs-sysupgrade.bin`. Check the hash using `md5sum`. 4. Use the mtd_write command to flash the image. * The flash partition should be mtd4, but check /sys/class/mtd/mtd4/name first. The partition should be called 'Kernel'. * To flash use the following command: `mtd_write -r -e /dev/mtd<n> write <image-file> /dev/mtd<n>` Where mtd<n> is the Kernel partition, and <image-file> is the OpenWrt image previously downloaded. * The command above will erase, flash and then reboot the device. Once it reboots it will be running OpenWrt. Connect via ssh to the device at 192.168.1.1 on the LAN port. The WAN port will be configured via DHCP. Using the serial port --------------------- The device uses uboot like many other MT7260a based boards. To use this interface, you will need to connect to the serial interface, and provide a TFTP server. At boot follow the bootloader menu and select option 2 to erase/flash the image. Provide the address and filename details for the tftp server. The bootloader will do the rest. Once the image is flashed, the board will boot into OpenWrt. The console is available over the serial port. Signed-off-by: Ben Gainey <ba.gainey@googlemail.com> (cherry picked from commit a509b80065b6680e3e007203084c147f77b6717f)
* ramips: split Youku YK1 to YK-L1 and YK-L1cShiji Yang2022-04-195-12/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device specifications: * Model: Youku YK-L1/L1c * CPU: MT7620A * RAM: 128 MiB * Flash: 32 MiB (YK-L1)/ 16 MiB (YK-L1c) * LAN: 2* 10M/100M Ports * WAN: 1* 10M/100M Port * USB: 1* USB2.0 * SD: 1* MicroSD socket * UART: 1* TTL, Baudrate 57600 Descriptions: Previous supported device YOUKU yk1 is actually Youku YK-L1. Though they look really different, the only hardware difference between the two models is flash size, YK-L1 has 32 MiB flash but YK-L1c has 16MiB. It seems that YK-L1c can compatible with YK-L1's firmware but it's better to split it to different models. It is easy to identify the models by looking at the label on the bottom of the device. The label has the model number "YK-L1" or "YK-L1c". Due to different flash sizes, YK-L1c that using previous YK-L1's firmware needs to apply "force update" to install compatible firmware, so please backup config file before system upgrade. Signed-off-by: Shiji Yang <yangshiji66@qq.com> [use more specific name for DTSI] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit 4a9f389ed2dcee18a5c5e1f0d4e5c406f9290579)
* ramips: improve pinctrl for Youku YK-L1Shiji Yang2022-04-192-16/+4
| | | | | | | | 1. rename led pin "air" to a more common name "wlan" and use "phy0tpt" to trigger it. 2. led "wan" can be triggered by ethernet pinctrl by default so just drop it. Signed-off-by: Shiji Yang <yangshiji66@qq.com> (cherry picked from commit 882a6116d3d6394dd109350287067accebbf6114)
* ramips: speed up spi frequency for Youku YK-L1Shiji Yang2022-04-191-1/+1
| | | | | | | | | | | | Youku YK-L1 has a huge storage space up to 32 MB. It is better to use a higher spi clock to read or write serial nor flash chips. Youku YK-L1 has Winbond w25q256fvfg on board that can support 104 MHz spi clock so 48 MHz is safe enough. The real frequency can only be sysclk(580MHz ) /3 /(2^n) so 80 MHz defined in dts file will set only 48 MHz in spi bus. Signed-off-by: Shiji Yang <yangshiji66@qq.com> (cherry picked from commit bf7ddb18f1bfa0b61b4dc43732c114f20900bd4b)
* ramips: remove obsolete mx25l25635f compatible hackDENG Qingfang2022-04-194-4/+4
| | | | | | | | The kernel bump to 5.4 has removed the mx25l25635f hack, and the mx25l25635f compatible is no longer required. Signed-off-by: DENG Qingfang <dqfext@gmail.com> (cherry picked from commit 06af45ec0502d5cb0529ac46fcb34c4c63394723)
* ramips: fix reboot for remaining 32 MB boardsMichael Pratt2022-04-0818-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following devices have a Winbond W25Q256FV flash chip, which does not have the RESET pin enabled by default, and otherwise would require setting a bit in a status register. Before moving to Linux 5.4, we had the patch: 0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch which kept specific flash chips with explicit 3-byte and 4-byte address modes to stay in 3-byte address mode while idle (after an erase or write) by using a custom flag SPI_NOR_4B_READ_OP that was part of the patch. this was obsoleted by the patch: 481-mtd-spi-nor-rework-broken-flash-reset-support.patch which uses the newer upstream flag SNOR_F_BROKEN_RESET for devices with a flash chip that cannot be hardware reset with RESET pin and therefore must be left in 3-byte address mode when idle. The new patch requires that the DTS of affected devices have the property "broken-flash-reset", which was not yet added for most of them. This commit adds the property for remaining affected devices in ramips target, specifically because of the flash chip model. However, it is possible that there are other devices where the flash chip uses an explicit 4-byte address mode and the RESET pin is not connected to the SOC on the board, and those DTS would also need this property. Ref: 22d982ea0033 ("ramips: add support for switching between 3-byte and 4-byte addressing") Ref: dfa521f12953 ("generic: spi-nor: rework broken-flash-reset") Signed-off-by: Michael Pratt <mcpratt@pm.me> [pepe2k@gmail.com: backported to 21.02] Fixes: #9655, #9636, #9547 Signed-off-by: Piotr Dymacz <pepe2k@gmail.com> (backported from commit 74516f4357d281f093f0daac01c4c5c239acc443)
* ramips: remove kmod-mt7663-firmware-sta from device packagesFelix Fietkau2022-03-231-2/+2
| | | | | | | | | This firmware should only be used for mobile devices (e.g. laptops), where AP mode functionality is typically not used. This firmware supports a lot of power saving offload functionality at the expense of AP mode support. Signed-off-by: Felix Fietkau <nbd@nbd.name> (cherry picked from commit a1ac8728f80314c574201013e7fea58536c2b3ee)
* Revert "ramips: increase spi-max-frequency for ipTIME mt7620 devices"Sungbo Eo2022-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | This reverts commit 13a185bf8acb67da4a68873e560876c0e60b1a87. There was a report that one A1004ns device fails to detect its flash chip correctly: [ 1.470297] spi-nor spi0.0: unrecognized JEDEC id bytes: e0 10 0c 40 10 08 [ 1.484110] spi-nor: probe of spi0.0 failed with error -2 It also uses a different flash chip model: * in my hand: Winbond W25Q128FVSIG (SOIC-8) * reported: Macronix MX25L12845EMI-10G (SOP-16) Reducing spi-max-frequency solved the detection failure. Hence revert. Reported-by: Koasing <koasing@gmail.com> Tested-by: Koasing <koasing@gmail.com> Signed-off-by: Sungbo Eo <mans0n@gorani.run> (cherry picked from commit 9968a909c248169064446ed40e66d18986d93d11)
* ramips: mt7621: do memory detection on KSEG1Chuanhong Guo2022-02-221-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | It's reported that current memory detection code occasionally detects larger memory under some bootloaders. Current memory detection code tests whether address space wraps around on KSEG0, which is unreliable because it's cached. Rewrite memory size detection to perform the same test on KSEG1 instead. While at it, this patch also does the following two things: 1. use a fixed pattern instead of a random function pointer as the magic value. 2. add an additional memory write and a second comparison as part of the test to prevent possible smaller memory detection result due to leftover values in memory. Fixes: 6d91ddf517 ("ramips: mt7621: add support for memory detection") Reported-by: Rui Salvaterra <rsalvaterra@gmail.com> Tested-by: Rui Salvaterra <rsalvaterra@gmail.com> Signed-off-by: Chuanhong Guo <gch981213@gmail.com> (cherry picked from commit 2f024b79331141e2a62c9bf3601c803b26bde77b) [backport for OpenWrt 21.02 as it was reproducible with Kernel 5.4, see [1]] [1]: https://forum.openwrt.org/t/113081 Tested-by: Dimitri Souza <dimitri.souza@gmail.com> [mt7621/archer-c6-v3] Signed-off-by: Szabolcs Hubai <szab.hu@gmail.com>
* ramips: fix NAND flash driver ECC bit position maskFelix Fietkau2022-02-161-1/+1
| | | | | | | | | The bit position mask was accidentally made too wide, overlapping with the LSB from the byte position mask. This caused ECC calculation to fail for odd bytes Signed-off-by: Chad Monroe <chad.monroe@smartrg.com> Signed-off-by: Felix Fietkau <nbd@nbd.name> (cherry-picked from commit 918d4ab41ea34358c747aab5471bbb0a2a786dd8)
* kernel: bump 5.4 to 5.4.179Hauke Mehrtens2022-02-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Many changes were done in drivers/pinctrl/bcm/pinctrl-bcm2835.c between 5.4.171 and 5.4.179. The following 3 patches do not apply any more: * target/linux/bcm27xx/patches-5.4/950-0316-pinctrl-bcm2835-Add-support-for-BCM2711-pull-up-func.patch This was already integrated in kernel v5.4-rc1, it was never needed. * target/linux/bcm27xx/patches-5.4/950-0328-Revert-pinctrl-bcm2835-Pass-irqchip-when-adding-gpio.patch * target/linux/bcm27xx/patches-5.4/950-0362-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch I think these were done to fix the problem which was really fixed in commit 75278f1aff5e ("pinctrl: bcm2835: Change init order for gpio hogs") from v5.4.175 target/linux/generic/backport-5.4/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch Move fwnode_device_is_available to the same position as in kernel 5.10. target/linux/layerscape/patches-5.4/302-dts-0083-arm64-ls1028a-qds-correct-bus-of-rtc.patch Applied in commit 65816c1034769e714edb70f59a33bc5472d9e55f ("arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus") Compile-tested: lantiq/xrx200, bcm27xx/bcm2710 Run-tested: lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* kernel: bump 5.4 to 5.4.163Hauke Mehrtens2021-12-124-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed upstreamed: target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch The following patch does not apply to upstream any more and needs some more work to make it work fully again. I am not sure if we are still able to set the UART to a none standard baud rate. target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch These patches needed manually changes: target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch All others updated automatically. Compile-tested on: malta/le, armvirt/64, lantiq/xrx200 Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ramips: fix tl-mr3020-v3 switch topology to configure vlans via luciSergey V. Lobanov2021-12-051-1/+4
| | | | | | | | | | | Currently it is not possible to configure VLANs via LUCI on tplink tl-mr3020-v3. This patch fixes switch topology for the LUCI interface. Signed-off-by: Sergey V. Lobanov <sergey@lobanov.in> [copied commit message from github PR] Signed-off-by: Christian Lamparter <chunkeey@gmail.com> (cherry picked from commit e22c91e144d63ccbd7b76b370a53652c48db1d6f)
* kernel: bump 5.4 to 5.4.158Hauke Mehrtens2021-11-072-3/+3
| | | | | | | | | | | | Removed upstreamed: generic/backport-5.4/790-v5.7-net-switchdev-do-not-propagate-bridge-updates-across.patch All others updated automatically. Compile-tested on: lantiq/xrx200, armvirt/64 Runtime-tested on: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ramips: minew g1-c: Allow dynamic RAM sizesBruno Randolf2021-11-011-5/+0
| | | | | | | | Allow RAM size to be passed thru U-Boot. There are 128MB and 64MB versions of Minew G1-C. This is also in line with the behaviour of most other RAMIPS boards. Signed-off-by: Bruno Randolf <br1@einfach.org>
* ramips: add support for minew g1-cAlexander Couzens2021-09-213-0/+152
| | | | | | | | | | | | | | | | | | | | | | The minew g1-c is a smart home gateway / BLE gateway. A Nordic nRF52832 is available via USB UART (cp210x) to support BLE. The LED ring is a ring of 24x ws2812b connect to a generic GPIO (unsupported). There is a small LED which is only visible when the device is open which will be used as LED until the ws2812b is supported. The board has also a micro sdcard/tfcard slot (untested). The Nordic nRF52832 exposes SWD over a 5pin header (GND, VCC, SWD, SWC, RST). The vendor uses an older OpenWrt version, sysupgrade can be used via serial or ssh. CPU: MT7628AN / 580MHz RAM: DDR2 128 MiB RAM Flash: SPI NOR 16 MiB W25Q128 Ethernet: 1x 100 mbit (Port 0) (PoE in) USB: USB hub, 2x external, 1x internal to USB UART Power: via micro usb or PoE 802.11af UART: 3.3V, 115200 8n1 Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
* kernel: bump 5.4 to 5.4.137Hauke Mehrtens2021-07-311-2/+2
| | | | | | | | | | | | Manually rebased generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch All others updated automatically. Compile-tested on: ramips/mt7621, armvirt/32 Runtime-tested on: ramips/mt7621, armvirt/32 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ramips: mt76x8: add missing config symbolDavid Bauer2021-07-301-0/+1
| | | | | | PWM_MEDIATEK was not defined, breaking builds for the mt76x8 subtarget. Signed-off-by: David Bauer <mail@david-bauer.net>
* ramips: mt7620: add kernel size for Jboot devicesPawel Dembicki2021-06-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since few months multiple users reported problems with various JBoot devices. [0][1][2][3] All of them was bricked. On my Lava LR-25G001 it freezes with current snapshot: CDW57CAM_003 Jboot B695 Giga Switch AR8327 init AR8327/AR8337 id ==> 0x1302 JRecovery Version R1.2 2014/04/01 18:25 SPI FLASH: MX25l12805d 16M . . (freeze) The kernel size is >2048k. I built current master with minimal config and it boots well: CDW57CAM_003 Jboot B695 Giga Switch AR8327 init AR8327/AR8337 id ==> 0x1302 JRecovery Version R1.2 2014/04/01 18:25 SPI FLASH: MX25l12805d 16M . ........................... Starting kernel @80000000... [ 0.000000] Linux version 5.4.124 Kernel size is <2048k. Jboot bootloader isn't open source, so it's impossible to find solution in code. It looks, that some buffer for kernel have 2MB size. To avoid bricked devices, this commit introduces 2048k limit kernel size for all jboot routers. [0] https://bugs.openwrt.org/index.php?do=details&task_id=3539 [1] https://eko.one.pl/forum/viewtopic.php?pid=254344 [2] https://eko.one.pl/forum/viewtopic.php?id=20930 [3] https://eko.one.pl/forum/viewtopic.php?pid=241376#p241376 Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> [remove Fixes:] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit e1d8a14cd0a9f8844f9ebb8ca220780b0ce5d6db)
* ramips: fix LAN LED trigger assignment for Xiaomi Router 3 ProAdam Elyas2021-06-121-2/+2
| | | | | | | | | | | | | The default trigger for the amber lights on lan1 and lan3 were mistakenly swapped after the device's migration to DSA. This caused activity on one port to trigger the amber light on the other port. Swapping their default trigger in the DTS file fixes that. Signed-off-by: Adam Elyas <adamelyas@outlook.com> [minor commit title adjustment, wrap commit message] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit edaf432bf411767f3e8a9e5effc3a416bcac46c7)
* ramips: fix Ethernet random MAC address for HILINK HLK-7628NLiu Yu2021-06-122-4/+5
| | | | | | | | | | | | | | | | | | | Set the ethernet address from flash. MAC addresses as verified by OEM firmware: use interface source 2g wlan0 factory 0x04 (label) LAN eth0.1 factory 0x28 (label+1) WAN eth0.2 factory 0x2e (label+2) Fixes: 671c9d16e382 ("ramips: add support for HILINK HLK-7628N") Signed-off-by: Liu Yu <f78fk@live.com> [drop old MAC address setup from 02_network, cut out state_default changes, face-lift commit message, add Fixes:] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit ae9c5cd37bf5c08452f314b54afa963a00bdde30)
* ramips: Add support for SERCOMM NA502Andreas Böhler2021-06-104-0/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SERCOMM NA502 is a smart home gateway manufactured by SERCOMM and sold under different brands (among others, A1 Telekom Austria SmartHome Gateway). It has multi-protocol radio support in addition to LAN and WiFi. Note: BLE is currently unsupported. Specifications -------------- - MT7621ST 880MHz, Single-Core, Dual-Thread - MT7603EN 2.4GHz WiFi - MT7662EN 5GHz WiFi + BLE - 128MiB NAND - 256MiB DDR3 RAM - SD3503 ZWave Controller - EM357 Zigbee Coordinator MAC address assignment ---------------------- LAN MAC is read from the config partition, WiFi 2.4GHz is LAN+2 and matches the OEM firmware. WiFi 5GHz with LAN+1 is an educated guess since the OEM firmware does not enable 5GHz WiFi. Installation ------------ Attach serial console, then boot the initramfs image via TFTP. Once inside OpenWrt, run sysupgrade -n with the sysupgrade file. Attention: The device has a dual-firmware design. We overwrite kernel2, since kernel1 contains an automatic recovery image. If you get NAND ECC errors and are stuck with bad eraseblocks, try to erase the mtd partition first with mtd unlock ubi mtd erase ubi This should only be needed once. Signed-off-by: Andreas Böhler <dev@aboehler.at> [use kiB for IMAGE_SIZE] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit a3d8c1295ed9eeceabd78ab86e73b151ae2868a9)
* ramips: add support for Linksys EA8100 v1Tee Hao Wei2021-06-107-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: - SoC: MT7621AT - RAM: 256MB - Flash: 128MB NAND - Ethernet: 5 Gigabit ports - WiFi: 2.4G/5G MT7615N - USB: 1 USB 3.0, 1 USB 2.0 This device is very similar to the EA7300 v1/v2 and EA7500 v2. Installation: Upload the generated factory image through the factory web interface. (following part taken from EA7300 v2 commit message:) This might fail due to the A/B nature of this device. When flashing, OEM firmware writes over the non-booted partition. If booted from 'A', flashing over 'B' won't work. To get around this, you should flash the OEM image over itself. This will then boot the router from 'B' and allow you to flash OpenWRT without problems. Reverting to factory firmware: Hard-reset the router three times to force it to boot from 'B.' This is where the stock firmware resides. To remove any traces of OpenWRT from your router simply flash the OEM image at this point. With thanks to Leon Poon (@LeonPoon) for the initial bringup. Signed-off-by: Tee Hao Wei <angelsl@in04.sg> [add missing entry in 10_fix_wifi_mac] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit b232680f847f4ea8d058849a51dedebb8e398a01)
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