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* ramips: gsw_mt7621: disable PORT 5 MAC RX/TX flow control by defaultPetr Štetiar2020-02-201-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | Looking at the current upstream driver implementation, it seems like the TX/RX flow control is enabled only if the flow control pause option is resolved from the device/link partner advertisements (or otherwise set). On the other hand, our current in-tree driver force enables TX/RX flow control by default, thus possibly leading to TX timeouts if the other end sends pause frames (which are not properly handled?): WARNING: CPU: 3 PID: 0 at net/sched/sch_generic.c:320 dev_watchdog+0x1ac/0x324 NETDEV WATCHDOG: eth0 (mtk_soc_eth): transmit queue 0 timed out Disabling the flow control on PORT 5 MAC seems to fix this issues as the pause frames are then filtered out. While at it, I'm removing the if condition completely as suggested, since this code is run only on mt7621 SoC, so there is no need to check for the silicon revisions. Ref: https://lists.openwrt.org/pipermail/openwrt-devel/2017-November/009882.html Ref: https://forum.openwrt.org/t/mtk-soc-eth-watchdog-timeout-after-r11573/50000/12 Suggested-by: Felix Fietkau <nbd@nbd.name> Reported-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: apply LED_POLARITY rt3050-esw on MT7628AN/MT7688Maximilian Pachl2020-01-191-0/+4
| | | | | | | | | | | The device tree property "mediatek,led_polarity" is ignored for MT7628AN and MT7688. According to the datasheet both SoCs have the matching register. Therefore the property should be applied on these two devices as well. Signed-off-by: Maximilian Pachl <m@ximilian.info> Reviewed-by: Sungbo Eo <mans0n@gorani.run> Tested-by: Sungbo Eo <mans0n@gorani.run>
* ramips: ethernet: Replace random_ether_addr with eth_hw_addr_randomRosen Penev2019-10-271-1/+1
| | | | | | eth_hw_addr_random additionally sets addr_assign_type to NET_ADDR_RANDOM. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ramips: add MT7530 switch port-mirroring supportDeng Qingfang2019-08-181-0/+228
| | | | | | | | Compile & run tested on MT7620, MT7621 Signed-off-by: Deng Qingfang <dengqf6@mail2.sysu.edu.cn> [Tested on Phicomm PSG1218 rev.A, MediaTek MT7620A ver:2 eco:6] Tested-by: MingHao Chen <cmheia@email.com>
* ramips: mtk-mmc: mt76x8: check ESD_MODE before applying AGPIO_CFGChuanhong Guo2019-07-161-8/+4
| | | | | | | | | | | | | | | | | | | | | | | Since mt76x8an ver1 eco2, SDXC pins can be switched to the following pinmap: sd_d1 -> PAD_I2S_SDI sd_d0 -> PAD_I2S_WS sd_cmd -> PAD_I2S_CLK sd_d3 -> PAD_I2C_SCLK sd_d2 -> PAD_I2C_SD sd_clk -> PAD_GPIO0 sd_wp -> PAD_TXD1 sd_cd -> PAD_RXD1 To use this pinmap, one would need to set ESD_MODE bit (bit 15) to 1 in GPIO1_MODE and switch other used pads into GPIO mode. In this mode, we don't need to switch ethernet pins to digital pad. Check ESD_MODE bit before applying AGPIO_CFG and use rt_sysc_m32 to set it. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ramips: mt7620: add EPHY base mdio address changing possibilityPawel Dembicki2019-06-202-46/+62
| | | | | | | | | | | In some boards is requred to change the ephy mdio base address. This patch add of property "mediatek,ephy-base-address" in gsw part, which allows to change ephy base address. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> [fixed indentation in header file] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: mt7620: fix external PHY autopollingPawel Dembicki2019-06-201-4/+6
| | | | | | | | | | | | | | | | | The port initialisation is based on assumption that phy address and port number is the same. SoC allow different numbers and some board have it. Use phy address instead the port number to make sure that correct addresses are polled. In situation when only one PHY with address 0x0 is conected to port 4, autopolling is broken. This patch make autopolling correct when port number and phy address are different. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
* ramips: handle mdio address and switch port seperateMathias Kresin2019-06-204-11/+14
| | | | | | | | | | | | | | | The phy handling code forces a phy mdio address and the switch port to which a phy is attached to be the same. Albeit such a configuration is used for most boards, it isn't for all. Pass the switch port number to the ethernet phy connect functions, to ensure the correct list entry is edited and not the list entry that matches th phys mdio address. Use the mdio address with mdiobus_get_phy instead of the port number, to make sure the expected ethernet phy gets connected. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ramips: ignore already handled ethernet physMathias Kresin2019-06-201-2/+8
| | | | | | | | | | | | The whole logic in fe_phy_connect() is based on the asumption that mdio address and switch port id are equal. Albeit it is true for most boards, it doesn't is for all. It isn't yet clear which subtargets/boards require the devicetree less ethernet phy handling. Hence change the code in a way that it doesn't touch ethernet phys which were early attached and are already handled. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ramips: add support for Edimax EW-7476RPC / EW-7478ACBirger Koblitz2019-06-201-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SoC: MediaTek MT7620a @ 580MHz RAM: 64M (Winbond W9751G6KB-25) FLASH: 8MB (Macronix) WiFi: SoC-integrated: MediaTek MT7620a bgn WiFi: MediaTek MT7612EN nac GbE: 1x (RTL8211E) BTN: WPS - RFKILL/RF 50%/RF 100% toggle LED: - Wifi 5g (blue) - Wifi 2g (blue) - Crossband (green) - Power (green) - WPS (green) - LAN (Green) UART: UART is present as Pads with throughholes on the PCB. They are located next to the switch for the wifi configuration 3.3V - RX - GND - TX / 57600-8N1 3.3V is the square pad Installation ------------ Update the factory image via the web-interfaces (by default: 192.168.9.2/24). http://192.168.9.2/index.asp ramips: add Edimax EW-7478AC SoC: MediaTek MT7620a @ 580MHz RAM: 64M (Winbond W9751G6KB-25) FLASH: 8MB (Macronix) WiFi: SoC-integrated: MediaTek MT7620a bgn WiFi: MediaTek MT7612EN nac GbE: 1x (RTL8211E) BTN: WPS - RFKILL/RF 50%/RF 100% toggle LED: - Wifi 5g (blue) - Wifi 2g (blue) - Crossband (green) - Power (green) - WPS (green) - LAN (Green) UART: UART is present as Pads with throughholes on the PCB. They are located next to the switch for the wifi configuration 3.3V - RX - GND - TX / 57600-8N1 3.3V is the square pad Installation ------------ Update the factory image via the web-interfaces (by default: http://edimaxext.setup) Or push wpa button on power on and send firmware via tftp to 192.168.1.6 The EW-7478AC is identical to the EW-7476RPC, except instead of 2 internal antennas it has 2 external ones. Signed-off-by: Birger Koblitz <mail@birger-koblitz.de> [merge conflict in 01_leds] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: ethernet: remove unused SIOCETHTOOL ioctl handlingPetr Štetiar2019-06-051-12/+1
| | | | | | | | | | | | | This ioctl is currently routed through generic interface code. dev_ioctl dev_ethtool __ethtool_get_link_ksettings phy_ethtool_ioctl Cc: Felix Fietkau <nbd@nbd.name> Cc: John Crispin <john@phrozen.org> Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: implement vlan rx offload on MT7621Felix Fietkau2019-04-033-4/+11
| | | | | | Avoids the overhead of software VLAN untagging in the network stack Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ramips: allow packets with ttl=0Felix Fietkau2019-03-241-2/+2
| | | | | | | Some broken ISPs (e.g. Comcast) send DHCPv6 packets with hop limit=0. This trips up the TTL=0 check in the PPE if enabled. Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ramips: fix two-way hash and auto ageout on MT7621HsiuWen Yen2019-01-231-17/+18
| | | | | | | | | | | | | | | | | | | | | | | | Current code directly writes the FOE entry to hash_val+1 position when hash collision occurs. However, it is found that this behavior will cause the cache and the hardware FOE table to be inconsistent. For example, there are three flows, and their hashed values are all equal to 100. The first flow is written to the position of 100. The second flow is written to the position of 100+1. Then, the logic of the current code will also write the third flow to 100+1. At this time, the cache has flow 1 and 2; and the hardware FOE table has flow 1 and 3, where these two parts store different contents. So it is necessary to check whether the hash_val+1 is also occupied before writing. If hash_val+1 is also occupied, we won’t bind th third flow to the FOE table. Addition to that, we also cancel the processing of foe_entry removal because the hardware has auto age-out ability. The hardware will periodically iterate through the FOE table to find out the time-out entry and set it as INVALID. Signed-off-by: HsiuWen Yen <y.hsiuwen@gmail.com>
* ramips: whitespace cleanup inside hnat driverJohn Crispin2019-01-071-6/+8
| | | | Signed-off-by: John Crispin <john@phrozen.org>
* ramips: add two-way hashing scheme for MT7621HsiuWen Yen2019-01-071-0/+11
| | | | | | | | | | Sometimes the tuples might be hashed to the same FOE entry. When this hash collision problem occurs, some of the connections will not be bound and consequently the CPU idle rate cannot reach 100%. Therefore, two-way hashing is adopted to alleviate this problem. Signed-off-by: HsiuWen Yen <y.hsiuwen@gmail.com>
* ramips: mt7620: add force use of mdio-modePawel Dembicki2018-11-261-0/+3
| | | | | | | | Some boards have external switches different than mt7530. This patch allow to use mdio-mode without 0x1f register. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
* ramips: drop obsolete sd card driver codeMathias Kresin2018-09-062-20/+4
| | | | | | | | | | | | | | | | | The pinmux for all SoCs using this driver is now set via the pinmux. It makes this code obsolete. Some of the code targeting the mt76x8 SoCs is still required. The sd card pins share the pads with the EPHY. These pads need to be switched to digital mode if the pins are used for sd cards. The eMMC 8-bit mode has to be enabled via pinmux instead of a kernel option. The uart2 group need to be set to function "sdxc d5 d4", pwm1 to "sdxc d6" and pwm0 to "sdxc d7" to do so. It can't be done by as part of a default pinmux, as it would break the normal operation of uart2. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ramips: ethernet: unify tx descriptor buffer splittingFelix Fietkau2018-09-031-75/+83
| | | | | | | | A buffer is split into multiple descriptors if it exceeds 16 KB. Apply the same split for the skb head as well (to deal with corner cases on fraglist support) Signed-off-by: Felix Fietkau <nbd@nbd.name>
* Revert "ramips: mmc: Fix init for MT7628AN"Jo-Philipp Wich2018-08-302-16/+1
| | | | | | | | | | This reverts commit 3a8efaef00d6b7317c46fe6b7e923912d8bf3500. The change reportedly breaks UART2 on some boards. Furthermore it uses bitwise logic on an uninitialized variable and fails to explain what it is fixing exactly. Signed-off-by: Jo-Philipp Wich <jo@mein.io>
* ramips: mt7620: fix bad indentMathias Kresin2018-08-161-7/+6
| | | | | | | Fix the indent to make the make it obvious which condition is the parent of the loop. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ramips: mt7620: enable all ports unconditionallyPawel Dembicki2018-08-151-1/+10
| | | | | | | This patch make all mt7620 ephy ports turned on. It is necessary for some JBOOT devices. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
* mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possibleChen Minqiang2018-08-061-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | To share mdio addr for IntPHY and ExtPHY, as described in the documentation (MT7620_ProgrammingGuide.pdf). (refer: http://download.villagetelco.org/hardware/MT7620/MT7620_ProgrammingGuide.pdf) when port4 setup to work as gmac mode, dts like: &gsw { mediatek,port4 = "gmac"; }; we should set SYSCFG1.GE2_MODE==0x0 (RGMII). but SYSCFG1.GE2_MODE may have been set to 3(RJ-45) by uboot/default so we need to re-set it to 0x0 before this changes: gsw: 4FE + 2GE may not work correctly and MDIO addr 4 cannot be used by ExtPHY after this changes: gsw: 4FE + 2GE works and MDIO addr 4 can be used by ExtPHY Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
* ramips: fix gigabit switch PHY access on MDIODaniel Gimpelevich2018-08-061-1/+2
| | | | | | | | | | When PHY's are defined on the MDIO bus in the DTS, gigabit support was being masked out for no apparent reason, pegging all such ports to 10/100. If gigabit support must be disabled for some reason, there should be a "max-speed" property in the DTS. Reported-by: James McKenzie <openwrt@madingley.org> Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
* ramips: remove superfluous & confusing DT bindingDaniel Gimpelevich2018-08-061-3/+24
| | | | | | | | | | | Mediatek has a reference platform that pairs an MT7620A with an MT7530W, where the latter responds on MDIO address 0x1f while both chips respond on 0x0 to 0x4. The driver special-cases this arrangement to make sure it's talking to the right chip, but two different ways in two different places. This patch consolidates the detection without the current requirement of both tests to be separately satisfied in the DTS. Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
* ramips: mmc: Fix init for MT7628ANLoveSy2018-07-302-1/+16
| | | | | | | | There is another thing about crc to do when initialize SD card on MT7628. This commit is to fix this init issue. Signed-off-by: LoveSy <shana@zju.edu.cn>
* ramips: ethernet: disable fraglist supportFelix Fietkau2018-07-141-1/+1
| | | | | | | The code has some remaining issues that cause ethernet hangs, so disable it for now until we can get it fixed Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ramips: ethernet: use own page_frag_cacheFelix Fietkau2018-07-122-3/+15
| | | | | | | | | | | | | | | | Using the NAPI or netdev frag cache along with other drivers can lead to 32 KiB pages being held for a long time, despite only being used for very few page fragment. This can happen if the ethernet driver grabs one or two fragments for rx ring refill, while other drivers use (and free up) the remaining fragments. The 32 KiB higher-order page can only be freed once all users have freed their fragments, which only happens after the rings of all drivers holding the fragments have wrapped around. Depending on the traffic patterns, this can waste a lot of memory and look a lot like a memory leak Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ramips: ethernet: use skb_free_frag to free fragmentsFelix Fietkau2018-07-121-3/+3
| | | | Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ramips: improve ethernet driver performance with GRO/TSOFelix Fietkau2018-06-193-76/+105
| | | | | | | | | | | GRO stores packets as fraglist. If they are routed back to the ethernet device, they need to be re-segmented if the driver does not support sending fraglists. Add the missing support for that, along with a missing feature flag that allows full routed GRO->TSO offload. Considerably reduces CPU utilization for routing Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ramips: mt7621: fix mtu setting with kernel 4.14Mathias Kresin2018-06-161-11/+7
| | | | | | | | | | Since kernel 4.10 commit 61e84623ace3 ("net: centralize net_device min/max MTU checking"), the range of mtu is [min_mtu, max_mtu], which is [68, 1500] by default. It's necessary to set a max_mtu if a mtu > 1500 is supported. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ramips: rename ethernet driver folder to the same one that upstream usesFelix Fietkau2018-06-1326-0/+0
| | | | | | | Preparation for sharing offload code with the mediatek target through generic files/ Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ramips: mmc: Add back some non-mt7621 code that staging removedRosen Penev2018-06-081-1/+17
| | | | | | | | | | This reverts commit 8a570921b5ba49a2d3824f1220e4c53809063468. This seems to have been accidentally reverted. This fixes mt7620 and mt7628. Signed-off-by: Rosen Penev <rosenp@gmail.com> Acked-by: Daniel Golle <daniel@makrotopia.org>
* Revert "ramips: Move PCI driver to files directory"John Crispin2018-06-011-836/+0
| | | | | | This reverts commit a098a78a33a6b096d15c9982b5d6457988e09f03. Signed-off-by: John Crispin <john@phrozen.org>
* Revert "ramips: Remove redundant owner assignment"John Crispin2018-06-011-0/+1
| | | | | | This reverts commit 2ad4daf5794b08878467c1dac5bef7487109e4da. Signed-off-by: John Crispin <john@phrozen.org>
* Revert "ramips: improve interrupt mapping"John Crispin2018-06-011-9/+65
| | | | | | This reverts commit 5f7396ebef09b224edf08b0bda113613a42f0928. Signed-off-by: John Crispin <john@phrozen.org>
* Revert "ramips: remove conditional compilation."John Crispin2018-06-011-8/+58
| | | | | | This reverts commit 1f786257147f978ce4c5750fdc404851453fafcb. Signed-off-by: John Crispin <john@phrozen.org>
* Revert "ramips: remove unnecessary resource details."John Crispin2018-06-011-2/+15
| | | | | | This reverts commit edea934799911c54ffa7024ef9a650f9dfc8c695. Signed-off-by: John Crispin <john@phrozen.org>
* Revert "ramips: pci: sync with staging driver"John Crispin2018-06-011-150/+168
| | | | | | This reverts commit e07baec9faf487fd143976636025b5da55e13c20. Signed-off-by: John Crispin <john@phrozen.org>
* Revert "ramips: Add back some non-mt7621 code that staging removed"John Crispin2018-06-011-17/+1
| | | | | | This reverts commit 048e41f6496697863cc7d73ab95fa89a6ddf2470. Signed-off-by: John Crispin <john@phrozen.org>
* ramips: Add back some non-mt7621 code that staging removedRosen Penev2018-05-241-1/+17
| | | | | | Staging is meant only for mt7621 but for OpenWrt more is needed. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ramips: mmc: Sync with staging driverRosen Penev2018-05-185-3417/+2693
| | | | | | | | | | | | | | Mostly whitespace cleanups. Some unneeded code was removed. MMC init was also moved to the probe function as in 6069bdd The cleanup commits are over 100, making it hard to do them individually. Tested on GnuBee PC1 with an SD card being used as swap. Signed-off-by: Rosen Penev <rosenp@gmail.com> v2: Fixed compile issue with mt7620
* Revert "ramips: mmc: Sync with staging drivers"John Crispin2018-05-155-2693/+3418
| | | | | | This reverts commit 2d401925b9bdf34de800fff57f593a3665de2a6a. Signed-off-by: John Crispin <john@phrozen.org>
* staging: mt7621-eth: fix return value check in mt7621_gsw_probe()Wei Yongjun2018-05-153-6/+6
| | | | | | | | | | In case of error, the function devm_ioremap_resource() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: f079b6406348 ("staging: mt7621-eth: add gigabit switch driver (GSW)") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* staging: mt7621-eth: fix return value check in mtk_connect_phy_node()Wei Yongjun2018-05-151-2/+2
| | | | | | | | | | In case of error, the function of_phy_connect() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Fixes: e3cbf478f846 ("staging: mt7621-eth: add the drivers core files") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* staging: mt7621-eth: fix return value check in mtk_probe()Wei Yongjun2018-05-151-1/+1
| | | | | | | | | | In case of error, the function devm_ioremap_resource() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: e3cbf478f846 ("staging: mt7621-eth: add the drivers core files") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ramips: pci: sync with staging driverRosen Penev2018-05-151-168/+150
| | | | | | | | | | This is an amagalmation of two upstream commits dealing with whitespace and dead code removal. I'm synching instead of having two separate commits as they go out of order compared to previous commits here. Tested on GnuBee PC1. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ramips: mmc: Sync with staging driversRosen Penev2018-05-155-3418/+2693
| | | | | | | | | | | | | Mostly whitespace cleanups. Some unneeded code was removed. MMC init was also moved to the probe function as in 6069bdd0871a20b5adce8d2f677946e05a2da609 The cleanup commits are over 100, making it hard to do them individually. Tested on GnuBee PC1 with an SD card being used as swap. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ramips: remove unnecessary resource details.NeilBrown2018-05-141-15/+2
| | | | | | | | These resources are extracted from devicetree, so they aren't needed here. Signed-off-by: NeilBrown <neil@brown.name> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* ramips: remove conditional compilation.NeilBrown2018-05-141-58/+8
| | | | | | | | | | | | | Code currently defines: and then compiles code only if they are defined. We might want to disable some of these via devicetree one day, but for now just remove the #defines and the conditions - all the code for different ports is easy to identify. Signed-off-by: NeilBrown <neil@brown.name> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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