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* mediatek: filogic: mt7988: mark RTC clock as criticalDaniel Golle2023-08-131-1/+8
| | | | | | | | | A dependency of the MT7988 MMC host controller on the SoC's RTC clock being running has been discovered. Mark RTC clock as critical to fix MMC host on MT7988. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 0454691960e16bb93ed01f89352cbb375008aaf5)
* mediatek: filogic: restore non-const type in pinctrl-mt7988 driverDaniel Golle2023-08-071-17/+17
| | | | | | | | | When building with Linux 5.15 the 'const' type results in warnings. Restore the original non-const type in those cases. Fixes: 36d0aa9c2d ("mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK") Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 1eb67cb0704a61f49d9be9f88aecbce1d881f8c9)
* mediatek: filogic: update MT7988 device treeDaniel Golle2023-08-072-166/+394
| | | | | | | | | * move ethernet to mt7988a.dtsi * move switch definition to mt7988a.dtsi * add PHY LEDs Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 64b99802a61a477ed23fc1f3426fb19d1bc0c6f3)
* mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDKDaniel Golle2023-08-071-115/+300
| | | | | | | Update pinctrl driver for the MT7988 with driver from mtk-openwrt-feeds. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 36d0aa9c2db0f74614b04a152fb092bcc74afb8e)
* mediatek: dts: mt7988a: remove boottrap hackDaniel Golle2023-07-131-5/+0
| | | | | | | | The PHY driver now uses regmap created from pio syscon, we no longer need the boottrap device. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit f321a49fd523a8d393be8e3cd2de41d67855da91)
* mediatek: use backported Ethernet PHY driver also for 5.15Daniel Golle2023-07-131-1263/+0
| | | | | | | | Backport in-SoC Gigabit Ethernet PHY driver instead of carrying the driver in files-5.15. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 9fac59009657068d5a58b3d0255d4ca1507dd457)
* mediatek: dts: mt7988a: wire-up mediatek,pio for PHY LEDsDaniel Golle2023-07-132-1/+2
| | | | | | | | | | | The PHY driver needs to read a register containing the values of the bootstrap pins (which happen to be the PHY LEDs) to determine the LED polarities. Allow regmap access to first pinctrl bank by adding the 'syscon' compatible, and reference the pinctrl in the MDIO bus where the PHY driver will look for it. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 1f1e0b1144ebaa4ba8b948a12d989a0a6fc9b76f)
* mediatek: sync MT7986 device trees with upstreamDaniel Golle2023-06-0914-245/+801
| | | | | | | | | Sync device tree files for MT7986 boards with what landed in upstream Linux tree to easy maintainance and also allow for a smooth update to Linux 6.1. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 7a0ec001ff79b12beefb8f3773820bfedebbb340)
* mediatek: use existing I2C clock namesDaniel Golle2023-06-091-1/+1
| | | | | | | | | PCK and MCK should really be P=PMIC and M=MEM, which means that they should effectively be CLK_PMIC and CLK_ARB. Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 0580747adab2094862c18b5e762c908dd3b43236)
* mediatek: mt7981: add reserved memory to support pstoreAlexander Couzens2023-05-291-0/+7
| | | | | | | | | | Add reserved memory for pstore/ramoops to device tree used by Linux as well as U-Boot. Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 3eb354f999a3687f9ae547899b0f5ec2b10185ab) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: cleanly backport and add fix for I2C driverDaniel Golle2023-05-291-2/+4
| | | | | | | | | | Pick accepted patches from upstream Linux tree instead of having to maintain our slightly different downstream patches. Import pending patch fixing I2C on MT7981 by making sure all clocks are enabled before accessing I2C registers. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 213b7282760506ffab9151a20347d65ea70ed916)
* mediatek: add basic mt7988 device tree supportSam Shih2023-05-244-0/+1298
| | | | | | | | This add basic device tree support for mediatek MT7988 SoC Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit e3a681bab4b2c193704e76b8a6091e57f0fab14e)
* mediatek: add driver for built-in 2.5G Ethernet PHYDaniel Golle2023-05-241-0/+262
| | | | | | | | | Add driver for the built-in 2.5G Ethernet PHY found in the MT7988 SoC. To function the PHY also needs firmware files which have not yet been published via linux-firmware. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit ef2a831dabacfda6c36c79b8f963b5fdd9b2d080)
* mediatek: update pending SoC Ethernet PHY driverDaniel Golle2023-05-241-0/+1263
| | | | | | | | Update driver for MediaTek's built-in Gigabit Ethernet PHYs which can be found in the MT7981 and MT7988 SoCs. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 987a0b2b3011a9e5ee3e4120b068fb2f113628a7)
* mediatek: add mt7988 pinctrl driver supportSam Shih2023-05-241-0/+1281
| | | | | | | | This adds provisional pinctrl driver support for the MediaTek MT7988 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 9e6a7e808f2e9dd02733ccc41827940fb421091d)
* mediatek: add mt7988 clock drivers supportSam Shih2023-05-245-0/+1609
| | | | | | | | This adds clock drivers for the MediaTek MT7988 SoC Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit b33c1858767e5109913ac2195ec2b2b8ef0e726a)
* mediatek: mt7981: setup all clocks needed for eMMCDaniel Golle2023-05-241-4/+5
| | | | | | | | Setup all necessary clocks to get MMC to work on MT7981, similar to how it is done also on MT7986. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit a9989b30d01e534288928d7ef48df3eb9fe3150b)
* mediatek: mt7981: usb enable 3.0 by defaultChukun Pan2023-05-241-1/+0
| | | | | | | | | There is no reason to limit USB to 2.0 mode by default, delete this limit. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> (cherry picked from commit b2beb4c68849c804a8b9441f776a6918d433fb1e) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: sync pinctrl-mt7981 and pinctrl-mt7986 driversDaniel Golle2023-04-132-25/+150
| | | | | | | Now that new pinconf features have been backported sync pinctrl-mt7981 and pinctrl-m7986 with bleeding-edge upstream versions. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add device tree include for the MT7981 SoCDaniel Golle2023-03-271-0/+766
| | | | | | Add mt7981.dtsi so we can start adding MT7981 devices. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: backport pinctrl driver for MT7981 SoCDaniel Golle2023-03-271-0/+993
| | | | | | | Backport the pinctrl driver for the MT7981 SoC. The driver has also been submitted upstream and is part of Linux 6.3. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: backport clk driver for MT7981 SoCDaniel Golle2023-03-275-0/+1141
| | | | | | | Backport driver for common clocks in MT7981 SoC. The driver has also been submitted upstream and became part of Linux 6.3. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add missing DTS entries for WED on MT7986Felix Fietkau2023-03-051-0/+65
| | | | | | Needed to support WLAN offloading Signed-off-by: Felix Fietkau <nbd@nbd.name>
* treewide: remove label = "cpu" from DSA dt-bindingArınç ÜNAL2023-02-262-2/+0
| | | | | | | This is not used by the DSA dt-binding, so remove it from all devicetrees. Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=9cc115d8d6f73dd260de1609182f3645844d6907 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
* mediatek: fix dts whitespaceFelix Baumann2023-02-091-1/+1
| | | | | | Replace blanks with tabs Signed-off-by: Felix Baumann <felix.bau@gmx.de>
* mediatek: filogic: fix mt7986a ethernet devicetree entriesFelix Fietkau2022-11-091-12/+24
| | | | | | Add all ports, rename DSA ports to start at lan1 Signed-off-by: Felix Fietkau <nbd@nbd.name>
* mediatek: drop the use of device tree overlays on mt7986a-rfb boardFelix Fietkau2022-11-093-83/+85
| | | | | | | The boot loader does not support it. Instead make NAND the default image for this board Signed-off-by: Felix Fietkau <nbd@nbd.name>
* mediatek: filogic: consolidate adc '32k' clockDaniel Golle2022-10-202-7/+5
| | | | | | | | | | Add dependency to '32k' ADC clock so it is always enabled for thermal and raw access to ADC values. This allows to remove the patch for the ADC driver and reduce the patch adding thermal support for MT7986 to only add the new efuse layout and temperature decoding for V3. Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: filogic: set correct PWM clock and clean thermal zoneDaniel Golle2022-10-091-16/+15
| | | | | | | | | | | | * set correct clocks for PWM to work. * MT7986 PWM does have the 26MHz-clock-select, set that in patch * drop useless 'passive' trip point in thermal zone * extend pwm-fan to have 3 active operating points * set reasonable trip points in thermal zone * invert pwm-fan operating points and set shorter period to allow less noisy operation of the PWM fan of the BPi-R3. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: filogic: add support for hw i2c, pwm and thermalDaniel Golle2022-10-071-1/+121
| | | | | | | Add support for hardware I2C and PWM units found in the Filogic SoCs as well as the CPU thermal support. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add support t-phy settings from efuse on MT7986Daniel Golle2022-09-301-1/+31
| | | | | | | Import patches from mtk-openwrt-feeds (MTK SDK) to support reading t-phy settings affecting PCIe as well as USB2 and USB3 from efuse. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: filogic: add efuse layout to mt7986a.dtsiDaniel Golle2022-09-301-0/+93
| | | | | | | | efuse is used to store board-specific settings of some of the in-SoC peripherals. Add it to device tree, so it gets probed on boot and can be accessed by other drivers. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* kernel: pick patches for MediaTek Ethernet from linux-nextDaniel Golle2022-09-221-0/+24
| | | | | | | | | | | | | | | | | | | Pick patches with several fixes and improvements, preparation for upcoming WED (TX) [1] as well as basic XDP support [2] with MediaTek's Filogic SoCs to the mtk_eth_soc driver. Also pick follow-up patch fixing Ethernet on MT7621 [3]. Tested on Bananapi BPi-R3 (MT7986), Bananapi BPi-R64 (MT7622), Bananapi BPi-R2 (MT7623), MikroTik RouterBoard M11G (MT7621). [1]: https://patchwork.kernel.org/project/netdevbpf/list/?series=662108&state=* [2]: https://patchwork.kernel.org/project/netdevbpf/list/?series=675368&state=* (the first part of the series adding wed nodes to mt7986a.dtsi was applied to the copy of mt7986a.dtsi in our tree) [3]: https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=5e69163d3b9931098922b3fc2f8e786af8c1f37e Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* kernel: enable inside secure driver for MediaTek platformsDaniel Golle2022-08-281-1/+1
| | | | | | | | Older MT7623 ARMv7 SoC as well as new Filogic platforms come with inside-secure,safexcel-eip97 units. Enable them in DTS and select the driver kernel module by default on those platforms. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add mt7986 soc support to the targetSam Shih2022-08-2813-0/+3061
It will be supported by the new filogic subtarget Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 05:42:35 +0000