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This is a critical fix for a correct system behavior, just backport it to AA.
It was already fixed in trunk revisions:
https://dev.openwrt.org/changeset/37745
It should be also fixed in 12.09. Several stuff is broken without this fix.
Regards.
Signed-off-by: Daniel Gonzalez <dgcbueu@gmail.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/branches/attitude_adjustment@42171 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33555 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33383 3c298f89-4303-0410-b956-a3cf2f4a3e73
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None of the boards we support have PCI connectors
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33130 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33129 3c298f89-4303-0410-b956-a3cf2f4a3e73
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32930 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This target currently only supports Moschip's MCS8140 SoC, but support
for other chips in the same family (MCS8142, MCS8144) will be easy to add.
Target support is entirely using Device Tree for probing peripherals.
Drivers support include:
- PCI
- USB 1 & 2
- watchdog
- random number generator
- UART
- timer
- internal Ethernet PHY
- Ethernet MAC core
Support for the following boards is included using Device Tree
- Devolo dLAN USB Extender
- Tigal RBT-832
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32462 3c298f89-4303-0410-b956-a3cf2f4a3e73
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