| Commit message (Collapse) | Author | Age | Files | Lines |
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Check if the GPIO is valid (or set at all). If no GPIO is set in the
devicetree, a gpiolib related kernel warning + stacktrace is shown during
boot and gpio-export reports GPIOs as exported albeit none really is.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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When upstream kernel introduced commit c55fa3cccbc2c672e7f118be8f7484e53a8e9e77
we incorrectly updated our hack integration patch that updates atm/common.c
+++ b/net/atm/common.c
@@ -62,10 +62,16 @@ static void vcc_remove_socket(struct soc
write_unlock_irq(&vcc_sklist_lock);
}
+struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL;
+EXPORT_SYMBOL(ifx_atm_alloc_tx);
+
static bool vcc_tx_ready(struct atm_vcc *vcc, unsigned int size)
{
struct sock *sk = sk_atm(vcc);
+ if (ifx_atm_alloc_tx != NULL)
+ return ifx_atm_alloc_tx(vcc, size)
The correct solution is to drop our ifx_atm_alloc_tx replacement hack
entirely and let the kernel do its thing.
In reality neither pppoatm or BR2684 interfaces actually hit this code,
so the incorrect integration would only be noticed with direct socket
calls which we are unaware of a use-case.
This is not the solution to pppoatm vc-mux failing to work which started
the whole investigation, but let's fix it up anyway.
With sincerest thanks to David Woodhouse <dwmw2@infradead.org> &
Mathias Kresin <dev@kresin.me>.
Tested-on: lantiq, BT HomeHub 5a
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
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Remove upstreamed patches:
generic/pending/101-clocksource-mips-gic-timer-fix-clocksource-counter-w.patch
generic/pending/103-MIPS-c-r4k-fix-data-corruption-related-to-cache-coherence.patch
generic/pending/182-net-qmi_wwan-add-BroadMobi-BM806U-2020-2033.patch
lantiq/0025-MIPS-lantiq-gphy-Remove-reboot-remove-reset-asserts.patch
Update patches that no longer apply:
generic/pending/811-pci_disable_usb_common_quirks.patch
ath79/0009-MIPS-ath79-add-lots-of-missing-registers.patch
Fixes CVE-2018-6412.
Compile-tested: octeon, x86/64.
Runtime-tested: octeon, x86/64.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
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Backport patch accepted upstream which removes the reset asserts of the
xrx200 gphy driver on reboot/remove.
While doing a global software reset, these bits are not cleared and let
some bootloader fail to initialise the GPHYs. The bootloader don't expect
these bits to be set, as they aren't during power on.
The asserts were a workaround for a wrong syscon-reboot mask. With a mask
set which includes the GPHY resets of the first reset register, the
resets of the second reset register arn't required any more.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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The following patches are now included upstream:
* 0052-MIPS-lantiq-fix-usb-clocks.patch
* 0053-MIPS-lantiq-enable-AHB-Bus-for-USB.patch
* 0060-lantiq-ase-enable-MFD-SYSCON.patch
Closes: FS#1466
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Stijn Segers <foss@volatilesystems.org>
Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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During upstreaming the intel phy driver, support for the vr9 v1.1
embedded phys got lost. Backport the upstream send patch adding support
for the vr9 v1.1 embbeded phys to the driver.
Signed-off-by: Mathias Kresin <dev@kresin.me>
cosmetic fixes
Signed-off-by: Mathias Kresin <dev@kresin.me>
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This makes some of the mtd patches apply again after some generic
patches were changed.
These problems where found by build bot.
Fixes: ac9bcefa3b044 ("kernel: use V10 of mtd patchset adding support for "compatible" string")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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On danube the USB0 registers are at 1e101000 similar to all other lantiq
SoCs.
On Danube and AR9 the USB core is connected to the AHB bus, hence we need
to enable the AHB Bus as well.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Add a custom xrx200 ethernet phy compatible to load the firmware matching
the vr9 revision without specifing an expected revision.
We have quite a few boards in the tree were later produced ones are using
a more recent vr9. It is impossible to distinguish which revision of the
vr9 is used without opening the case and removing a heatsink for some of
them.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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This reverts kernel commit 1eed40043579 ("MIPS: smp-mt: Use CPU interrupt
controller IPI IRQ domain support"). With the patch applied, the kernel
hangs during boot if SMP is active.
The Lantiq IRQ controller gets registered first and it directly handles
the MIPS native SW1/2 and HW0 - HW5 IRQs. It looks like this controller
already registers IRQ 0 - 7 and the generic driver only gets the following
IRQs starting later.
The upstream discussion can be found at
https://www.linux-mips.org/archives/linux-mips/2017-05/msg00059.html.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Enable syscon to use it for the RCU MFD on Amazon SE as well.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Mathias Kresin <dev@kresin.me>
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This just copies the patches, configuration and dts files into the
directories hich are used for kernel 4.14.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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