| Commit message (Collapse) | Author | Age | Files | Lines |
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this seems to have never worked as the wrong SoC is selected
Signed-off-by: John Crispin <john@phrozen.org>
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The EASY80920 is available with the A1X and the A2X chip version
depending on the board version. Add both firmware versions to device
tree and make the driver load the correct version depending on the chip
version.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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This matches the EASY80920NAND boards with UGW.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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The restart event code is used in LEDE to trigger a factory reset on
long press as well.
By using the power event code, the restart functionality can be used
without being prone to trigger a factory reset.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Signed-off-by: John Crispin <john@phrozen.org>
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Signed-off-by: John Crispin <john@phrozen.org>
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Signed-off-by: Sebastian Ortwein <krone@animeland.de>
Tested-by: Guido Lipke <lipkegu@gmail.com>
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Signed-off-by: John Crispin <john@phrozen.org>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
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Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
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The RJ45 WAN port is used for xDSL as well as the IP101A.
The pins 1,2,3,6 of the RJ45 are connected to the IP101A and the
pins 4,5 are connected to the xdsl chip.
Drop the ip101a-rst node. It can't be controlled and is not required
at all.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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The STP pinmux was initially added in assumption LAN2 led is driven by
it. It worked somehow because STP group and gphy0 led0 share the GPIO.
Do it the right way by adding the gphy0 led0 the gphy function.
According to the author, the SPI node is a copy & paste leftover. Which
makes sense since nothing is connected to the SPI bus on this device.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Use the brnboot partition layout as it is listed in the OpenWrt wiki
article for this board.
Configure the brnboot root selector for this device as well.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Use the mac address stored in the board_config partition instead of a
static one.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Add the lantiq,switch property to enable vlans and setup them up.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Signed-off-by: Mathias Kresin <dev@kresin.me>
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Cleanup the pinmux configuration by removing the unused spi node. Nothing is connected to the SPI bus on devices.
The stp_out pinmux child node covers the same GPIOs as the already used
stp group.
The same applies to the gphy-leds_out pinmux node and the "gphy0
led1" as well as "gphy1 led0" groups.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Signed-off-by: Mathias Kresin <dev@kresin.me>
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9d0608eef3e5b9fca - "lantiq: VG3503J - merge profiles"
resulted in the dts file missing the version string.
Signed-off-by: John Crispin <john@phrozen.org>
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Use the 11G firmware for the phys as the oem firmware does.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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The only difference between the VG3503J profiles is the version of the
gphy firmware that gets loaded. This can be handled perfect fine in one
device tree source file.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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VGV7510KW2 with VRX288 v1.2 has brnboot 1.8 installed. Starting with
this brnboot version, the "GPHY Clock Source" isn't set anymore by
brnboot, with the result that xrx200-net fails to probe/initialize the
phys.
Use the phy clock source device tree binding to specify the clock source.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49284
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49282
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Starting with kernel 4.4, the use of partitions as direct subnodes of the
mtd device is discouraged and only supported for backward compatiblity
reasons.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49280
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Based on the vg3503j_gphy_led.sh script published in the VG3503J wiki
article, the OEM Firmware uses the following PHY led functionality:
gphy led 0: LINK/ACTIVITY
gphy led 1: LINK
gphy led 2: ACTIVITY
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 49278
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The VGV7510KW22 has the leds for LAN1-3 connected to pin1 of the phys
and the led for LAN4 connect to pin0 of the phy. This results with the
current configuration in a fast flashing LAN4 led as soon as a network
cable is connected. Something similar was reported on the forum[1] for
the VGV7519 as well.
Since it isn't predicable to which pin a (single) phy led is connected,
use the (default) pin1 functionality
Constant On: 10/100/1000MBit
Blink Fast: None
Blink Slow: None
Pulse: TX/RX
for all ethernet phy leds.
After checking pictures of all vr9 boards, it looks like only the VG3503J
has more than one led connected per phy. Using the phy led device tree
bindings to assign the functionality to the "additional" leds, the
VG3503J phy leds should behave as before.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
[1] https://forum.openwrt.org/viewtopic.php?pid=321523
SVN-Revision: 49270
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Remove read-only flag on two partitions on BTHOMEHUBV3A:
uboot-config - otherwise fw_setenv command cannot be used.
ath9k-cal - so that ath9k calibration data can be copied
to the partition on a newly installed board.
Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com>
SVN-Revision: 49250
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With the backport of the kernel 4.5 pinctrl-xway patches (3551609d &
826bca29) the pinmux group "spi" was splitted into "spi_di", "spi_do" &
"spi_clk". But the no longer existing group "spi" is still used by some
device tree source files.
This fixes the detection of the wireless chipset of the VGV7510KW22.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48658
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The stock u-boot doesn't disable unused flash banks. Therefore, the nand
driver tries to initialize a not connected NOR flash and the device
hangs on boot.
Workaround the issue by selecting the second flash bank (NAND).
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48657
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All other SoC types are using "lantiq,sram" and "simple-bus" to ensure
that all child nodes are set up correctly during linux kernel
initialization (plat_of_setup(void) in arch/mips/lantiq/prom.c). Without
this some of sram child nodes might not be parsed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48548
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This removes a lot of duplicate register and interrupt definitions by
moving the xrx200-net definition to vr9.dtsi and making all devices re-
use it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48547
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This adds basic support for TP-Link VR200v.
Currently the following parts are not working: FXO, Voice, DECT, WIFI (both)
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 48328
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Re-defining the compatible property is not required since the correct
value is inherited from vr9.dtsi.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48295
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Compared to the "old" driver:
- Each device must assign a pinctrl setting to the SPI node to allow the
new SPI driver to configure the SPI pins.
While here we are also using separate input and output settings so we
are independent of whether the bootloader configures the pins correctly.
- We use the new "compatible" strings to make the driver choose the
correct number of chip-selects for each SoC.
- The new driver starts counting the chip-selects at 1 (instead of 0, like
the old one did). Thus we have to adjust the devices accordingly.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48293
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48290
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Also switch to the SPI definition provided by vr9.dtsi
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48289
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48288
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This removes the duplicate SPI register definition.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48287
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This allows devices to use SPI without having to re-define (and thus
duplicating) the whole SPI node.
By default SPI is disabled (as before) because only few devices need it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48286
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After the latest pinctrl backports there are only 50 (instead of 56 as
before) GPIOs/pins exported (thus the first GPIO on VRX200 SoCs is now
462, before it was 456). This means that any hardcoded GPIOs have to be
adjusted.
This broke the PCIe driver (which seems to be the only driver which uses
hardcoded GPIO numbers), it only reports:
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
pcie_rc_initialize link up failed!!!!!
To prevent more of these issues in the future we remove the hardcoded
PCIe reset GPIO definition and simply pass it via device-tree (like the
PCI driver does).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48285
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These were introduced in upstream commit
be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree
bindings" and finally allow us to use the individual pins within our dts
(for example spi_clk, etc.).
Please note that this changes the number of GPIOs which are available for
some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56
pins were exposed. This means that all places which are using hardcoded
GPIO numbers (which are not passed via device-tree) need to be adjusted
(because the first GPIO number is now 462, instead of 456).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48284
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linux 4.4 (since commit 08b3c894e56580b8ed3e601212a25bda974c3cc2
"MIPS: lantiq: Disable xbar fpi burst mode") requires that the xbar is
defined in the .dts of vrx200 (VR9) SoCs.
SVN-Revision: 48056
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48044
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The P2812HNU-F3 doesn't have usb leds. Only the P2812HNU-F1 has those
leds.
Reported-by: Sylwester Petela <sscapi@gmail.com>
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48043
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The leds of the following boards are not renamed due to lack of
manuals/informations:
- ARV7519PW
- ARV7510PW22
- ARV4510PW
The leds of the ARV4518PWR01* boards are unchanged, since the leds doesn't
match the leds from the manual or pictures (e.g. there shouldn't be a wps led).
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48042
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The BTHOMEHUBV5A has a RGB power led, where every colour is perfect to
indicate the current boot state. This patch adds support for such cases.
The existing led sequences should be the same as before.
Boards which are using a led different from power (like TDW89x0) are
changed to switch of the led after boot
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48041
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dsl_control (dsl_notify.sh) is the only process which is aware of the
state of the atm/ptm interface. Use the dsl led exclusive for the dsl
line state.
On boards which don't have a distinct internet and a dsl led, let the
netdev status of the atm interface trigger the shared led.
Triggering the shared led according to the status of the ppp interface
isn't suitable, since the led would be switched of if the ppp
connection goes down, but the line is still in sync.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48040
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- ARV7525PW: use the power led as dsl led as done by the stock firmware
- FRITZ3370: use the info led as internet led
- FRITZ7320: use the power led as dsl led as done by the stock firmware
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48037
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Use the same led logic and labels as the OEM firmware (red = okay,
blue = failure).
Add the red internet led.
Remove missing usb led workaround. The workaround shouldn't be in the
default configuration.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
SVN-Revision: 48036
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