aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/lantiq/dts/vr9.dtsi
Commit message (Collapse)AuthorAgeFilesLines
* lantiq: specify console using stdout-path instead of cmdline argumentMartin Blumenstingl2016-12-121-0/+8
| | | | | | | | Use devicetree's /chosen/stdout-path instead of the kernel command line (embedded in the .dts-files) to specify the serial console. Using the chosen node is recommended on devicetree based platforms. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
* lantiq: specify the PCIe controller's interrupt, size and address cellsMartin Blumenstingl2016-11-261-2/+10
| | | | | | This allows adding devices to the PCIe controller in the .dts files. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
* treewide: dts: use keycode defines from input dt-bindingMathias Kresin2016-11-131-1/+0
| | | | | | | | | | | | | | | | | | | | | All compiled device tree files not mentioned are binary identical to the former ones. Fix the obvious decimal/hex confusion for the power key of ramips/M2M.dts. Due to the include of the input binding header, the BTN_* node names in: - ramips/GL-MT300A.dts - ramips/GL-MT300N.dts - ramips/GL-MT750.dts - ramips/Timecloud.dts will be changed by the compiler to the numerical equivalent. Move the binding include of lantiq boards to the file where they are used the first time to hint the user where the values do come from. Signed-off-by: Mathias Kresin <dev@kresin.me>
* lantiq: cleanup dts filesMathias Kresin2016-11-031-2/+7
| | | | | | | | | | | | | | - remove not existing properties - remove properties having the same values as the included dtsi - remove nodes which are disabled in the included dtsi and not enabled in dts - replace the deprecated pinctrl-* compatible strings - use the same labels for nodes as the included dtsi - move common used vr9 pci properties to vr9.dtsi - remove the unused stp node from HomeHub 2B devcie tree source file - fix spaces vs. tabs and remove superfluous linebreaks Signed-off-by: Mathias Kresin <dev@kresin.me>
* lantiq: modify vr9.dts to support vmmcStefan Koch2016-10-311-0/+8
| | | | | | | | | | | | | (required not-distributable firmware blob - dump it by yourself from original firmware) Signed-off-by: Eddi De Pieri <eddi@depieri.net> (cherry picked from commit 8d924d43c0ea6839a3a33e54982e8da48b736001) Modified after cherry-pick: compatible attribute Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
* lantiq: enable cpu temp driver for all vr9 boardsMathias Kresin2016-10-191-0/+4
| | | | | | | Only present on v1.2 vr9 SoCs but the driver takes care to not load on boards having a v1.1 SoC. Signed-off-by: Mathias Kresin <dev@kresin.me>
* lantiq: Sanitize device tree filesAndreas Eberlein2016-10-191-1/+4
| | | | | | | | | | The device tree file of ARV752DPW uses numbers/hex values for gpio states and input event codes. This cleans it up and uses the available macros from header files. This way the functions are easier to read and comprehend. Signed-off-by: Andreas Eberlein <foodeas@aeberlein.de> [sanitize all device tree files] Signed-off-by: Mathias Kresin <dev@kresin.me>
* lantiq/xrx200-net: add interrupt for second DMA TX channel to vr9.dtsiMartin Schiller2016-08-151-1/+1
| | | | Signed-off-by: Martin Schiller <mschiller@tdt.de>
* lantiq: use new property name for eiu irqsJohn Crispin2016-06-131-1/+1
| | | | Signed-off-by: John Crispin <john@phrozen.org>
* lantiq: Move the definition of the xrx200-net node to vr9.dtsiFelix Fietkau2016-01-291-0/+13
| | | | | | | | | | This removes a lot of duplicate register and interrupt definitions by moving the xrx200-net definition to vr9.dtsi and making all devices re- use it. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48547
* lantiq: Switch to the new SPI driverFelix Fietkau2016-01-171-1/+3
| | | | | | | | | | | | | | | | Compared to the "old" driver: - Each device must assign a pinctrl setting to the SPI node to allow the new SPI driver to configure the SPI pins. While here we are also using separate input and output settings so we are independent of whether the bootloader configures the pins correctly. - We use the new "compatible" strings to make the driver choose the correct number of chip-selects for each SoC. - The new driver starts counting the chip-selects at 1 (instead of 0, like the old one did). Thus we have to adjust the devices accordingly. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48293
* lantiq: Add the SPI node to ar9.dtsi and vr9.dtsiFelix Fietkau2016-01-171-0/+10
| | | | | | | | | | This allows devices to use SPI without having to re-define (and thus duplicating) the whole SPI node. By default SPI is disabled (as before) because only few devices need it. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48286
* lantiq: Configure the PCIe reset GPIO using OFFelix Fietkau2016-01-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | After the latest pinctrl backports there are only 50 (instead of 56 as before) GPIOs/pins exported (thus the first GPIO on VRX200 SoCs is now 462, before it was 456). This means that any hardcoded GPIOs have to be adjusted. This broke the PCIe driver (which seems to be the only driver which uses hardcoded GPIO numbers), it only reports: ifx_pcie_wait_phy_link_up timeout ifx_pcie_wait_phy_link_up timeout ifx_pcie_wait_phy_link_up timeout ifx_pcie_wait_phy_link_up timeout ifx_pcie_wait_phy_link_up timeout pcie_rc_initialize link up failed!!!!! To prevent more of these issues in the future we remove the hardcoded PCIe reset GPIO definition and simply pass it via device-tree (like the PCI driver does). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48285
* lantiq: Use the new pinctrl compatible stringsFelix Fietkau2016-01-171-1/+1
| | | | | | | | | | | | | | | | These were introduced in upstream commit be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree bindings" and finally allow us to use the individual pins within our dts (for example spi_clk, etc.). Please note that this changes the number of GPIOs which are available for some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56 pins were exposed. This means that all places which are using hardcoded GPIO numbers (which are not passed via device-tree) need to be adjusted (because the first GPIO number is now 462, instead of 456). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48284
* lantiq: Add the xbar to vr9.dtsJohn Crispin2016-01-011-1/+5
| | | | | | | | linux 4.4 (since commit 08b3c894e56580b8ed3e601212a25bda974c3cc2 "MIPS: lantiq: Disable xbar fpi burst mode") requires that the xbar is defined in the .dts of vrx200 (VR9) SoCs. SVN-Revision: 48056
* lantiq: Make the MEI address available for kernel driversJohn Crispin2015-07-071-0/+1
| | | | | | | | Newer DSL driver versions depend on the address information. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 46221
* lantiq: Convert Zyxel P-2812HNU-FX and TP-Link TD-W8970 to support dwc2John Crispin2015-03-111-1/+9
| | | | | | | | | | | | | | Here the device tree entry for ifxhcd is listed as compatible with one supported in dwc2 (after patching the dwc driver appropriately). A second entry is added to support the second core of the hcd. This entry is listed to be compatible with only dwc2. Done this way there should be backwards support for both hcd drivers (ltq-hcd and dwc2) Signed-off-by: Antti Seppälä <a.seppala@gmail.com> Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> SVN-Revision: 44676
* lantiq: add 3.18 supportJohn Crispin2015-02-091-0/+4
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44348
* lantiq: fix formating in .dts filesLuka Perkov2013-06-081-1/+1
| | | | | | Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 36882
* lantiq: move dts files to thir own folderJohn Crispin2013-04-251-0/+180
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 36443
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-30 16:28:21 +0000