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* lantiq: update USB controller initializationHauke Mehrtens2017-01-091-2/+4
| | | | | | | | | | | | | This adds USB initialization fixes for Danube, Amazon SE and xrx300 and should fix the clock on at least Danube which hopefully closes FS#351. The xrx200 usb driver now uses more memory for the dwc2 fifos, this was increased in the chip compared to ar9. This is based in part on the vendor documentation and the vendor code base as a reference. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* lantiq: specify console using stdout-path instead of cmdline argumentMartin Blumenstingl2016-12-121-0/+8
| | | | | | | | Use devicetree's /chosen/stdout-path instead of the kernel command line (embedded in the .dts-files) to specify the serial console. Using the chosen node is recommended on devicetree based platforms. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
* treewide: dts: use keycode defines from input dt-bindingMathias Kresin2016-11-131-1/+0
| | | | | | | | | | | | | | | | | | | | | All compiled device tree files not mentioned are binary identical to the former ones. Fix the obvious decimal/hex confusion for the power key of ramips/M2M.dts. Due to the include of the input binding header, the BTN_* node names in: - ramips/GL-MT300A.dts - ramips/GL-MT300N.dts - ramips/GL-MT750.dts - ramips/Timecloud.dts will be changed by the compiler to the numerical equivalent. Move the binding include of lantiq boards to the file where they are used the first time to hint the user where the values do come from. Signed-off-by: Mathias Kresin <dev@kresin.me>
* lantiq: Sanitize device tree filesAndreas Eberlein2016-10-191-0/+3
| | | | | | | | | | The device tree file of ARV752DPW uses numbers/hex values for gpio states and input event codes. This cleans it up and uses the available macros from header files. This way the functions are easier to read and comprehend. Signed-off-by: Andreas Eberlein <foodeas@aeberlein.de> [sanitize all device tree files] Signed-off-by: Mathias Kresin <dev@kresin.me>
* lantiq: use new property name for eiu irqsJohn Crispin2016-06-131-1/+1
| | | | Signed-off-by: John Crispin <john@phrozen.org>
* lantiq: Make the ar9.dtsi sram node match "simple-bus"Felix Fietkau2016-01-291-1/+1
| | | | | | | | | | | All other SoC types are using "lantiq,sram" and "simple-bus" to ensure that all child nodes are set up correctly during linux kernel initialization (plat_of_setup(void) in arch/mips/lantiq/prom.c). Without this some of sram child nodes might not be parsed. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48548
* lantiq: Switch to the new SPI driverFelix Fietkau2016-01-171-1/+3
| | | | | | | | | | | | | | | | Compared to the "old" driver: - Each device must assign a pinctrl setting to the SPI node to allow the new SPI driver to configure the SPI pins. While here we are also using separate input and output settings so we are independent of whether the bootloader configures the pins correctly. - We use the new "compatible" strings to make the driver choose the correct number of chip-selects for each SoC. - The new driver starts counting the chip-selects at 1 (instead of 0, like the old one did). Thus we have to adjust the devices accordingly. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48293
* lantiq: Add the SPI node to ar9.dtsi and vr9.dtsiFelix Fietkau2016-01-171-0/+10
| | | | | | | | | | This allows devices to use SPI without having to re-define (and thus duplicating) the whole SPI node. By default SPI is disabled (as before) because only few devices need it. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48286
* lantiq: Use the new pinctrl compatible stringsFelix Fietkau2016-01-171-1/+1
| | | | | | | | | | | | | | | | These were introduced in upstream commit be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree bindings" and finally allow us to use the individual pins within our dts (for example spi_clk, etc.). Please note that this changes the number of GPIOs which are available for some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56 pins were exposed. This means that all places which are using hardcoded GPIO numbers (which are not passed via device-tree) need to be adjusted (because the first GPIO number is now 462, instead of 456). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> SVN-Revision: 48284
* lantiq: Introduce DWC2 compatible DTS definitions for AR9 USBJohn Crispin2015-09-141-1/+10
| | | | | | | | | | | | Since the AR9 USB is very similar to the VR9 USB it too can be used with the upstream DWC2 driver. Here are the DTS definitions which make it compatible with the DWC2 driver. Signed-off-by: Antti Seppälä <a.seppala@gmail.com> SVN-Revision: 46914
* lantiq: add 3.18 supportJohn Crispin2015-02-091-0/+4
| | | | | | Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44348
* lantiq: move dts files to thir own folderJohn Crispin2013-04-251-0/+179
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 36443
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