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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47544
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47543
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 46785
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*Enable SMEM MTD parser and its dependencies (SMEM & HW spinlocks) in
the kernel config
*Replaces the MTD layout in DT by the dynamic layout provided by the
SMEM parser for AP148
Using the OF based parser is still possible on platforms which have a
fixed MTD partition layout.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46658
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Previous patch 6f2905eeb6ce5ddec8d12d677e1f377a940b537b enabled ADM in
the kernel, which causes a kernel panic when accessing the SPI flash.
As a workaround, We'll disable DMA for the flash for now. It was not
enabled previously anyway so we'll just leave it as is.
Reported-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46587
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These patches add support for ipq806x NAND flash controller. Most of
these are cherry-picked & backported from LKML:
*https://lkml.org/lkml/2015/8/3/16
This patch just modifies the kernel code, but doesn't change the config.
It should be harmless.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46568
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These are cherry-picked & backported from LKML:
*https://lkml.org/lkml/2015/3/17/19
They are enabled on both 3.18 and 4.1 kernel. Patches 150 to 154 are
applying changes merged since 3.18; they enable mechanisms used by the
ADM driver.
ADM engine is used by the NAND controller, so it is necessary to
bring-up NAND flash support.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46567
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Old bootloader (same ones which have DT disabled) don't perform any PCIe
initialization. The consequence is a freeze during PCIe bring-up on
these old u-boot. Same kernel with a newer bootloaders works fine as
they contain the corresponding PCIe init code.
In this change, we'll add the missing init and make sure the kernel
doesn't rely on some preexisting init to get PCIe to work. That includes
the following changes:
*GPIOs: set function & drive strength
*Clocks: add init code for aux & ref clocks
*PCIe driver: additional init of the hardware controller
Tested 3.18 and 4.1 on an AP148 with bootloader branch 0.0.1
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46557
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PCIe controller nodes are numbers 0/1/2 in the chipset dtsi file, but
the pinmux nodes are numbers 1/2/3. We'll make it consistent by changing
the pinmux numbering to match the controller's one.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 46556
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This driver has been cherry-picked and backported from the following
LKML thread:
*https://lkml.org/lkml/2015/5/26/744
It also updates the DT accordingly.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
SVN-Revision: 45831
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