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path: root/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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* ipq806x: force 2nd pci slot into gen1 modePavel Kubelun2018-01-171-2/+1
| | | | | | | | | | | | | | According to QSDK and OEM tarballs (checked c2600, r7500v2, r7800) 2nd pci slot (pci1, 2,4 GHz card)) on ap148 based boards should operate in gen1 mode. EA8500 is an exception and according to GPL pcie0 should operate in gen1 mode. In previous commit we've added the support for this option, so enable it in DT for affected devices. QSDK ref: https://source.codeaurora.org/quic/qsdk/oss/kernel/linux-msm/commit/?h=release/endive_preview_cc&id=f3b07fe309027c52fc163149500cedddd707c506 While at it move the phy transmit termination offset value into dtsi file as it's platform specific. Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
* ipq806x: fix NAND support for linux 4.9Felix Fietkau2017-03-131-3/+9
| | | | Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ipq806x: clean up dts patching in 4.9Felix Fietkau2017-03-131-0/+241
Do not patch upstream files, overwrite them entirely. The upstream files are buggy for a number of devices and this significantly simplifies the patch structure Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: John Crispin <john@phrozen.org>