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* kernel: bump 4.19 to 4.19.108Koen Vandeputte2020-03-092-5/+5
| | | | | | | | | Refreshed all patches. Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ipq40xx: add support for 8devices Habanero DVKRobert Marko2020-03-092-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the 8devices Habanero development board. Specs are: CPU: QCA IPQ4019 RAM: DDR3L 512MB Storage: 32MB SPI-NOR and optional Parallel SLC NAND(Some boards ship with it and some without) WLAN1: 2.4 GHz built into IPQ4019 (802.11n) 2x2 WLAN2: 5 GHz built into IPO4019 (802.11ac Wawe-2) 2x2 Ethernet: 5x Gbit LAN (QCA 8075) USB: 1x USB 2.0 and 1x USB 3.0 (Both built into IPQ4019) MicroSD slot (Uses SD controller built into IPQ4019) SDIO3.0/EMMC slot (Uses the same SD controller) Mini PCI-E Gen 2.0 slot (Built into IPQ4019) 5x LEDs (4 GPIO controllable) 2x Pushbutton (1 is connected to GPIO, other to SoC reset) LCD ZIF socket (Uses the LCD controller built into IPQ4019 which has no driver support) 1x UART 115200 rate on J18 2x breakout development headers 12V DC Jack for power DIP switch for bootstrap configuration Installation instructions: Since boards ship with vendors fork of OpenWrt sysupgrade can be used. Signed-off-by: Robert Marko <robimarko@gmail.com>
* ipq40xx: add IPQ4019 SD/MMC controller supportRobert Marko2020-03-097-3/+249
| | | | | | | | | | This commit finally adds support for the built in SD/MMC controller in IPQ4019 SoC. Controller is supported by the upstream SDHCI-MSM driver with a minor clock setting patch. Patch is special to the IPQ4019 and cannot be upstreamed. LDO and SDHCI node are upstreamed, and LDO node is awaiting to be accepted. Signed-off-by: Robert Marko <robimarko@gmail.com>
* ipq40xx: qce - add fixes for AES ciphersEneas U de Queiroz2020-02-289-0/+913
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This backports commits from master that fix AES ciphers when using the qce driver: - A couple of simple fixes for CTR and XTS modes used with AES: * 041-crypto-qce-fix-ctr-aes-qce-block-chunk-sizes.patch * 042-crypto-qce-fix-xts-aes-qce-key-sizes.patch - A fix for a bug that affected cases when there were more entries in the input sg list than necessary to actually encrypt, resulting in failure in gcm, where the authentication tag is present after the encryption data: * 043-crypto-qce-save-a-sg-table-slot-for-result-buf.patch - A fix to update the IV buffer passed to the driver from the kernel: * 044-crypto-qce-update-the-skcipher-IV.patch - A patch that reduces memory footprint and driver initialization by only initializing the fallback mechanism where it is actually used: * 046-crypto-qce-initialize-fallback-only-for-AES.patch - Three patches that make gcm and xts modes work with the qce driver, and improve performance with small blocks: * 047-crypto-qce-use-cryptlen-when-adding-extra-sgl.patch * 048-crypto-qce-use-AES-fallback-for-small-requests.patch * 049-crypto-qce-handle-AES-XTS-cases-that-qce-fails.patch - A patch that allows the hashes/ciphers to be built individually. * 051-crypto-qce-allow-building-only-hashes-ciphers.patch Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com> [renumbered patches, added patches from dropped commit, refreshed, 5.4] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: qce - switch to skcipher APIEneas U de Queiroz2020-02-282-0/+973
| | | | | | | | | This backports a commit updating the API of the QCE crypto engine to what is used in current kerenl, easing future upstream backports. Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com> [renumber patches, refreshed, added 5.4 patches] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: add support for EnGenius EAP2200Steven Lin2020-02-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SOC: IPQ4019 / QCA Dakota CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7 DRAM: 256 MiB FLASH: NOR 4 MiB + NAND 128 MiB ETH: Qualcomm Atheros QCA8072 WLAN1: Qualcomm Atheros QCA4019 2.4GHz 802.11bgn 2:2x2 WLAN2: Qualcomm Atheros QCA4019 5GHz 802.11a/n/ac 2:2x2 WLAN2: Qualcomm Atheros QCA9888 5GHz 802.11a/n/ac 2:2x2 INPUT: WPS Button LEDS: Power, LAN1, LAN2, WLAN 2.4GHz, WLAN 5GHz-1, WLAN 5GHz-2, OPMODE 1. Load Ramdisk via U-Boot To set up the flash memory environment, do the following: a. As a preliminary step, ensure that the board console port is connected to the PC using these RS232 parameters: * 115200bps * 8N1 b. Confirm that the PC is connected to the board using one of the Ethernet ports. c. Set a static ip 192.168.99.8 for Ethernet that connects to board. d. The PC must have a TFTP server launched and listening on the interface to which the board is connected. e. At this stage power up the board and, after a few seconds, press 4 and then any key during the countdown. U-BOOT> set serverip 192.168.99.9 && tftpboot 0x84000000 192.168.99.8:openwrt.itb && bootm Signed-off-by: Steven Lin <steven.lin@senao.com> [copied 4.19 dts to 5.4] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* kernel: bump 4.19 to 4.19.105Koen Vandeputte2020-02-242-6/+6
| | | | | | | | | | | | | Refreshed all patches. Fixes: - CVE-2013-1798 - CVE-2019-3016 Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* kernel: bump 4.19 to 4.19.101Koen Vandeputte2020-02-041-4/+4
| | | | | | | | | | | | | | | | | | Refreshed all patches. Fixes: - CVE-2019-14896 - CVE-2019-14897 Remove upstreamed: - 023-0007-crypto-crypto4xx-Fix-wrong-ppc4xx_trng_probe-ppc4xx_.patch - 950-0202-staging-bcm2835-camera-fix-module-autoloading.patch - 001-4.22-01-MIPS-BCM63XX-drop-unused-and-broken-DSP-platform-dev.patch Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ipq40xx: add support for EnGenius EMD1Yen-Ting-Shen2020-01-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SOC: IPQ4018 / QCA Dakota CPU: Quad-Core ARMv7 Processor rev 5 (v7l) Cortex-A7 DRAM: 256 MiB NOR: 32 MiB ETH: Qualcomm Atheros QCA8072 (1 port) WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2 WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2 INPUT: RESET Button LEDS: White, Blue, Red, Orange Flash instruction: From EnGenius firmware to OpenWrt firmware: In Firmware Upgrade page, upgrade your openwrt-ipq40xx-generic-engenius_emd1-squashfs-factory.bin directly. From OpenWrt firmware to EnGenius firmware: 1. Setup a TFTP server on your computer and configure static IP to 192.168.99.8 Put the EnGenius firmware in the TFTP server directory on your computer. 2. Power up EMD1. Press 4 and then press any key to enter u-boot. 3. Download EnGenius firmware (IPQ40xx) # tftpboot 0x84000000 openwrt-ipq40xx-emd1-nor-fw-s.img 4. Flash the firmware (IPQ40xx) # imgaddr=0x84000000 && source 0x84000000:script 5. Reboot (IPQ40xx) # reset Signed-off-by: Yen-Ting-Shen <frank.shen@senao.com> [removed BOARD_NAME] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: Add support for D-Link DAP-2610Fredrik Olofsson2020-01-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications ============== - SOC: IPQ4018 - RAM: DDR3 256MB - Flash: SPI NOR 16MB - WiFi: - 2.4GHz: IPQ4018, 2x2, front end SKY85303-11 - 5GHz: IPQ4018, 2x2, front end SKY85717-21 - Ethernet: 1x 10/100/1000Mbps, POE 802.3af - PHY: QCA8072 - UART: GND, blocked, 3.3V, RX, TX / 115200 8N1 - LED: 1x red / green - Button: 1x reset / factory default - U-Boot bootloader with tftp and "emergency web server" accessible using serial port. Installation ============ Flash factory image from D-Link web UI. Constraints in the D-Link web UI makes the factory image unnecessarily large. Flash again using sysupgrade from inside OpenWrt to reclaim some flash space. Return to stock D-Link firmware =============================== Partition layout is preserved, and it is possible to return to the stock firmware simply by downloading it from D-Link and writing it to the firmware partition. # mtd -r write dap2610-firmware.bin firmware Quirks ====== To be flashable from the D-Link http server, the firmware must be larger then 6MB, and the size in the firmware header must match the actual file size. Also, the boot loader verifies the checksum of the firmware before each boot, thus the jffs2 must be after the checksum covered part. This is solved in the factory image by having the rootfs at the very end of the image (without pad-rootfs). The sysupgrade image which does not have to be flashable from the D-Link web UI may be smaller, and the checksum in the firmware header only covers the kernel part of the image. Signed-off-by: Fredrik Olofsson <fredrik.olofsson@anyfinetworks.com> [added WRGG Variables to DEVICE_VARS, squashed spi pinconf/mux, added emd1's gmac0 config,fix dtc warnings] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* kernel: bump 4.19 to 4.19.98Koen Vandeputte2020-01-242-2/+2
| | | | | | | | | Refreshed all patches. Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ipq40xx: add support for Aruba AP-303HDavid Bauer2020-01-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Aruba AP-303H is the hospitality version of the Aruba AP-303 with a POE-passthrough enabled ethernet switch instead of a sigle PHY. Hardware -------- SoC: Qualcomm IPQ4029 RAM: 512M DDR3 FLASH: - 128MB SPI-NAND (Macronix) - 4MB SPI-NOR (Macronix MX25R3235F) TPM: Atmel AT97SC3203 BLE: Texas Instruments CC2540T attached to ttyMSM1 ETH: Qualcomm QCA8075 LED: WiFi (amber / green) System (red / green /amber) PSE (green) BTN: Reset USB: USB 2.0 To connect to the serial console, you can solder to the labled pads next to the USB port or use your Aruba supplied UARt adapter. Do NOT plug a standard USB cable into the Console labled USB-port! Aruba/HPE simply put UART on the micro-USB pins. You can solder yourself an adapter cable: VCC - NC D+ - TX D- - RX GND - GND The console setting in bootloader and OS is 9600 8N1. Voltage level is 3.3V. To enable a full list of commands in the U-Boot "help" command, execute the literal "diag" command. Installation ------------ 1. Get the OpenWrt initramfs image. Rename it to ipq40xx.ari and put it into the TFTP server root directory. Configure the TFTP server to be reachable at 192.168.1.75/24. Connect the machine running the TFTP server to the E0 (!) ethernet port of the access point, as it only tries to pull from the WAN port. 2. Connect to the serial console. Interrupt autobooting by pressing Enter when prompted. 3. Configure the bootargs and bootcmd for OpenWrt. $ setenv bootargs_openwrt "setenv bootargs console=ttyMSM0,9600n8" $ setenv nandboot_openwrt "run bootargs_openwrt; ubi part aos1; ubi read 0x85000000 kernel; set fdt_high 0x87000000; bootm 0x85000000" $ setenv ramboot_openwrt "run bootargs_openwrt; setenv ipaddr 192.168.1.105; setenv serverip 192.168.1.75; netget; set fdt_high 0x87000000; bootm" $ setenv bootcmd "run nandboot_openwrt" $ saveenv 4. Load OpenWrt into RAM: $ run ramboot_openwrt 5. After OpenWrt booted, transfer the OpenWrt sysupgrade image to the /tmp folder on the device. You will need to plug into E1-E3 ports of the access point to reach OpenWrt, as E0 is the WAN port of the device. 6. Flash OpenWrt: $ ubidetach -p /dev/mtd16 $ ubiformat /dev/mtd16 $ sysupgrade -n /tmp/openwrt-sysupgrade.bin To go back to the stock firmware, simply reset the bootcmd in the bootloader to the original value: $ setenv bootcmd "boot" $ saveenv Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: add support for EZVIZ CS-W3-WD1200G EUPTom Brouwer2020-01-121-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware: SOC: Qualcomm IPQ4018 RAM: 128 MB Nanya NT5CC64M16GP-DI FLASH: 16 MB Macronix MX25L12805D ETH: Qualcomm QCA8075 (4 Gigabit ports, 3xLAN, 1xWAN) WLAN: Qualcomm IPQ4018 (2.4 & 5 Ghz) BUTTON: Shared WPS/Reset button LED: RGB Status/Power LED SERIAL: Header J8 (UART, Left side of board). Numbered from top to bottom: (1) GND, (2) TX, (3) RX, (4) VCC (White triangle next to it). 3.3v, 115200, 8N1 Tested/Working: * Ethernet * WiFi (2.4 and 5GHz) * Status LED * Reset Button (See note below) Implementation notes: * The shared WPS/Reset button is implemented as a Reset button * I could not find a original firmware image to reverse engineer, meaning currently it's not possible to flash OpenWrt through the Web GUI. Installation (Through Serial console & TFTP): 1. Set your PC to fixed IP 192.168.1.12, Netmask 255.255.255.0, and connect to one of the LAN ports 2. Rename the initramfs image to 'C0A8010B.img' and enable a TFTP server on your pc, to serve the image 2. Connect to the router through serial (See connection properties above) 3. Hit a key during startup, to pause startup 4. type `setenv serverip 192.168.1.12`, to set the tftp server address 5. type `tftpboot`, to load the image from the laptop through tftp 6. type `bootm` to run the loaded image from memory 6. (If you want to return to stock firmware later, create an full MTD backup, e.g. using instructions here https://openwrt.org/docs/guide-user/installation/generic.backup#create_full_mtd_backup) 7. Transfer the 'sysupgrade' OpenWrt firmware image from PC to router, e.g.: `scp xxx-squashfs-sysupgrade.bin root@192.168.1.1:/tmp/upgrade.bin` 8. Run sysupgrade to permanently install OpenWrt to flash: `sysupgrade -n /tmp/upgrade.bin` Revert to stock: To revert to stock, you need the MTD backup from step 6 above: 1. Unpack the MTD backup archive 2. Transfer the 'firmware' partition image to the router (e.g. mtd8_firmware.backup) 3. On the router, do `mtd write mtd8_firmware.backup firmware` Signed-off-by: Tom Brouwer <tombrouwer@outlook.com> [removed BOARD_NAME, OpenWRT->OpenWrt, changed LED device name to board name] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: build DEVICE_DTS based on SOC and device nameAdrian Schmutzler2019-12-271-5/+5
| | | | | | | | | | | | | | | | | | | This patch uses the SOC variable to calculate DTS names automatically based on the SOC and the device definition node name. This reduces redundancy and (by having to choose DTS name appropriately) will unify the naming of a device in different places (image/Makefile, DTS name, compatible, image name). This is supposed to make life easier for developers and reviewers. Since the kernel uses a "soc-device.dts" scheme for this target, we use this for the derivation of DEVICE_DTS, too, and rename the files not having followed it so far. Note that for some devices the kernel itself is inconsistent, leaving us with a manual overwrite for ap.dk01.1-c1 and ap.dk04.1-c1. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ipq40xx: add support for Aruba AP-303David Bauer2019-12-202-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- SoC: Qualcomm IPQ4029 RAM: 512M DDR3 FLASH: - 128MB NAND (Macronix MX30LF1G18AC) - 4MB SPI-NOR (Macronix MX25R3235F) TPM: Atmel AT97SC3203 BLE: Texas Instruments CC2540T attached to ttyMSM0 ETH: Atheros AR8035 LED: WiFi (amber / green) System (red / green) BTN: Reset To connect to the serial console, you can solder to the labled pads next to the USB port or use your Aruba supplied UARt adapter. Do NOT plug a standard USB cable into the Console labled USB-port! Aruba/HPE simply put UART on the micro-USB pins. You can solder yourself an adapter cable: VCC - NC D+ - TX D- - RX GND - GND The console setting in bootloader and OS is 9600 8N1. Voltage level is 3.3V. To enable a full list of commands in the U-Boot "help" command, execute the literal "diag" command. Installation ------------ 1. Get the OpenWrt initramfs image. Rename it to ipq40xx.ari and put it into the TFTP server root directory. Configure the TFTP server to be reachable at 192.168.1.75/24. Connect the machine running the TFTP server to the ethernet port of the access point. 2. Connect to the serial console. Interrupt autobooting by pressing Enter when prompted. 3. Configure the bootargs and bootcmd for OpenWrt. $ setenv bootargs_openwrt "setenv bootargs console=ttyMSM1,9600n8" $ setenv nandboot_openwrt "run bootargs_openwrt; ubi part aos1; ubi read 0x85000000 kernel; bootm 0x85000000" $ setenv ramboot_openwrt "run bootargs_openwrt; setenv ipaddr 192.168.1.105; setenv serverip 192.168.1.75; netget; set fdt_high 0x87000000; bootm" $ setenv bootcmd "run nandboot_openwrt" $ saveenv 4. Load OpenWrt into RAM: $ run ramboot_openwrt 5. After OpenWrt booted, transfer the OpenWrt sysupgrade image to the /tmp folder on the device. 6. Flash OpenWrt: $ ubidetach -p /dev/mtd1 $ ubiformat /dev/mtd1 $ sysupgrade -n /tmp/openwrt-sysupgrade.bin To go back to the stock firmware, simply reset the bootcmd in the bootloader to the original value: $ setenv bootcmd "boot" $ saveenv Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: add support for Crisis Innovation Lab MeshPoint.OneRobert Marko2019-11-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MeshPoint.One is Wi-Fi hotspot and smart IoT gateway (based upon Jalapeno module from 8Devices). MeshPoint.One (https://meshpointone.com) is a unique Wi-Fi hotspot and smart city gateway that can be installed and powered from street lighting (even solar power in the future). MeshPoint provides up to 27 hours of interrupted Wi-Fi and IoT services from internal battery even when external power is not available. MeshPoint.One can be used for disaster relief efforts in order to provide instant Wi-Fi coverage that can be easily expanded by just adding more devices that create wide area mesh network. MeshPoint.One devices have standard Luci UI for management. Features: - 1x 1Gpbs WAN - 1x 1Gbps LAN - POE input (eth0) - POE output (eth1) - Sensor for temperature, humidity and pressure (Bosch BME280) - current, voltage and power measurement via TI INA230 - Hardware real time clock - optional power via Li-Ion battery - micro USB port with USB to serial chip for easy OpenWrt terminal access - I2C header for connecting additional sensors Installation: ------------- Simply flash the sysupgrade image from stock firmware. Or use the built in Web recovery into bootloader: Hold Reset button for 5 to 20 seconds or use UART and httpd command. Web UI will appear on 192.168.2.100 by default. For web recovery use the factory.ubi image. Signed-off-by: Damir Samardzic <damir.samardzic@sartura.hr> Signed-off-by: Damir Franusic <damir.franusic@sartura.hr> Signed-off-by: Valent Turkovic <valent@meshpoint.me> Signed-off-by: Robert Marko <robert@meshpoint.me> [commit description long line wrap, usb->USB] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* kernel: bump 4.19 to 4.19.85Koen Vandeputte2019-11-221-34/+0
| | | | | | | | | | | | | | | | | Refreshed all patches. Altered patches: - 080-sata_support.patch Remove upstreamed: - 034-v4.20-MIPS-BCM47XX-Enable-USB-power-on-Netgear-WNDR3400v3.patch - 001-4.21-01-BCM63XX-fix-switch-core-reset-on-BCM6368.patch - 073-qcom-ipq4019-fix-cpu0-s-qcom-saw2-reg-value.patch Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ipq40xx: mdio: remove support for phy-reset-gpioDENG Qingfang2019-11-071-65/+2
| | | | | | | | | | | | | Commit 6f6c00cfc95f ("ipq40xx: Add support for Unielec U4019") has introduced support for `phy-reset-gpio` DT property, which isn't needed as the MDIO already supports `reset-gpios`[1] which could be used instead. 1. https://elixir.bootlin.com/linux/v4.19.81/source/Documentation/devicetree/bindings/net/mdio.txt Ref: PR#2511 Signed-off-by: DENG Qingfang <dengqf6@mail2.sysu.edu.cn> [commit title and description facelift] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ipq40xx: ipq4019: Add new device Compex WPJ419Daniel Danzberger2019-11-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This device contains 2 flash devices. One NOR (32M) and one NAND (128M). U-boot and caldata are on the NOR, the firmware on the NAND. SoC: IPQ4019 CPU: 4x 710MHz ARMv7 RAM: 256MB FLASH: NOR:32MB NAND:128MB ETH: 2x GMAC Gigabit POE: 802.3 af/at POE, IEEE802.3af/IEEE802.3at(48-56V) WIFI: 1x 2.4Ghz Atheros qca4019 2x2 MU-MIMO 1x 5.0Ghz Atheros qca4019 2x2 MU-MIMO USB: 1x 3.0 PCI: 1x Mini PCIe SIM: 1x Slot SD: 1x MicroSD slot BTN: Reset LED: - Power - Ethernet UART: 1x Serial Port 4 Pin Connector (UART) 1x Serial Port 6 Pin Connector (High Speed UART) POWER: 12V 2A Installation ------------ Initial flashing can only be done via u-boot using the following commands: tftpboot openwrt-ipq40xx-generic-compex_wpj419-squashfs-nand-factory.ubi nand erase.chip; nand write ${fileaddr} 0x0 ${filesize} res Signed-off-by: Daniel Danzberger <daniel@dd-wrt.com>
* kernel: bump 4.19 to 4.19.80Koen Vandeputte2019-10-302-15/+2
| | | | | | | | | Refreshed all patches. Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* kernel: mtd: spinand: Backport chip definitionsJeff Kletsky2019-10-241-31/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | generic: Add/rename patches for upstream consistency ipq40xx: generic-level patch replaces same-source patches-4.19/ 082-v4.20-mtd-spinand-winbond-Add-support-for-W25N01GV.patch The SPI-NAND framework from Linux uses common driver code that is then "tuned" by a tiny struct of chip-specific data that describes available commands, timing, and layout (data and OOB data). Several manufacturers and chips have been added since 4.19, several of which are used in devices already supported by OpenWrt (typically with no or "legacy" access to their NAND memory). This commit catches up the supported-chip definitions through Linux 5.2-rc6 and linux/next. The driver is only compiled for platforms with CONFIG_MTD_SPI_NAND=y. This presently includes ipq40xx and pistachio, with the addition of ath79-nand in these commits (and not ath79-generic or ath79-tiny). Upstream patches refreshed against 4.19.75 Build-tested-on: ipq40xx Run-tested-on: ath79-nand Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
* ipq40xx: add support for AVM FRITZ!Repeater 1200David Bauer2019-10-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- SoC: Qualcomm IPQ4019 RAM: 256M DDR3 FLASH: 128M NAND WiFi: 2T2R IPQ4019 bgn 2T2R IPQ4019 a/n/ac ETH: Atheros AR8033 RGMII PHY BTN: 1x Connect (WPS) LED: Power (green/red/yellow) Installation ------------ 1. Grab the uboot for the Device from the 'u-boot-fritz1200' subdirectory. Place it in the same directory as the 'eva_ramboot.py' script. It is located in the 'scripts/flashing' subdirectory of the OpenWRT tree. 2. Assign yourself the IP address 192.168.178.10/24. Connect your Computer to one of the boxes LAN ports. 3. Connect Power to the Box. As soon as the LAN port of your computer shows link, load the U-Boot to the box using following command. > ./eva_ramboot.py --offset 0x85000000 192.168.178.1 uboot-fritz1200.bin 4. The U-Boot will now start. Now assign yourself the IP address 192.168.1.70/24. Copy the OpenWRT initramfs (!) image to a TFTP server root directory and rename it to 'FRITZ1200.bin'. 5. The Box will now boot OpenWRT from RAM. This can take up to two minutes. 6. Copy the U-Boot and the OpenWRT sysupgrade (!) image to the Box using scp. SSH into the Box and first write the Bootloader to both previous kernel partitions. > mtd write /path/to/uboot-fritz1200.bin uboot0 > mtd write /path/to/uboot-fritz1200.bin uboot1 7. Remove the AVM filesystem partitions to make room for our kernel + rootfs + overlayfs. > ubirmvol /dev/ubi0 --name=avm_filesys_0 > ubirmvol /dev/ubi0 --name=avm_filesys_1 8. Flash OpenWRT peristently using sysupgrade. > sysupgrade -n /path/to/openwrt-sysupgrade.bin Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: fix ethernet probe abort on missing phy-resetDavid Bauer2019-10-231-1/+1
| | | | | | | This commit completely fixes the abortion of the ipq40xx ethernet driver probe in case no phy-reset is defined. Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: fix optional gpio-resetJohn Crispin2019-10-221-1/+1
| | | | | | If a gpio reset pin was not defined we should not bog out. Signed-off-by: John Crispin <john@phrozen.org>
* ipq40xx: Add support for Unielec U4019Kristian Evensen2019-10-212-9/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for the 32MB storage/512MB RAM version of the U4019 IPQ4019-based board from Unielec. The board has the following specifications: * Qualcomm IPQ4019 (running at 717MHz) * 512MB DDR3 RAM (optional 256MB/1GB) * 32MB SPI NOR (optional 8/16MB or NAND) * Five gigabit ports (Qualcomm QCA8075) * 1x 2.4 GHz wifi (QCA4019 hw1.0) * 1x 5 Ghz wifi (QCA4019 hw1.0) * 1x mini-PCIe slot (only USB-pins connected) * 1x SIM slot (mini-SIM) * 1x USB2.0 port * 1x button * 1x controllable LED * 1x micro SD-card reader Working: * Ethernet * Wifi * USB-port * mini-PCIe slot + SIM slot * Button * Sysupgrade Not working: * SD card slot (no upstream support) Installation instructions: In order to install OpenWRT on the U4019, you need to go via the initramfs-image. The installation steps are as follows: * Connect to board via serial (header exposed and clearly marked). * Interrupt bootloader by pressing a button. * Copy the initramfs-image to your tftp folder, call the file C0A80079.img. * Give the network interface connected to the U4019 the address 192.168.0.156/24. * Start your tftp-server and run tftpboot on the board. * Run bootm when the file has been transferred, to boot OpenWRT. * Once OpenWRT has booted, copy the sysupgrade-image to the device and run sysupgrade to install OpenWRT on the U4019. Notes: - Since IPQ4019 has been moved to 4.19, I have not added support for kernel 4.14. - There is a bug with hardware encryption on IPQ4019, causing poor performance with TCP and ipsec (see for example FS#2355). In order to improve performance, I have disabled hardware encryption in the DTS. We can enable hw. enc. once/if bug is fixed. - In order for Ethernet to work, the phy has to be reset by setting gpio 47 low/high. Adding support for phy reset via gpio required patching the mdio-driver, and the code added comes from the vendor driver. I do not know if patching the driver is an acceptable approach or not. v1->v2: * Do not use wildcard as identifier in the board.d-scripts (thanks Adrian Schmutzler). Signed-off-by: Kristian Evensen <kristian.evensen@gmail.com>
* ipq40xx: essedma: Fix dead lockMasafumi UTSUGI2019-10-201-2/+2
| | | | | | | | | | | | | | | | | edma_read_append_stats() gets called from two places in the driver. The first place is the kernel timer that periodically updates the statistics, so nothing gets lost due to overflows. The second one it's part of the userspace ethtool ioctl handler to provide up-to-date values. For this configuration, the use of spin_lock() is not sufficient and as per: <https://mirrors.edge.kernel.org/pub/linux/kernel/people/rusty/kernel-locking/c214.html> the locking has to be upgraded to spin_lock_bh(). Signed-off-by: Masafumi UTSUGI <mutsugi@allied-telesis.co.jp> [folded patch into 710-, rewrote message] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: abort ar40xx probe on missing PHYsDavid Bauer2019-09-251-0/+23
| | | | | | | | | | | | The ar40xx driver currently panics in case no QCA807x PHY has been successfully probed. This happens when the external PHY is still in reset when probing the ar40xx switch driver. Note that this patch does not fix the root cause, ar40xx_probe now simply fails instead of causing a kernel panic due to a nullpointer dereference. Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: fix hw-crypto detection of qce driverEneas U de Queiroz2019-09-211-0/+31
| | | | | | | | | | This adds the CRYPTO_ALG_KERN_DRIVER_ONLY flag to Qualcomm crypto engine driver algorithms, so that openssl devcrypto can recognize them as hardware-accelerated. Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com> [refresh, move to ipq40xx as its the only target right now] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* kernel: bump 4.19 to 4.19.73Koen Vandeputte2019-09-203-99/+0
| | | | | | | | | | | | | | | | | | Refreshed all patches. Remove upstreamed: - 840-media-i2c-tda1997x-select-V4L2_FWNODE.patch - 079-v4.20-ARM-dts-qcom-ipq4019-fix-PCI-range.patch - 083-ARM-dts-qcom-ipq4019-enlarge-PCIe-BAR-range.patch - 084-ARM-dts-qcom-ipq4019-Fix-MSI-IRQ-type.patch Fixes: - CVE-2019-15030 Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* kernel: bump 4.19 to 4.19.68Koen Vandeputte2019-08-281-7/+7
| | | | | | | | | | | | Refreshed all patches. Remove upstreamed: - 950-0307-Revert-pwm-Set-class-for-exported-channels-in-sysfs.patch Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ipq40xx: remove redundant PHY_POLL set codeChristian Lamparter2019-08-021-6/+1
| | | | | | | | The [devm_]mdiobus_alloc[_size()] functions are creating the array of interrupt numbers as well as initializing them to POLLING. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: decouple mdio-ipq40xx and ar40xxChristian Lamparter2019-08-022-235/+234
| | | | | | | This makes it possible to delete the ar40xx driver in the future by just removing the file. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: extend DT mdio node to be more accessibleChristian Lamparter2019-08-021-6/+6
| | | | | | | | The MDIO node will become more important in the future. Hence, this patch adds DT labels to make the properties inside the various subnodes more accessible. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* kernel: bump 4.19 to 4.19.62Koen Vandeputte2019-07-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refreshed all patches. Remove upstreamed: - 023-0013-crypto-crypto4xx-fix-AES-CTR-blocksize-value.patch - 023-0014-crypto-crypto4xx-fix-blocksize-for-cfb-and-ofb.patch - 023-0015-crypto-crypto4xx-block-ciphers-should-only-accept-co.patch - 950-0252-staging-bcm2835_camera-Ensure-all-buffers-are-return.patch - 950-0253-staging-bcm2835-camera-Remove-check-of-the-number-of.patch - 950-0254-staging-bcm2835-camera-Handle-empty-EOS-buffers-whil.patch - 950-0489-staging-mmal-vchiq-Replace-spinlock-protecting-conte.patch - 0021-ARM-dts-gemini-Fix-up-DNS-313-compatible-string.patch - 049-v4.20-mips-remove-superfluous-check-for-linux.patch - 100-MIPS-fix-build-on-non-linux-hosts.patch - 303-MIPS-Fix-bounds-check-virt_addr_valid.patch - 0002-usb-dwc2-use-a-longer-AHB-idle-timeout-in-dwc2_core_.patch Altered patches: - 950-0267-staging-vc04_services-Split-vchiq-mmal-into-a-module.patch - 700-net-add-qualcomm-mdio-and-phy.patch Fixes: - CVE-2019-3846 New symbol: - AX88796B_PHY Compile-tested on: cns3xxx, imx6 Runtime-tested on: cns3xxx, imx6 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ipq40xx: fix high resolution timerPavel Kubelun2019-06-154-3/+32
| | | | | | | | | | | | | | | | Cherry-picked from CAF QSDK repo. see 090-ipq40xx-fix-high-resolution-timer.patch Original commit message: The kernel is failing in switching the timer for high resolution mode and clock source operates in 10ms resolution. The always-on property needs to be given for timer device tree node to make clock source working in 1ns resolution. Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [changed authorship of main patch to pavel and cherry-picked patch to Abhishek Sahu]
* ipq40xx: directly define voltage per oppPavel Kubelun2019-06-1510-12/+16
| | | | | | | This should align opp table with what it was before converting to OPP v2. Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: Add support for Linksys EA8300 (Dallas)Jeff Kletsky2019-05-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linksys EA8300 is based on QCA4019 and QCA9888 and provides three, independent radios. NAND provides two, alternate kernel/firmware images with fail-over provided by the OEM U-Boot. Installation: "Factory" images may be installed directly through the OEM GUI. Hardware Highlights: * IPQ4019 at 717 MHz (4 CPUs) * 256 MB NAND (Winbond W29N02GV, 8-bit parallel) * 256 MB RAM * Three, fully-functional radios; `iw phy` reports (FCC/US, -CT): * 2.4 GHz radio at 30 dBm * 5 GHz radio on ch. 36-64 at 23 dBm * 5 GHz radio on ch. 100-144 at 23 dBm (DFS), 149-165 at 30 dBm #{ managed } <= 16, #{ AP, mesh point } <= 16, #{ IBSS } <= 1 * All two-stream, MCS 0-9 * 4x GigE LAN, 1x GigE Internet Ethernet jacks with port lights * USB3, single port on rear with LED * WPS and reset buttons * Four status lights on top * Serial pads internal (unpopulated) "Linksys Dallas WiFi AP router based on Qualcomm AP DK07.1-c1" Implementation Notes: The OEM flash layout is preserved at this time with 3 MB kernel and ~69 MB UBIFS for each firmware version. The sysdiag (1 MB) and syscfg (56 MB) partitions are untouched, available as read-only. Serial Connectivity: Serial connectivity is *not* required to flash. Serial may be accessed by opening the device and connecting a 3.3-V adapter using 115200, 8n1. U-Boot access is good, including the ability to load images over TFTP and either run or flash them. Looking at the top of the board, from the front of the unit, J3 can be found on the right edge of the board, near the rear | J3 | |-| | |O| | (3.3V seen, open-circuit) |O| | TXD |O| | RXD |O| | |O| | GND |-| | | Unimplemented: * serial1 "ttyQHS0" (serial0 works as console) * Bluetooth; Qualcomm CSR8811 (potentially conected to serial1) Other Notes: https://wikidevi.com/wiki/Linksys_EA8300 states FCC docs also cover the Linksys EA8250. According to the RF Test Report BT BR+EDR, "All models are identical except for the EA8300 supports 256QAM and the EA8250 disable 256QAM." Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
* ipq40xx: essedma: Add fix for memory allocation issuesChristian Lamparter2019-03-241-0/+197
| | | | | | | | | | | | | This patch adds a ChromiumOS 3.18 patch [0] that fixes memory allocation issues under memory pressure by keeping track of missed allocs and rectify the omission at a later date. It also adds ethtool counters for memory allocation failures accounting so this can be verified. [0] <https://chromium.googlesource.com/chromiumos/third_party/kernel/+/d4e1e4ce6801f9eddce056c58f5a288864955265> Reported-by: Chen Minqiang <ptpt52@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: add support for EnGenius ENS620EXTSteve Glennon2019-03-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- CPU: Qualcomm IPQ4018 RAM: 256M FLASH: 32M SPI NOR W25Q256 ETH: QCA8075 WiFi2: IPQ4018 2T2R 2SS b/g/n WiFi5: IPQ4018 2T2R 2SS n/ac LED: - Power amber - LAN1(PoE) green - LAN2 green - Wi-Fi 2.4GHz green - Wi-Fi 5GHz green BTN: - WPS UART: 115200n8 3.3V J1 VCC(1) - GND(2) - TX(3) - RX(4) Added basic support to get the device up and running for a sysupgrade image only. There is currently no way back to factory firmware, so this is a one-way street to OpenWRT. Install from factory condition is convoluted, and may brick your device: 1) Enable SSH and disable the CLI on the factory device from the web user interface (Management->Advanced) 2) Reboot the device 3) Override the default, limited SSH shell: a) Get into the ssh shell: ssh admin@192.168.1.1 /bin/sh --login b) Change the dropbear script to disable the limited shell. At the empty command prompt type: sed -i '/login_ssh/s/^/#/g’ dropbear /etc/init.d/dropbear restart exit 4) ssh in to a (now-) normal OpenWRT SSH session 5) Flash your built image a) scp openwrt-ipq40xx-engenius_ens620ext-squashfs-sysupgrade.bin admin@192.168.1.1:/tmp/ b) ssh admin@192.168.1.1 c) sysupgrade -n /tmp/openwrt-ipq40xx-engenius_ens620ext-squashfs-sysupgrade.bin 6) After flash completes (it may say "Upgrade failed" followed by "Upgrade completed") and device reboots, log in to newly flashed system. Note you will now need to ssh as root rather than admin. Signed-off-by: Steve Glennon <s.glennon@cablelabs.com> [whitespace fixes, reordered partitions, removed rng node from 4.14, fixed 901-arm-boot-add-dts-files.patch] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: add support for AVM FRITZ!Repeater 3000David Bauer2019-03-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- CPU: Qualcomm IPQ4019 RAM: 256M (NANYA NT5CC128M16JR-EK) FLASH: 128M NAND (Macronix MX30LF1G18AC-XKI) ETH: Qualcomm QCA8072 WiFi2: IPQ4019 2T2R 2SS b/g/n WiFi5: IPQ4019 2T2R 2SS n/ac WiFi5: QCA9984 4T4R 4SS n/ac LED: - Connect green/blue/red - Power green BTN: WPS/Connect UART: 115200n8 3.3V VCC - RX - TX - GND (Square is VCC) Installation ------------ 1. Grab the uboot for the Device from the 'u-boot-fritz3000' subdirectory. Place it in the same directory as the 'eva_ramboot.py' script. It is located in the 'scripts/flashing' subdirectory of the OpenWRT tree. 2. Assign yourself the IP address 192.168.178.10/24. Connect your Computer to one of the boxes LAN ports. 3. Connect Power to the Box. As soon as the LAN port of your computer shows link, load the U-Boot to the box using following command. > ./eva_ramboot.py --offset 0x85000000 192.168.178.1 uboot-fritz3000.bin 4. The U-Boot will now start. Now assign yourself the IP address 192.168.1.70/24. Copy the OpenWRT initramfs (!) image to a TFTP server root directory and rename it to 'FRITZ3000.bin'. 5. The Box will now boot OpenWRT from RAM. This can take up to two minutes. 6. Copy the U-Boot and the OpenWRT sysupgrade (!) image to the Box using scp. SSH into the Box and first write the Bootloader to both previous kernel partitions. > mtd write /path/to/uboot-fritz3000.bin uboot0 > mtd write /path/to/uboot-fritz3000.bin uboot1 7. Remove the AVM filesystem partitions to make room for our kernel + rootfs + overlayfs. > ubirmvol /dev/ubi0 --name=avm_filesys_0 > ubirmvol /dev/ubi0 --name=avm_filesys_1 8. Flash OpenWRT peristently using sysupgrade. > sysupgrade -n /path/to/openwrt-sysupgrade.bin Signed-off-by: David Bauer <mail@david-bauer.net>
* ipq40xx: fix phy interrupt settingChristian Lamparter2019-03-131-1/+1
| | | | | | | | | | | | | This patch fixes a problem that was discovered during DSA development. On the MR33, the link change events from the external AR8035-PHY would never make it to the qca8k driver. The issue turned out to be a misplaced memcpy that was copying over the zero-initialized irq table, when it should have been set to PHY_POLL. Hence this patch moves the memcpy after the array has been initialized. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: add support for FritzBox 7530David Bauer2019-02-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- CPU: Qualcomm IPQ4019 RAM: 256M FLASH: 128M NAND ETH: QCA8075 VDSL: Intel/Lantiq VRX518 PCIe attached currently not supported DECT: Dialog SC14448 currently not supported WiFi2: IPQ4019 2T2R 2SS b/g/n WiFi5: IPQ4019 2T2R 2SS n/ac LED: - Power/DSL green - WLAN green - FON/DECT green - Connect/WPS green - Info green - Info red BTN: - WLAN - FON - WPS/Connect UART: 115200n8 3.3V (located under the Dialog chip) VCC - RX - TX - GND (Square is VCC) Installation ------------ 1. Grab the uboot for the Device from the 'u-boot-fritz7530' subdirectory. Place it in the same directory as the 'eva_ramboot.py' script. It is located in the 'scripts/flashing' subdirectory of the OpenWRT tree. 2. Assign yourself the IP address 192.168.178.10/24. Connect your Computer to one of the boxes LAN ports. 3. Connect Power to the Box. As soon as the LAN port of your computer shows link, load the U-Boot to the box using following command. > ./eva_ramboot.py --offset 0x85000000 192.168.178.1 uboot-fritz7530.bin 4. The U-Boot will now start. Now assign yourself the IP address 192.168.1.70/24. Copy the OpenWRT initramfs (!) image to a TFTP server root directory and rename it to 'FRITZ7530.bin'. 5. The Box will now boot OpenWRT from RAM. This can take up to two minutes. 6. Copy the U-Boot and the OpenWRT sysupgrade (!) image to the Box using scp. SSH into the Box and first write the Bootloader to both previous kernel partitions. > mtd write /path/to/uboot-fritz7530.bin uboot0 > mtd write /path/to/uboot-fritz7530.bin uboot1 7. Remove the AVM filesystem partitions to make room for our kernel + rootfs + overlayfs. > ubirmvol /dev/ubi0 --name=avm_filesys_0 > ubirmvol /dev/ubi0 --name=avm_filesys_1 8. Flash OpenWRT peristently using sysupgrade. > sysupgrade -n /path/to/openwrt-sysupgrade.bin Signed-off-by: David Bauer <mail@david-bauer.net> [removed pcie-dts range node, refreshed on top of AP120-AC/E2600AC] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: fix pcie msi IRQ trigger levelChristian Lamparter2019-02-281-0/+32
| | | | | | | | | | | | | | | | | | From: Niklas Cassel <niklas.cassel@linaro.org> |The databook clearly states that the MSI IRQ (msi_ctrl_int) is a level |triggered interrupt. | |The msi_ctrl_int will be high for as long as any MSI status bit is set, |thus the IRQ type should be set to IRQ_TYPE_LEVEL_HIGH, causing the |IRQ handler to keep getting called, as long as any MSI status bit is set. |[...] |Not having the correct IRQ type defined will cause us to lose interrupts, |which in turn causes timeouts in the PCIe endpoint drivers. | |Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> |Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: enlarge PCIe BAR sizeChristian Lamparter2019-02-281-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | David Bauer reported that the VDSL modem (attached via PCIe) on his AVM Fritz!Box 7530 was complaining about not having enough space in the BAR. A closer inspection of the old qcom-ipq40xx.dtsi pulled from the GL-iNet repository listed: | qcom,pcie@80000 { | compatible = "qcom,msm_pcie"; | reg = <0x80000 0x2000>, | <0x99000 0x800>, | <0x40000000 0xf1d>, | <0x40000f20 0xa8>, | <0x40100000 0x1000>, | <0x40200000 0x100000>, | <0x40300000 0xd00000>; | reg-names = "parf", "phy", "dm_core", "elbi", | "conf", "io", "bars"; Matching the reg-names with the listed reg leads to <0xd00000> as the size for the "bars". BugLink: https://www.mail-archive.com/openwrt-devel@lists.openwrt.org/msg45212.html Reported-by: David Bauer <mail@david-bauer.net> Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: add support for Qxwlan E2600AC C1 and C2张鹏2019-02-281-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qxwlan E2600AC C1 based on IPQ4019 Specifications: SOC: Qualcomm IPQ4019 DRAM: 256 MiB FLASH: 32 MiB Winbond W25Q256 ETH: Qualcomm QCA8075 WLAN: 5G + 5G/2.4G * 2T2R 2.4/5 GHz - QCA4019 hw1.0 (SoC) * 2T2R 5 GHz - QCA4019 hw1.0 (SoC) INPUT: Reset buutton LED: 1x Power ,6 driven by gpio SERIAL: UART (J5) UUSB: USB3.0 POWER: 1x DC jack for main power input (9-24 V) SLOT: Pcie (J25), sim card (J11), SD card (J51) Flash instruction (using U-Boot CLI and tftp server): - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "sysupgrade" filename to "firmware.bin" and place it in tftp server directory. - Connect PC with one of RJ45 ports, power up the board and press "enter" key to access U-Boot CLI. - Use the following command to update the device to OpenWrt: "run lfw". Flash instruction (using U-Boot web-based recovery): - Configure PC with static IP 192.168.1.xxx(2-254)/24. - Connect PC with one of RJ45 ports, press the reset button, power up the board and keep button pressed for around 6-7 seconds, until LEDs start flashing. - Open your browser and enter 192.168.1.1, select "sysupgrade" image and click the upgrade button. Qxwlan E2600AC C2 based on IPQ4019 Specifications: SOC: Qualcomm IPQ4019 DRAM: 256 MiB NOR: 16 MiB Winbond W25Q128 NAND: 128MiB Micron MT29F1G08ABAEAWP ETH: Qualcomm QCA8075 WLAN: 5G + 5G/2.4G * 2T2R 2.4/5 GHz - QCA4019 hw1.0 (SoC) * 2T2R 5 GHz - QCA4019 hw1.0 (SoC) INPUT: Reset buutton LED: 1x Power, 6 driven by gpio SERIAL: UART (J5) USB: USB3.0 POWER: 1x DC jack for main power input (9-24 V) SLOT: Pcie (J25), sim card (J11), SD card (J51) Flash instruction (using U-Boot CLI and tftp server): - Configure PC with static IP 192.168.1.10 and tftp server. - Rename "ubi" filename to "ubi-firmware.bin" and place it in tftp server directory. - Connect PC with one of RJ45 ports, power up the board and press "enter" key to access U-Boot CLI. - Use the following command to update the device to OpenWrt: "run lfw". Flash instruction (using U-Boot web-based recovery): - Configure PC with static IP 192.168.1.xxx(2-254)/24. - Connect PC with one of RJ45 ports, press the reset button, power up the board and keep button pressed for around 6-7 seconds, until LEDs start flashing. - Open your browser and enter 192.168.1.1, select "ubi" image and click the upgrade button. Signed-off-by: 张鹏 <sd20@qxwlan.com> [ added rng node. whitespace fixes, ported 02_network, ipq-wifi Makefile, misc dts fixes, trivial message changes ] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: add support for ALFA Network AP120C-ACPiotr Dymacz2019-02-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ALFA Network AP120C-AC is a dual-band ceiling AP, based on Qualcomm IPQ4018 + QCA8075 platform. Specification: - Qualcomm IPQ4018 (717 MHz) - 256 MB of RAM (DDR3) - 16 MB (SPI NOR) + 128 MB (SPI NAND) of flash - 2x Gbps Ethernet, with 802.3af PoE support in one port - 2T2R 2.4/5 GHz (IPQ4018), with ext. FEMs (QFE1952, QFE1922) - 3x U.FL connectors - 1x 1.8 dBi (Bluetooth) and 2x 3/5 dBi dual-band (Wi-Fi) antennas - Atmel/Microchip AT97SC3205T TPM module (I2C bus) - TI CC2540 Bluetooth LE module (USB 2.0 bus) - 4x LED (all driven by GPIO) - 1x button (reset) - 1x USB 2.0 (optional, not installed in indoor version) - DC jack for main power input (12 V) - UART header available on PCB (2.0 mm pitch) Flash instruction: 1. This board uses dual-image feature (128 MB NAND is divided into two 64 MB partitions: 'rootfs1' and 'rootfs2'). 2. Before update, make sure your device is running firmware no older than v1.1 (previous versions have incompatible U-Boot). 3. Use 'factory' image in vendor GUI or for sysupgrade tool, without preserving settings. Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
* ipq40xx: add support for ASUS LyraMarius Genheimer2019-02-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SoC: Qualcomm IPQ4019 (Dakota) 717 MHz, 4 cores RAM: 256 MiB (Nanya NT5CC128M16IP-DI) FLASH: 128 MiB (Macronix NAND) WiFi0: Qualcomm IPQ4019 b/g/n 2x2 WiFi1: Qualcomm IPQ4019 a/n/ac 2x2 WiFi2: Qualcomm Atheros QCA9886 a/n/ac BT: Atheros AR3012 IN: WPS Button, Reset Button OUT: RGB-LED via TI LP5523 9-channel Controller UART: Front of Device - 115200 N-8 Pinout 3.3v - RX - TX - GND (Square is VCC) Installation: 1. Transfer OpenWRT-initramfs image to the device via SSH to /tmp. Login credentials are identical to the Web UI. 2. Login to the device via SSH. 3. Flash the initramfs image using > mtd-write -d linux -i openwrt-image-file 4. Power-cycle the device and wait for OpenWRT to boot. 5. From there flash the OpenWRT-sysupgrade image. Ethernet-Ports: Although labeled identically, the port next to the power socket is the LAN port and the other one is WAN. This is the same behavior as in the stock firmware. Signed-off-by: Marius Genheimer <mail@f0wl.cc> [Dropped setup_mac 02_network in favour of 05_set_iface_mac_ipq40xx.sh, reorderd 02_network entries, added board.bin WA for the QCA9886 from ath79, minor dts touchup, added rng to 4.19 dts] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ipq40xx: add support for Linksys EA6350v3Oever González2019-01-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: SOC: Qualcomm IPQ4018 RAM: 256 MiB Samsung K4B2G1646F-BYK0 FLASH1: MX25L1605D 2 MB FLASH2: Winbond W25N01GV 128Mb ETH: Qualcomm QCA8075 WLAN0: Qualcomm Atheros QCA4018 2.4GHz 802.11b/g/n 2x2 WLAN1: Qualcomm Atheros QCA4018 5GHz 802.11n/ac W2 2x2 INPUT: WPS, Reset LED: Status - Green SERIAL: Header at J19, Beneath DC Power Jack 1-VCC ; 2-TX ; 3-RX; 4-GND; Serial 115200-8-N-1. Tested and working: - USB (requires extra packages) - LAN Ethernet (Correct MAC-address) - WAN Ethernet (Correct MAC-address) - 2.4 GHz WiFi (Correct MAC-address) - 5 GHz WiFi (Correct MAC-address) - Factory installation from Web UI - OpenWRT sysupgrade - LED - Reset Button Need Testing: - WPS button Install via Web UI: - Attach to a LAN port on the router. - Connect to the Linksys Smart WiFi Page (default 192.168.1.1) and login - Select the connectivity tab on the left - In the manual update box on the right - Select browse, and browse to openwrt-ipq40xx-linksys_ea6350v3-squashfs-factory.bin - Click update. - Read and accept the warning - The router LED will start blinking. When the router LED goes solid, you can now navigate to 192.168.1.1 to your new OpenWrt installation. Sysupgrade: - Flash the sysupgrade image as usual. Please: try to do a reset everytime you can (doing it with LuCI is easy and can be done in the same step). Recovery (Automatic): - If the device fails to boot after install or upgrade, whilst the unit is turned on: 1 - Wait 15 seconds 2 - Switch Off and Wait 10 seconds 3 - Switch on 4 - Repeat steps 1 to 3, 3 times then go to 5. 5 - U-boot will have now erased the failed update and switched back to the last working firmware - you should be able to access your router on LAN. Recovery (Manual): - The steps for manual recovery are the same as the generic u-boot tftp client method. Back To Stock: - Use the generic recovery using the tftp client method to flash the "civic.img". Also you can strip-and-pad the original image and use the generic "mtd" method by flashing over the "kernel" partition. * Just be careful to flash in the partition that the device is currently booted. Signed-off-by: Ryan Pannell <ryan@osukl.com> Signed-off-by: Oever González <notengobattery@gmail.com> [minor edits, removed second compatible of nand, added dtb entry to 4.19] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* kernel: bump 4.19 to 4.19.16Stijn Tintel2019-01-171-5/+5
| | | | | | | | | | | | | | | | | Refresh patches. Remove upstreamed patches: - backport/096-mips-math-emu-Write-protect-delay-slot-emulation-pages.patch - backport/096-v4.20-netfilter-ipv6-Preserve-link-scope-traffic-original-.patch - backport/424-v4.20-net-dsa-fix-88e6060-roaming.patch - hack/100-mtd-rawnand-qcom-fix-memory-corruption-that-causes-p.patch - pending/510-f2fs-fix-sanity_check_raw_super-on-big-endian-machines.patch Update patch that no longer applies: - backport/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch Compile-tested: mesongx Runtime-tested: mesongx Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
* ipq40xx: fix warning triggered by bad interrupt definitionChristian Lamparter2018-12-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | This patch fixes a kernel warning that got triggered by 4.19 because of a bad/missing interrupt level definition in the DTS. | WARNING: CPU: 2 PID: 1996 at drivers/irqchip/irq-gic.c:1016 | CPU: 2 PID: 1996 Comm: kmodloader Not tainted 4.19.9 #0 | Hardware name: Generic DT based system | [<c0317884>] (warn_slowpath_null) from [<c04f9cd0>] | [<c04f9cd0>] (gic_irq_domain_translate) from [<c035af30>] | [<c035af30>] (irq_create_fwspec_mapping) from [<c035b1e0>] | [<c035b1e0>] (irq_create_of_mapping) from [<c0614eec>] | [<c0614eec>] (of_irq_get) from [<c0614f3c>] | [<c0614f3c>] (of_irq_to_resource) from [<c0614ff0>] | [<c0614ff0>] (of_irq_to_resource_table) from [<c0610e08>] | [<c0610e08>] (of_device_alloc) from [<c0610ea0>] | [<c0610ea0>] (of_platform_device_create_pdata) | [<c061120c>] (of_platform_bus_create) | [<c06113c4>] (of_platform_populate) | [<bf4c06b4>] (dwc3_qcom_probe [dwc3_qcom]) Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-02 22:40:29 +0000