| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 44415
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We shouldn't read data directly into the header struct, as some devices
(e.g. Edimax) need more bytes due to some extra header.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 44414
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 44413
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Some devices have uImage headers after some extra headers (e.g. Edimax
devices). To support such cases our verify callback function should be
allowed to return header offset, not just a boolean value.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
SVN-Revision: 44412
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drivers/net/phy/adm6996.c:881:5: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'u32' [-Wformat=]
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 44333
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The board is already supported by OpenWrt. WNR1000v2/WNR1000v2-VC are
pretty much the same as WNR2000v3/WNR612v2, therefore the same
initialization code and flash layout is used.
Signed-off-by: Ștefan Rusu <saltwaterc@gmail.com>
Tested-by: Douglas Fraser <1dsfraser@gmail.com>
SVN-Revision: 44221
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Prefix the exported mii_xxx32 functions with ar8xxx_
to avoid kernel namespace pollution.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44105
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Add global read-only swconfig attribute "arl_table" to display the
address resolution table.
So far the chip-specific part is implemented for AR8327/AR8337 only
as I don't have the datasheets for the other AR8XXX chips.
Successfully tested on TL-WDR4300 (AR8327rev2)
and TL-WDR4900 (AR8327rev4).
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44104
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Until a few years ago the page switch wait time was set to msleep(1)
what was changed to usleep_range(1000, 2000) later.
I can not imagine that a low-level operation like switching page
on register level takes so much time.
Most likely the value of 1ms was initially set to check whether
it fixes an issue and then remained w/o further checking whether
also a smaller value would be sufficient.
Now the wait time is set to 5us and I successfully tested this on
AR8327. IMHO 5us should be plenty of time for all supported chips.
However I couldn't test this due to missing hardware.
If other chips should need a longer wait time we can add the
wait time as a parameter to the ar8xxx_chip struct.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44103
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Check for switch port link changes and
- flush ATU in case of a change
- report link change via syslog
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44102
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The functionality to flush the address translation table contains two bugs
which luckily compensate each other.
1. Just setting the operation is not sufficient to perform the flushing.
The "active" bit needs to be set to actually trigger an action.
For the vtu operations this is implemented correctly.
2. ar8xxx_phy_read_status is called every 2s by the phy state machine
to check for link changes. This would have caused an ATU flush
every 2s.
Fix the chip-specific ATU flush functions and remove the ATU flush call
from ar8xxx_phy_read_status.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44101
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autonegatiation too
The swconfig get_link attribute (at least) on AR8327/AR8337 doesn't
consider the autonegotiated flow control.
AR8327/AR8337 provide the info about autonegotiated rx/tx flow control
in bits 10 and 11 of the port status register.
Use these values to display info about autonegotiated rx/tx flow
control as part of the get_link attribute.
Successfully tested on TL-WDR4900 (AR8327 rev.4) and
TL-WDR4300 (AR8327 rev.2).
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44023
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AR8327/AR8337 allow to read the result of EEE autonegotiation.
If EEE is autonegotiated between the link partners, display
this as part of the swconfig get_link attribute.
eee100: 100MBit EEE supported by both link partners
eee1000: 1GBit EEE supported by both link partners
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44022
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Users reported network issues with AR8327 which turned out to be caused
by EEE not working correctly with certain link partners (ticket 14597).
The workaround was to disable EEE on all ports (changeset 41577).
The issue was with certain link partners only, therefore this patch
allows to control usage of EEE per port via swconfig.
Still the default is to initially disable EEE on all ports.
Successfully tested on a TL-WDR4900 (AR8327 rev.4)
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44021
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Introduce ar8xxx_reg_clear complementing ar8xxx_reg_set.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44004
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Replace ar8xxx_rmw with ar8xxx_reg_set where appropriate.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44003
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Define all switch_addr structs as const.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 44002
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Since the driver doesn't know anything about (M)STP
we just hard-set the ports to be enabled if they are
part of the VLAN.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43938
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- eliminate MV_CPUPORT; not necessary since we define
the CPU port(s) via Device Tree
- add STU and expand VTU operations
- update register names to match those of 88E61xx rather than
mvswitch's 88E6060
- use more consistent formatting
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43937
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Recognizes 88E6171/6172/6176 at the moment.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43936
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In preparation for properly supporting switches
beyond the 88E6171.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43935
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Move all AR8327/AR8337-specific driver code into a separate source file
ar8327.c and adjust patches so that ar8327.c is compiled if
CONFIG_AR8216_PHY is set.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43845
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Move several structure definitions and #defines from ar8216.c
to ar8216.h and move AR8327/AR8337 header stuff into a new
header file ar8327.h.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43844
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43809
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43806
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maintenance, unify patches across kernel versions
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43805
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43762
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The '6171 and '6172 are similar enough to work
without any changes to the code.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43753
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Inline function ar8xxx_create_mii.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43743
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Remove read/write/rmw member functions from ar8xxx_priv
There seems to be no real benefit of the ar8xxx_priv member functions
read/write/rmw as one implementation exists for each of them only.
Especially ar8xxx_mii_rmw is assigned to priv->rmw first and then
mapped to ar8xxx_rmw.
Rename the ar8xxx_mii_.. functions to ar8xxx_.. and use them directly.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43742
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Create helpers mii_read32 / mii_write32 for 32 bit MII ops.
Rename r3 variable to page in ar8xxx_mii_write to make it consistent
with the other ar8xxx_mii_xxxx functions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43741
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Factor out chip-specific parameters from ar8xxx_probe_switch.
Move the ar8xxx_chip definitions after the swops definitions.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43740
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Remove unused function parameter in ar8327_led_register.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43739
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Signed-off-by: Weijie Gao <hackpascal@gmail.com>
SVN-Revision: 43668
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This is a swconfig driver for the Marvell 88E6171 switch,
which is a 7-port GigE switch with two CPU ports and 64
802.1q VLANs.
Signed-off-by: Claudio Leite <leitec@staticky.com>
SVN-Revision: 43486
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Factor out reg_port_stats_base parameters to ar8xxx_chip.
Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43471
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Factor out mii_lo_first to ar8xxx_chip.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43470
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Factor out chip-specific data structures from ar8xxx_priv.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43469
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Factor out set_mirror_regs to ar8xxx_chip.
Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43468
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Factor out mib_func to ar8xxx_chip. Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43467
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to ar8xxx_chip
Factor out info whether switch should be configured at probe stage
to ar8xxx_chip. Remove related chip_is_... checks.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43466
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43410
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Patch reverts 43332 which seems to cause issues with VLAN functionality.
Add a specific check to check whether ANEG is still enabled and re-enable
it if necessary. Disable generic phy soft reset for kernel >=3.16.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43356
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We should make sure that also for ar8216 hw gets initialized.
For ar8216 hw_init is a dummy currently. The hw_init used for ar8236
should be generic enough to be usable with ar8216 too.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43334
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Move the PHY fixup call to the PHY init loop.
Use ar8xxx_has_gige in the PHY init instead of passing the gigE
capability via function parameter.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43333
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Kernel 3.14 introduced a switch reset in phy_init_hw in drivers/net/phy
causing BMCR_ANENABLE to get cleared.
Due to the fact that ar8xxx_phy_config_aneg does nothing for
PHY 0 autonegatiation support remains disabled.
This can cause ports to operate at 10MBit/half-duplex only.
Fix this by calling genphy_config_aneg for PHY 0 too as
genphy_config_aneg sets BMCR_ANENABLE if it's not yet set.
Fixes: ticket 17800
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43332
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PHY init code in the switch-specific hw_init functions is mainly
identical. Factor it out into a generic ar8xxx_phy_init function.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43331
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Move phy fixup code from the chip-specific hw_init functions into a
fixup_phys callback.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43330
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Currently there is a fixed 1000ms wait time after the switch was reset.
Most if not all switches need much less time to perform a reset.
Therefore replace the fixed wait time with polling for BMCR_RESET to
be cleared.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 43329
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All supported switches have 5 PHYs. Currently partially 5 is hardcoded
and partially switch-specific constants exist.
Replace them with a global constant.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
SVN-Revision: 43328
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