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* b53: fix memory out of bounds access on 64 bit targetsJonas Gorski2015-06-101-2/+2
| | | | | | | | | | | | | On device reset the sizes for the vlan and port tables were wrongly calculated based on the pointer size instead of the struct size. This causes buffer overruns on 64 bit targets, resulting in panics. Fix this by dereferencing the pointers. Reported-by: Fedor Konstantinov <blmink@mink.su> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45938
* b53: widen stp state mask to 3 bits (instead of 2)Jonas Gorski2015-06-101-1/+1
| | | | | | | | | | | | | | | At least on my b53 chip, the mask is 3 bits wide, and because of this some STP states are not set properly and discarded when read. Maybe for some other chips it makes sense to have just 2 bits width, but I don't have other versions around to test/validate. If that's the case then maybe we could add another STP state mask. Signed-off-by: Alexandru Ardelean <ardeleanalex@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45937
* b53: Allow using all ports on BCM53012Rafał Miłecki2015-05-121-1/+1
| | | | | | | | | | | | | This chipset has at least 8 usable ports, e.g. Netgear R8000 has ports 5, 7 and 8 connected to Ethernet interfaces: vlan1ports=0 1 2 3 5 7 8* vlan2ports=4 8u Port 6 seems to be always disabled. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45676
* b53: improve overriding CPU port state on BCM5301XRafał Miłecki2015-04-122-2/+30
| | | | | | | | | | | | | | | | | On BCM5301X there are two different cases to handle: CPU port 8 vs. any other one. Support for CPU port 8 was already partially implemented but it lacked setting some extra bit for 2G speed. It also will need to be extended to implement "SMP dual core 3 GMAC setup". That's the reason for handling it in separated code block. This patch also adds overriding CPU port state for port other than 8. It requires using recently defined GMII_PORT registers. It was tested for regressions on BCM53011 revs 2 & 3. It was also confirmed to fix switch on some internal Broadcom board. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45402
* b53: clean up code to match kernel style betterJonas Gorski2015-04-106-20/+23
| | | | | | | | | | | | | * properly enclose macro arguments in paranthesis on use * remove trailing white space * convert C99 // comments * add missing blank lines after declaration * remove braces from single statement blocks * split lines > 80 chars (except for one) Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 45356
* b53: define registers available and needed on BCM5301XJonas Gorski2015-04-101-0/+33
| | | | | | | | They are also present on some BCM63xx switches. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 45355
* b53: reverse duplex bit meaning for IMP state override registerJonas Gorski2015-03-181-1/+1
| | | | | | | Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 44875
* b53: global config is part of the management page, not the control pageJonas Gorski2015-03-151-2/+2
| | | | | | | | | | It will now actually enable the mib counters instead of enabling rx/tx for the first switch port. Reported-by: Daniel Gonzalez <dgcbueu@gmail.com> Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 44788
* swconfig: fix build with linux 4.0John Crispin2015-03-061-3/+6
| | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> SVN-Revision: 44617
* b53: fix mmap register read/writes > 32 bitJonas Gorski2015-02-271-34/+36
| | | | | | | | | | | | | | | | | | | | | | | For bcm63xx integrated switches, broadcom changed the data endianess to match the system endianess. But this only applies to within one word, which causes 48/64 bit values to be still split into their "litte endian" groups. E.g. 48 bit values (with 5 being the most significant byte) aligned 0x00 ..01 or 0123 0x04 2345 45.. will become 0x00 ..10 resp. 3210 0x04 5432 54.. Likewise for 64 bit values. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 44568
* kernel: fix compile error inside adm6996.cJohn Crispin2015-02-091-1/+1
| | | | | | | | drivers/net/phy/adm6996.c:881:5: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'u32' [-Wformat=] Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44333
* ar8216: prefix mii_xxx functions to avoid kernel namespace pollutionFelix Fietkau2015-01-243-18/+18
| | | | | | | | | Prefix the exported mii_xxx32 functions with ar8xxx_ to avoid kernel namespace pollution. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44105
* ar8216: add swconfig attribute to display ARL table on AR8327/AR8337Felix Fietkau2015-01-244-15/+220
| | | | | | | | | | | | | | Add global read-only swconfig attribute "arl_table" to display the address resolution table. So far the chip-specific part is implemented for AR8327/AR8337 only as I don't have the datasheets for the other AR8XXX chips. Successfully tested on TL-WDR4300 (AR8327rev2) and TL-WDR4900 (AR8327rev4). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44104
* ar8216: decrease page switch wait timeFelix Fietkau2015-01-242-3/+9
| | | | | | | | | | | | | | | | | | | | | | Until a few years ago the page switch wait time was set to msleep(1) what was changed to usleep_range(1000, 2000) later. I can not imagine that a low-level operation like switching page on register level takes so much time. Most likely the value of 1ms was initially set to check whether it fixes an issue and then remained w/o further checking whether also a smaller value would be sufficient. Now the wait time is set to 5us and I successfully tested this on AR8327. IMHO 5us should be plenty of time for all supported chips. However I couldn't test this due to missing hardware. If other chips should need a longer wait time we can add the wait time as a parameter to the ar8xxx_chip struct. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44103
* ar8216: add link change detection for switch portsFelix Fietkau2015-01-242-0/+36
| | | | | | | | | | Check for switch port link changes and - flush ATU in case of a change - report link change via syslog Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44102
* ar8216: fix ATU flushingFelix Fietkau2015-01-242-9/+5
| | | | | | | | | | | | | | | | | | The functionality to flush the address translation table contains two bugs which luckily compensate each other. 1. Just setting the operation is not sufficient to perform the flushing. The "active" bit needs to be set to actually trigger an action. For the vtu operations this is implemented correctly. 2. ar8xxx_phy_read_status is called every 2s by the phy state machine to check for link changes. This would have caused an ATU flush every 2s. Fix the chip-specific ATU flush functions and remove the ATU flush call from ar8xxx_phy_read_status. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44101
* ar8216: display flow control info in swconfig get_link in case of ↵Felix Fietkau2015-01-182-1/+19
| | | | | | | | | | | | | | | | | | autonegatiation too The swconfig get_link attribute (at least) on AR8327/AR8337 doesn't consider the autonegotiated flow control. AR8327/AR8337 provide the info about autonegotiated rx/tx flow control in bits 10 and 11 of the port status register. Use these values to display info about autonegotiated rx/tx flow control as part of the get_link attribute. Successfully tested on TL-WDR4900 (AR8327 rev.4) and TL-WDR4300 (AR8327 rev.2). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44023
* ar8216: add 802.3az EEE info to swconfig get_link attributeFelix Fietkau2015-01-184-1/+47
| | | | | | | | | | | | | AR8327/AR8337 allow to read the result of EEE autonegotiation. If EEE is autonegotiated between the link partners, display this as part of the swconfig get_link attribute. eee100: 100MBit EEE supported by both link partners eee1000: 1GBit EEE supported by both link partners Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44022
* ar8216: introduce enable_eee swconfig attribute to control 802.3az EEE per portFelix Fietkau2015-01-184-17/+122
| | | | | | | | | | | | | | | | Users reported network issues with AR8327 which turned out to be caused by EEE not working correctly with certain link partners (ticket 14597). The workaround was to disable EEE on all ports (changeset 41577). The issue was with certain link partners only, therefore this patch allows to control usage of EEE per port via swconfig. Still the default is to initially disable EEE on all ports. Successfully tested on a TL-WDR4900 (AR8327 rev.4) Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44021
* ar8216: introduce ar8xxx_reg_clear complementing ar8xxx_reg_setJohn Crispin2015-01-173-12/+14
| | | | | | | | Introduce ar8xxx_reg_clear complementing ar8xxx_reg_set. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44004
* ar8216: replace ar8xxx_rmw with ar8xxx_reg_set where appropriateJohn Crispin2015-01-172-12/+7
| | | | | | | | Replace ar8xxx_rmw with ar8xxx_reg_set where appropriate. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44003
* ar8216: define all switch_addr structs as constJohn Crispin2015-01-172-6/+6
| | | | | | | | Define all switch_addr structs as const. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44002
* mvsw61xx: track and set per-VLAN port state in STULuka Perkov2015-01-112-7/+32
| | | | | | | | | | Since the driver doesn't know anything about (M)STP we just hard-set the ports to be enabled if they are part of the VLAN. Signed-off-by: Claudio Leite <leitec@staticky.com> SVN-Revision: 43938
* mvsw61xx: clean up and expand register definitionsLuka Perkov2015-01-112-29/+50
| | | | | | | | | | | | | | | | - eliminate MV_CPUPORT; not necessary since we define the CPU port(s) via Device Tree - add STU and expand VTU operations - update register names to match those of 88E61xx rather than mvswitch's 88E6060 - use more consistent formatting Signed-off-by: Claudio Leite <leitec@staticky.com> SVN-Revision: 43937
* mvsw61xx: rework chip recognitionLuka Perkov2015-01-112-10/+31
| | | | | | | | Recognizes 88E6171/6172/6176 at the moment. Signed-off-by: Claudio Leite <leitec@staticky.com> SVN-Revision: 43936
* mvsw6171: rename to 'mvsw61xx'Luka Perkov2015-01-112-129/+129
| | | | | | | | | In preparation for properly supporting switches beyond the 88E6171. Signed-off-by: Claudio Leite <leitec@staticky.com> SVN-Revision: 43935
* ar8216: factor out AR8327/AR8337-specific driver code into ar8327.cFelix Fietkau2015-01-053-1030/+1134
| | | | | | | | | | Move all AR8327/AR8337-specific driver code into a separate source file ar8327.c and adjust patches so that ar8327.c is compiled if CONFIG_AR8216_PHY is set. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43845
* ar8216: move definitions from ar8216.c to ar8216.h and introduce ar8327.hFelix Fietkau2015-01-053-345/+365
| | | | | | | | | | Move several structure definitions and #defines from ar8216.c to ar8216.h and move AR8327/AR8337 header stuff into a new header file ar8327.h. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43844
* kernel: remove openwrt micrel.c (replaced by upstream driver)Felix Fietkau2014-12-221-83/+0
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 43762
* mvsw6171: note support for 88E6172 switchesLuka Perkov2014-12-191-1/+1
| | | | | | | | | The '6171 and '6172 are similar enough to work without any changes to the code. Signed-off-by: Claudio Leite <leitec@staticky.com> SVN-Revision: 43753
* ar8216: Inline function ar8xxx_create_miiFelix Fietkau2014-12-181-13/+3
| | | | | | | | Inline function ar8xxx_create_mii. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43743
* ar8216: Remove read/write/rmw member functions from ar8xxx_privFelix Fietkau2014-12-181-65/+51
| | | | | | | | | | | | | | Remove read/write/rmw member functions from ar8xxx_priv There seems to be no real benefit of the ar8xxx_priv member functions read/write/rmw as one implementation exists for each of them only. Especially ar8xxx_mii_rmw is assigned to priv->rmw first and then mapped to ar8xxx_rmw. Rename the ar8xxx_mii_.. functions to ar8xxx_.. and use them directly. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43742
* ar8216: Create helpers mii_read32 / mii_write32 for 32 bit MII opsFelix Fietkau2014-12-181-34/+40
| | | | | | | | | | Create helpers mii_read32 / mii_write32 for 32 bit MII ops. Rename r3 variable to page in ar8xxx_mii_write to make it consistent with the other ar8xxx_mii_xxxx functions. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43741
* ar8216: Factor out chip-specific parameters from ar8xxx_probe_switchFelix Fietkau2014-12-181-117/+151
| | | | | | | | | Factor out chip-specific parameters from ar8xxx_probe_switch. Move the ar8xxx_chip definitions after the swops definitions. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43740
* ar8216: remove unused function parameter in ar8327_led_registerFelix Fietkau2014-12-181-2/+2
| | | | | | | | Remove unused function parameter in ar8327_led_register. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43739
* ar8216: enable cpu port to receive arp and broadcast frames for ar8236Felix Fietkau2014-12-122-0/+12
| | | | | | Signed-off-by: Weijie Gao <hackpascal@gmail.com> SVN-Revision: 43668
* kernel: add driver for Marvell 88E6171 switchJohn Crispin2014-12-012-0/+1096
| | | | | | | | | | This is a swconfig driver for the Marvell 88E6171 switch, which is a 7-port GigE switch with two CPU ports and 64 802.1q VLANs. Signed-off-by: Claudio Leite <leitec@staticky.com> SVN-Revision: 43486
* ar8216: factor out reg_port_stats_base parameters to ar8xxx_chipJohn Crispin2014-12-012-13/+20
| | | | | | | | | Factor out reg_port_stats_base parameters to ar8xxx_chip. Remove related chip_is_... checks. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43471
* ar8216: factor out mii_lo_first to ar8xxx_chipJohn Crispin2014-12-011-5/+5
| | | | | | | | Factor out mii_lo_first to ar8xxx_chip. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43470
* ar8216: factor out chip-specific data structures from ar8xxx_privJohn Crispin2014-12-011-15/+16
| | | | | | | | Factor out chip-specific data structures from ar8xxx_priv. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43469
* ar8216: factor out set_mirror_regs to ar8xxx_chipJohn Crispin2014-12-011-15/+13
| | | | | | | | | Factor out set_mirror_regs to ar8xxx_chip. Remove related chip_is_... checks. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43468
* ar8216: factor out mib_func to ar8xxx_chipJohn Crispin2014-12-011-6/+6
| | | | | | | | Factor out mib_func to ar8xxx_chip. Remove related chip_is_... checks. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43467
* ar8216: factor out info whether switch should be configured at probe stage ↵John Crispin2014-12-011-2/+4
| | | | | | | | | | | to ar8xxx_chip Factor out info whether switch should be configured at probe stage to ar8xxx_chip. Remove related chip_is_... checks. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43466
* ar8216: suppress PHY reset for linux 3.14Felix Fietkau2014-11-271-2/+2
| | | | | | Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 43410
* ar8216: Fix issue with autoneg being disabled under 3.14, revert 43332Felix Fietkau2014-11-241-2/+47
| | | | | | | | | | Patch reverts 43332 which seems to cause issues with VLAN functionality. Add a specific check to check whether ANEG is still enabled and re-enable it if necessary. Disable generic phy soft reset for kernel >=3.16. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43356
* ar8216: Use generic hw_init from ar8236 for ar8216 tooFelix Fietkau2014-11-201-13/+7
| | | | | | | | | | We should make sure that also for ar8216 hw gets initialized. For ar8216 hw_init is a dummy currently. The hw_init used for ar8236 should be generic enough to be usable with ar8216 too. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43334
* ar8216: simplify PHY fixup/initFelix Fietkau2014-11-201-19/+10
| | | | | | | | | | Move the PHY fixup call to the PHY init loop. Use ar8xxx_has_gige in the PHY init instead of passing the gigE capability via function parameter. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43333
* ar8216: use genphy_config_aneg also for PHY 0Felix Fietkau2014-11-191-10/+1
| | | | | | | | | | | | | | | | | Kernel 3.14 introduced a switch reset in phy_init_hw in drivers/net/phy causing BMCR_ANENABLE to get cleared. Due to the fact that ar8xxx_phy_config_aneg does nothing for PHY 0 autonegatiation support remains disabled. This can cause ports to operate at 10MBit/half-duplex only. Fix this by calling genphy_config_aneg for PHY 0 too as genphy_config_aneg sets BMCR_ANENABLE if it's not yet set. Fixes: ticket 17800 Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43332
* ar8216: factor out PHY init code into a generic functionFelix Fietkau2014-11-191-41/+25
| | | | | | | | | | PHY init code in the switch-specific hw_init functions is mainly identical. Factor it out into a generic ar8xxx_phy_init function. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 43331
* ar8216: introduce fixup_phys callback in ar8xxx_chipFelix Fietkau2014-11-191-2/+13
| | | | | | | | | Move phy fixup code from the chip-specific hw_init functions into a fixup_phys callback. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 43330
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