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* generic: ar8216: fix unknown packet flooding for ar8229/ar8236Chuanhong Guo2020-05-061-5/+14
| | | | | | | | | | | | | ar8229 and ar8236 don't allow unknown unicast/multicast frames and broadcast frames to be flooded to cpu port. This isn't desired behavior for swconfig as we treat it as a standalone switch. Current code doesn't enable unicast frame flooding for ar8229 and uses wrong setup for ar8236. This commit fixes both of them by enabling port 0 flooding for all unknown frames. Fixes: FS#2848 Signed-off-by: Chuanhong Guo <gch981213@gmail.com> (cherry picked from commit 47f17b066259589b4a7b4181522321abf0660e18)
* generic ar8xxx: increase VLAN table for AR83x7David Bauer2019-11-301-5/+5
| | | | | | | | | | | | | The Atheros AR8327 and AR8337 have (according to their datasheet) a VLAN table with a maximum of 4096 entries. Currently, there's a hard limit of 128 VLANs, which is the same as for most other Atheros switches. Increase this limit only for the AR83x7 series and modify some shared functions to allow them to work with a variable max VLAN count. Signed-off-by: David Bauer <mail@david-bauer.net> (cherry picked from commit 3f79aaa2979793c054eae2c8b4058c8c7fccdbe7)
* generic: ar8216: group MIB counters and use two basic ones only by defaultChuanhong Guo2019-05-201-81/+127
| | | | | | | | | | | | | | | | | There are too many MIB counters that almost nobody needs since commit d6366ce3665f ("generic: ar8216: mib_work_func: read all port mibs everytime"). In the worker function to poll MIB data, it deals with all ports instead of only one port every time, which introduces too many mdio operations that it becomes a heavy CPU load even on not-emulated MDIO bus. This commit groups MIB counters and enable only TxBytes and RxGoodBytes by default (both of which are necessary to get swconfig led working.) and adds an swconfig attribute to allow enabling all counters if users need them. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: add mib_poll_interval switch attributeChuanhong Guo2019-05-201-8/+48
| | | | | | | | | | | | | | This allows specifying interval of polling MIB counters from userspace and allow completely turning off MIB counter support by setting mib_poll_interval to 0. Since MIB counter polling is a heavy CPU load for GPIO emulated MDIO bus, disable this behavior by default. Those who wants to use swconfig LEDs can enable them with qca,mib-poll-interval dts property or with swconfig command. Fixes: FS#2230 ("kworker spikes 100% cpu every 2 second.") Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: introduce qca,mib-poll-interval propertyChuanhong Guo2019-03-241-2/+12
| | | | | | | | This allows users to specify a shorter mib poll interval so that the swconfig leds could behave normal with current get_port_stats() implementation. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: do a software reset for switch during hw_initChuanhong Guo2019-03-241-0/+3
| | | | | | | | | | | | | | This applies to ar8216 and ar8236. QCA's newer U-boot will enable the switch mdio master for FE switches which makes phy inaccessible from CPU mdio. (e.g. on TP-Link TL-WR941N v7 Chinese version which uses QCA9558+AR8236.) For these devices PHY probing is broken and mdio device probing is a must. We also need to disable switch mdio master in driver for later PHY initialization. Do a soft reset during hw_init so that mdio master can be disabled and expose PHYs to CPU mdio for later PHY accessing. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: mib_work_func: read all port mibs everytimeChuanhong Guo2019-03-241-8/+5
| | | | | | | | ar8xxx_mib_capture will update mib counters for all ports. Current code only update one port at a time and the data for other ports are lost. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: add support for get_port_stats()Chuanhong Guo2019-03-241-14/+42
| | | | | | | | | | | | | | | | | | | | | | | Partially reverts commit eff3549c5883a9abc5dbff00c084cabbcfdf4437. AR7240 and AR9341 have buggy hardware switch LED trigger. The AR7240 one doesn't blink and the blinking of port0/port5 is reversed on AR9341 if we swap PHY0 and PHY4. (Only blinking is reversed, which means LED for PHY0 will lit when PHY0 is link up and will blink when PHY4 has active link and vice versa.) On these two chips a software swconfig LED trigger is required. This commit adds swconfig port stats back but: 1. move checking of mib_t/rxb_id into ar8xxx_chip since we can't distinguish ar7240sw and ar8216 using only chip id. 2. don't update mib counter in get_port_stat. This function is called every 0.01s and this capturing procedure will take up a lot of CPU. We already have a mib_work_func updating mib counters every 2s so return the saved counter instead of fetching new data. The blinking rate will be weird but it should solve the previously mentioned CPU time problem. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: add support for ar724x/ar933x builtin switchChuanhong Guo2019-03-241-6/+109
| | | | | | | | | | | | | | This builtin switch is a bugless ar8216 with different mib counters and gigabit cpu port. Atheros uses the same device ID and it's impossible to distinguish the standalone one and the builtin one. So we add support to mdio device probe only. This switch doesn't have buggy vlan tag so it's not needed to enable atheros header. This commit changed ar8216_setup_port so that it can be reused for this switch. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: mdiodev: add qca,phy4-mii-enable optionChuanhong Guo2019-03-241-0/+6
| | | | | | This option allows setting phy4 as a phy connected directly to CPU. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: ar8229: add phy_read/phy_writeChuanhong Guo2019-03-241-0/+48
| | | | | | | the added function also works for ar8216 and will be used in the following ar7240 support. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: add support for separated mdio bus for phy accessChuanhong Guo2019-03-241-1/+34
| | | | | | | | | | | | | | Atheros FE switches have a builtin mdio master available for PHY accessing and on ar724x/ar933x builtin switches this mdio master is the only way of accessing PHYs. After this patch if there is phy_read/phy_write method available in ar8xxx_chip we register a separated mdio bus for accessing PHYs. Still adds support for mdio device probing only since this isn't needed for those switches registered using PHY probing. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: add support for ar8229Chuanhong Guo2019-03-241-5/+125
| | | | | | | | | | | | | | | | ar8229 is the builtin switch in ar934x and later chips. There is also a standalone version available and their registers/functions are the same. This commit added support for the builtin ar8229. The only thing missing for standalone ar8229 should be phy modes. Since I don't have a router using that, this commit doesn't add support for other phy modes. Only add its support for mdio-device probing method because the current PHY probing can't return 1G speed when it's a FE switch. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: add mdio-device probing supportChuanhong Guo2019-03-241-1/+134
| | | | | | | currently only ar8327 and ar8236 are added since they are the only two I could verify. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: move ar8xxx_id_chip into ar8xxx_phy_probeChuanhong Guo2019-03-241-4/+4
| | | | | | | | ar8xxx_id_chip is used to determine current ar8xxx_chip using switch id and this isn't needed during mdiodev probing. Move it out of ar8xxx_probe_switch so that we can skip it. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: add device struct into struct ar8xxx_privChuanhong Guo2019-03-241-0/+2
| | | | | | dev has been taken up by switch_dev so it's named pdev instead. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: drop duplicated includeChuanhong Guo2019-03-241-1/+0
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* generic: ar8216: move chip id reading into a separate functionChuanhong Guo2019-03-241-1/+12
| | | | | | | | | for mdio-device probing we still need to read chip id but ar8xxx_chip can be determined using drvdata. We can't distinguish the buggy standalone ar8216 and the builtin ar8216 in ar724x/ar933x using chip id. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* kernel: ar83xx: Add support for three GMAC's connectionRam Chandra Jangir2018-12-061-1/+14
| | | | | | | | | | | | | We have IPQ8064 AP161 board which has three GMAC's * RGMII x2 * SGMII x1. The existing ar8327 driver does not have support for three GMAC's connection, hence this change adds support for the same. This has been verified on AP148 and AP161 board. Signed-off-by: xiaofeis <xiaofeis@codeaurora.org> Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
* kernel: ar8xxx: get_arl_table now shows all ports of an entryGünther Kelleter2018-11-261-10/+8
| | | | | | | Multicast ARL entries can have multiple destination ports. Get and dump all destination ports of each entry, not just the lowest. Signed-off-by: Günther Kelleter <guenther.kelleter@devolo.de>
* ar8216: add adjust_link checkingPawel Dembicki2018-11-261-1/+2
| | | | | | | | | Driver crash when 'phydev->adjust_link' isn't provided. This patch check if 'phydev->adjust_link' exist before call the method. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
* ar8216: reduce latency by inserting scheduling points into code hogging the CPUFelix Fietkau2018-04-081-2/+7
| | | | | | Should reduce network related latency caused by accessing MIB counters Signed-off-by: Felix Fietkau <nbd@nbd.name>
* generic: drop support for get_port_stats() on ar8xxxThibaut VARENE2017-09-131-56/+9
| | | | | | | | | | | | | | | | The implementation is not efficient on ar8xxx switches. It triggers high CPU load and degrades device performance. The high CPU load has been traced down to the ar8xxx_reg_wait() call in ar8xxx_mib_op(), which has to usleep_range() till the MIB busy flag set by the request to update the MIB counter is cleared. This commit removes the get_port_stats() code introduced in 4d8a66d and leaves a note for future hacker's beware. Fixes: FS#1004 Signed-off-by: Thibaut VARENE <hacks@slashdirt.org>
* generic: provide get_port_stats() on ar8xxx switchesThibaut VARENE2017-09-011-0/+57
| | | | | | | | | | | | | This patch provides a generic switch_dev_ops 'get_port_stats()' callback by taping into the relevant port MIB counters. The implementation uses a generic callback that select the correct MIB counter index based on chip version. This callback is used by swconfig_leds led trigger to blink LEDs with port network traffic. Signed-off-by: Thibaut VARENE <hacks@slashdirt.org>
* ar8216: flush ARL table during reset after init_globalsGünther Kelleter2017-02-161-0/+1
| | | | | | | | | | commit 33b72b8e0faf7a39faabece584fd6da61cd8f8df "ar8216: adjust ATU flushing in case of link changes" introduced portwise flushing on link down events. Now the ARL table could be in a chaotic state after boot where ar8xxx_sw_get_arl_table looped forever (depending on the entries collected while booting). Signed-off-by: Günther Kelleter <guenther.kelleter@devolo.de>
* kernel: update phy drivers for 4.9Felix Fietkau2017-02-031-43/+27
| | | | | | add backport patches for older kernels Signed-off-by: Felix Fietkau <nbd@nbd.name>
* generic: ar8216: fix invalid bounds check imported from ChromeOS (FS#347)Jo-Philipp Wich2016-12-231-1/+1
| | | | | | | | The priv->vlan_id member is of size AR8X16_MAX_VLANS, not AR8X16_MAX_PORTS, so check for the proper maximum value in order to avoid capping valid VLAN IDs to 7 (AR8X16_MAX_PORTS - 1). Signed-off-by: Jo-Philipp Wich <jo@mein.io>
* net: ar8216: address security vulnerabilities in swconfig & ar8216Pavel Kubelun2016-12-011-4/+17
| | | | | | | | | | | | | | | | | | | | | | | Imported from https://chromium.googlesource.com/chromiumos/third_party/kernel/+/e1aaf7ec008a97311867f0a7d0418e4693fecfd4%5E%21/#F0 Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> CHROMIUM: net: ar8216: address security vulnerabilities in swconfig & ar8216 This patch does the following changes: *address the security vulnerabilities in both swconfig framework and in ar8216 driver (many bound check additions, and turned swconfig structure signed element into unsigned when applicable) *address a couple of whitespaces and indendation issues BUG=chrome-os-partner:33096 TEST=none Change-Id: I94ea78fcce8c1932cc584d1508c6e3b5dfb93ce9 Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Reviewed-on: https://chromium-review.googlesource.com/236490 Reviewed-by: Toshi Kikuchi <toshik@chromium.org> Commit-Queue: Toshi Kikuchi <toshik@chromium.org> Tested-by: Toshi Kikuchi <toshik@chromium.org>
* net: ar8216: prevent device duplication in ar8xxx_dev_listPavel Kubelun2016-12-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | Import from https://chromium.googlesource.com/chromiumos/third_party/kernel/+/fd7b89dd464a4afffa04ff2e17c771dfe95668cf%5E%21/#F0 Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> CHROMIUM: drivers: ar8216: prevent device duplication in ar8xxx_dev_list If probe is called twice, once for PHY0 and a second time for PHY4, the same switch device will be added twice to ar8xxx_dev_list, while supposedly this list should have one element per hardware switch present in the system. While no negative impact have been observed, it does happen if a platform instanciates these two PHYs from device-tree, as an example. Change-Id: Iddcbdf7d4adacb0af01975b73f8e56b4582e894e Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Reviewed-on: https://chromium-review.googlesource.com/234790 Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Toshi Kikuchi <toshik@chromium.org> Tested-by: Toshi Kikuchi <toshik@chromium.org>
* net: ar8216: hold ar8xxx_dev_list_lock during use_count--Pavel Kubelun2016-12-011-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | Import from https://chromium.googlesource.com/chromiumos/third_party/kernel/+/c3fd96a7b87da23979d8569ce45447f8419ca303%5E%21/#F0 Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> CHROMIUM: drivers: ar8216: hold ar8xxx_dev_list_lock during use_count-- It is possible for the remove() callback to run twice in parallel, which could result into --use_count returning only 1 in both cases and the rest of the unregistration path to never be reached. This case has never been observed in practice, but we will fix preventively to make the code more robust. BUG=chrome-os-partner:33096 TEST=none Change-Id: If09abe27fdb2037f514f8674418bafaab3cbdef6 Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Reviewed-on: https://chromium-review.googlesource.com/232870 Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Toshi Kikuchi <toshik@chromium.org> Tested-by: Toshi Kikuchi <toshik@chromium.org>
* net: ar8216: sync mib_work cancellationPavel Kubelun2016-12-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | Import from https://chromium.googlesource.com/chromiumos/third_party/kernel/+/c05af20272059e149e2da2e1fa1fbd90c03ec979 Signed-off-by: Pavel Kubelun <be.dissent@gmail.com> CHROMIUM: drivers: ar8216: sync mib_work cancellation ar8xxx_mib_stop() is called from ar8xxx_phy_remove(), so we want to make sure the work doesn't run after priv is freed / the device ceases to exist. BUG=chrome-os-partner:33096 TEST=none Change-Id: Iafb44ce93a87433adc4576e5fea5fda58d1f43a9 Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Reviewed-on: https://chromium-review.googlesource.com/232827 Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Toshi Kikuchi <toshik@chromium.org> Reviewed-by: Grant Grundler <grundler@chromium.org> Tested-by: Toshi Kikuchi <toshik@chromium.org>
* generic: ar8216: improve ar8xxx_is_possible checkChristian Lamparter2016-10-151-6/+6
| | | | | | | | | | | | | | | | | The commit "generic: ar8216: add sanity check to ar8216_probe" (774da6c7a40320a320b28d71291c0e61fcf7bc8a) stated that PHY IDs should be checked at address 0-4. However, the PHY 4 was never check by the loop. This patch extends the check to be similar to the Atheors SDK. It tries all 4 ports and skips unconnected PHYs if necessary. If it cannot find any familiar PHYs, it will prevent the phy driver from initializing. This patch is necessary for the C-60. It doesn't have a PHY at port 3, so this caused the check in ar8xxx_is_possible to fail. As a result, the ethernet ports on the C-60 didn't work. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* treewide: replace nbd@openwrt.org with nbd@nbd.nameFelix Fietkau2016-06-071-1/+1
| | | | Signed-off-by: Felix Fietkau <nbd@nbd.name>
* AR8216: improve mmd register accessJohn Crispin2016-03-041-4/+12
| | | | | | | | | | | Combine all bus operations for one MMD access in one function. Protecting all these bus operations with one lock also helps to avoid potential issues due to bus operations intercepting the register and data write. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 48914
* AR8216: make ARL age time configurableJohn Crispin2016-03-041-4/+55
| | | | | | | | | | | | | | | | | The default TTL for address resolution table entries is 5 minutes for all members of the AR8216 family. This can cause issues if e.g. Wifi clients roam to another AP and their MAC appears on another switch port suddenly. Then the client may not be reachable until the old ARL entry expires. I would have expected the switch to invalidate old entries if it detects the same MAC on another port. But that's not the case. Therefore make the TTL for ARL entries configurable. The effective TTL will always be a multiple of 7 seconds. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 48913
* AR8216: remove redundant port number in MIB header lineJohn Crispin2016-03-041-2/+1
| | | | | | | | | The line before includes the port number anyway so there's no need to duplicate the port number in the MIB info header. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 48912
* AR8216: complement MIB counters with info in GiB / MiB / KiBJohn Crispin2016-03-041-5/+40
| | | | | | | | | | The decimal values especially for TxByte and RxGoodByte are hard to read once bigger amounts of data have been transferred. Therefore complement the decimal values with info in GiB / MiB / KiB. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 48911
* AR8216: don't display MIB counters if all are emptyJohn Crispin2016-03-041-1/+8
| | | | | | | | | | | | For unused switch ports all MIB values are zero. Displaying ~40 empty MIB counters is just confusing and makes it hard to read the output of swconfig dev <dev> show. Therefore, if all MIB counters for a port are zero, just display an info that the MIB counters are empty. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 48910
* ar8216: add swconfig attributes for ARL table flushingFelix Fietkau2015-07-151-1/+47
| | | | | | | | Add swconfig attributes for flushing the ARL table globally or per port. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 46382
* ar8216: adjust ATU flushing in case of link changesFelix Fietkau2015-07-151-6/+4
| | | | | | | | | | If a link goes down, don't flush the complete ARL table. Only flush the entries for the respective port. Don't touch ARL table if a link goes up. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 46381
* ar8216: add ARL table flushing per portFelix Fietkau2015-07-151-0/+19
| | | | | | | | | | | | | Adds functions for flushing ARL table entries per port. Successfully tested on AR8327. Implementation for AR8216/AR8236/AR8316 is based on the AR8236 datasheet and assumes that the three chips share a common ATU register layout. Compile-tested only for AR8216/AR8236/AR8316. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 46380
* ar8216: add reading ARL table for AR8216/AR8236/AR8316Felix Fietkau2015-07-151-4/+77
| | | | | | | | | | | | | | | | Adds the chip-specific part of reading ARL table for AR8216/AR8236/AR8316. It's based on the AR8236 datasheet and compile-tested only as I couldn't find datasheets for AR8216/AR8316 and don't own devices with these chips. The existing ar8216_atu_flush implementation was used for all three chip types, therefore I guess they share a common ATU register layout. More testing would be appreciated. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 46379
* ar8216: prefix mii_xxx functions to avoid kernel namespace pollutionFelix Fietkau2015-01-241-6/+6
| | | | | | | | | Prefix the exported mii_xxx32 functions with ar8xxx_ to avoid kernel namespace pollution. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44105
* ar8216: add swconfig attribute to display ARL table on AR8327/AR8337Felix Fietkau2015-01-241-15/+81
| | | | | | | | | | | | | | Add global read-only swconfig attribute "arl_table" to display the address resolution table. So far the chip-specific part is implemented for AR8327/AR8337 only as I don't have the datasheets for the other AR8XXX chips. Successfully tested on TL-WDR4300 (AR8327rev2) and TL-WDR4900 (AR8327rev4). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44104
* ar8216: decrease page switch wait timeFelix Fietkau2015-01-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | Until a few years ago the page switch wait time was set to msleep(1) what was changed to usleep_range(1000, 2000) later. I can not imagine that a low-level operation like switching page on register level takes so much time. Most likely the value of 1ms was initially set to check whether it fixes an issue and then remained w/o further checking whether also a smaller value would be sufficient. Now the wait time is set to 5us and I successfully tested this on AR8327. IMHO 5us should be plenty of time for all supported chips. However I couldn't test this due to missing hardware. If other chips should need a longer wait time we can add the wait time as a parameter to the ar8xxx_chip struct. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44103
* ar8216: add link change detection for switch portsFelix Fietkau2015-01-241-0/+35
| | | | | | | | | | Check for switch port link changes and - flush ATU in case of a change - report link change via syslog Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44102
* ar8216: fix ATU flushingFelix Fietkau2015-01-241-8/+3
| | | | | | | | | | | | | | | | | | The functionality to flush the address translation table contains two bugs which luckily compensate each other. 1. Just setting the operation is not sufficient to perform the flushing. The "active" bit needs to be set to actually trigger an action. For the vtu operations this is implemented correctly. 2. ar8xxx_phy_read_status is called every 2s by the phy state machine to check for link changes. This would have caused an ATU flush every 2s. Fix the chip-specific ATU flush functions and remove the ATU flush call from ar8xxx_phy_read_status. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44101
* ar8216: add 802.3az EEE info to swconfig get_link attributeFelix Fietkau2015-01-181-0/+17
| | | | | | | | | | | | | AR8327/AR8337 allow to read the result of EEE autonegotiation. If EEE is autonegotiated between the link partners, display this as part of the swconfig get_link attribute. eee100: 100MBit EEE supported by both link partners eee1000: 1GBit EEE supported by both link partners Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44022
* ar8216: introduce enable_eee swconfig attribute to control 802.3az EEE per portFelix Fietkau2015-01-181-5/+9
| | | | | | | | | | | | | | | | Users reported network issues with AR8327 which turned out to be caused by EEE not working correctly with certain link partners (ticket 14597). The workaround was to disable EEE on all ports (changeset 41577). The issue was with certain link partners only, therefore this patch allows to control usage of EEE per port via swconfig. Still the default is to initially disable EEE on all ports. Successfully tested on a TL-WDR4900 (AR8327 rev.4) Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44021
* ar8216: introduce ar8xxx_reg_clear complementing ar8xxx_reg_setJohn Crispin2015-01-171-6/+4
| | | | | | | | Introduce ar8xxx_reg_clear complementing ar8xxx_reg_set. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> SVN-Revision: 44004
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