| Commit message (Collapse) | Author | Age | Files | Lines |
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SVN-Revision: 35908
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This makes the PCI bus topology more standard for devices behind a bridge
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 35078
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L2 cache via L2X0 cache controller available on some ARM boards can
provide a performance boost in some situations but decrease performance
in others. This adds a kernel cmdline to disable L2X0 for cns3xxx based
boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 34874
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function. This removes those from the dwc_otg driver and removes the patch
that comments out the linkage of udc-core so that the dwc_otg driver can
co-exist happily with other USB Device Controllers.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
SVN-Revision: 34475
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SVN-Revision: 34168
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SVN-Revision: 34167
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SVN-Revision: 34162
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SVN-Revision: 34161
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SVN-Revision: 34120
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Many Laguna products have on-board GPS with Pulse-per-second (PPS)
support. This patch adds kernel support (statically) and adds
the platform data in laguna board support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 34115
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SVN-Revision: 34101
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