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* ath79: Add GL.iNet AR-300M-LiteJeff Kletsky2019-03-137-83/+91
| | | | | | | | | | | | | | | | | | | | | AR300M-Lite is single-Ethernet variant of the AR300M series Its eth0 would otherwise be assigned to the WAN interface making it unreachable firstboot or failsafe. Installation instructions from OEM (OpenWrt variant): * Install sysupgrade.bin using OEM's "Advanced" GUI (LuCI), * Do not preserve settings * Access rebooted device via Ethernet at OpenWrt default address Add previously missing LED defaults for all three variants; -nand, -nor, -lite to the definitions in 01_leds Non-lite variants thanks to Andreas Ziegler https://patchwork.ozlabs.org/patch/1049396/ Runtime-tested: GL.iNet AR300M-Lite Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
* ath79: add support for LibreRouter v1Santiago Piccinini2019-03-134-0/+226
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- SOC: QCA9558 RAM: 128M DDR2 Flash: 16MiB SPI-NOR ETH: QCA8337N: 2x 10/100/1000 PoE and PoE pass-through WiFi2: QCA9558 (bgn) 2T2R WiFi5: 2x mPCIE with AR9582 (an) 2T2R BTN: 1x Reset GPIO: multiple GPIO on header, PoE passthrough enable UART: 3.3V 115200 8N1 header on the board WDG: ATTiny13 watchdog JTAG: header on the board USB: 1x connector and 1x header on the board PoE: 10-32V input in ETH port 1, passthrough in port 2 mPCIE: 2x populated with radios (but replaceable) OpenWrt is preinstalled from factory. To install use <your-image>-sysupgade.bin using the web interface or with sysupgrade -n. Flash from bootloader (in case failsafe does not work) 1. Connect the LibreRouter with a serial adapter (TTL voltage) to the UART header in the board. 2. Connect an ETH cable and configure static ip addres 192.168.1.10/24 3. Turn on the device and stop the bootloader sending any key through the serial interface. 4. Use a TFTP server to serve <your image>-sysupgrade.bin file. 5. Execute the following commands at the bootloader prompt: ath> tftp 82000000 <your image>-sysupgrade.bin ath> erase 0x9f050000 +$filesize ath> cp.b 0x82000000 0x9f050000 $filesize ath> bootm 0x9f050000 More docs * Bootloader https://github.com/librerouterorg/u-boot * Board details (schematics, gerbers): https://github.com/librerouterorg/board Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net>
* ath79: add support for TP-Link RE350K v1Piotr Dymacz2019-03-114-0/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TP-Link RE350K v1 (FCC ID: TE7RE350K) is a wall-plug AC1200 Wi-Fi range extender with 'Kasa Smart' support. Device is based on Qualcomm/Atheros QCA9558 + QCA9882 + AR8035 platform and is available only on US market. Specification: - 720/600/200 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 16 MB of flash (SPI NOR) - 1x 1 Gbps Ethernet (AR8035) - 2T2R 2.4 GHz (QCA9558), with ext. PA (SE2565T) and LNA (SKY65971-11) - 2T2R 5 GHz (QCA9882), with ext. PA (SE5003L1-R) and LNA (SKY65981-11) - 2x U.FL connector on PCB - 2x dual-band PCB antennas - 1x LED, 2x dual-color LED (all driven by GPIO) - 3x button (app config, led, reset) - 1x mechanical on/off slide switch - 1x UART (4-pin, 2.54 mm pitch) header on PCB - 1x JTAG (8-pin, 1.27 mm pitch) header on PCB Flash instruction: Use 'factory' image directly in vendor GUI (default IP: 192.168.0.254, default credentials: admin/admin). Warning: This device does not include any kind of recovery mechanism in U-Boot. Vendor firmware access: You can access vendor firmware over serial (RX line requires jumper resistor in R306 place, near XTAL) with: root/sohoadmin credentials. Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
* ath79: add support for YunCore A770Piotr Dymacz2019-03-095-1/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | YunCore A770 is a ceiling AC750 AP with 2 Fast Ethernet ports, PoE (802.3at) support, based on QCA9531 + QCA9887. Specification: - 650/597/216 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 16 MB of flash (SPI NOR) - 2x 10/100 Mbps Ethernet (PoE 802.3at support in WAN port) - 2T2R 2.4 GHz (QCA9531), with ext. PA and LNA - 1T1R 5 GHz (QCA9887), with ext. FEM (SKY85728-11) - 2x regular LED, 1x RGB LED (all driven by GPIO) - 1x button (reset) - DC jack for main power input (12 V) - UART header on PCB Flash instruction: 1. First, gain root access to the device, following below steps: - Login into web gui (default password/IP: admin/192.168.188.253). - Go to 'Advanced' -> 'Management' -> 'System' and download backup of configuration (bakfile.bin). - Open the file as tar.gz archive, edit/update 'shadow' file and change hash of root password to something known. - Repack the archive, rename it back to 'bakfile.bin' and use to restore configuration of the device. - After that, device will reboot and can be accessed over SSH. 2. Then, install OpenWrt: - Login over SSH and issue command: fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000" - Upload 'sysupgrade' image and install it (only if previous command succeeded) with command: 'sysupgrade -n -F openwrt-...'. Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
* ath79: Add support for Ubiquiti Nanostation M (XW)Petr Štetiar2019-03-054-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPU: AR9342 SoC RAM: 64 MB DDR2 Flash: 8 MB NOR SPI Ports: 2x100 MBit (24V PoE in, 24V PoE out), AR8236 switch WLAN: 2.4/5 GHz UART: 1 UART LEDs: Power, 2x Ethernet, 4x RSSI LEDs (orange, red, 2x green) Buttons: Reset Flashing instructions using recovery method over TFTP 1. Unplug the ethernet cable from the router. 2. Using paper clip press and hold the router's reset button. Make sure you can feel it depressed by the paper clip. Do not release the button until step 4. 3. While keeping the reset button pressed in, plug the ethernet cable back into the AP. Keep the reset button depressed until you see the device's LEDs flashing in upgrade mode (alternating LED1/LED3 and LED2/LED4), this may take up to 25 seconds. 4. You may release the reset button, now the device should be in TFTP transfer mode. 5. Set a static IP on your Computer's NIC. A static IP of 192.168.1.25/24 should work. 6. Plug the PoE injector's LAN cable directly to your computer. 7. Start tftp client and issue following commands: tftp> binary tftp> connect 192.168.1.20 tftp> put openwrt-ath79-generic-ubnt-nano-m-xw-squashfs-factory.bin Tested-by: Joe Ayers <ae6xe@arrl.net> Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: gmac: ar934x: Add parser for mii-gmac0-slavePetr Štetiar2019-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | While converting Nanostation M XW from current ar71xx code to ath79 I've hit one issue, where the ethernet networking wasn't working, so I was checking every bit in the networking setup path between ar71xx and ath79. I've came to the following code in ar71xx/mach-ubnt-xm.c: static void __init ubnt_xw_init(void) { ... ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0_SLAVE); ... } Where this code is setting AR934X_ETH_CFG_MII_GMAC0_SLAVE bit in AR934X_GMAC_REG_ETH_CFG register, but I couldn't find a way of setting this bit from DTS, so this patch adds `mii-gmac0-slave` DTS property which allows setting of this bit in `gmac-config`, which is then used in Nanostation M XW DTS. Tested-by: Joe Ayers <ae6xe@arrl.net> Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: qca955x: assert mdio/gmac reset togetherChuanhong Guo2019-03-051-10/+8
| | | | | | | | This allows resetting gmac registers during initialization. Also add compatible string for qca955x mdio to enable more mdio clock dividers. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ar934x: assert mac/mdio reset together for gmac0Chuanhong Guo2019-03-051-6/+3
| | | | | | This allows resetting gmac registers during initialization. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: add support for optional mdio resetChuanhong Guo2019-03-052-1/+8
| | | | | | | | | | | | | | | | | | | | | | On ar933x and later chips, there are separated mac/mdio resets, but resetting the entire gmac block with register values requires both mac_reset and mdio_reset to be asserted together. Add support for optional mdio reset so that we can do a full reset if needed. This patch also replaced deprecated devm_reset_control_get for mac reset. To use this feature, the following is needed: 1. drop "simple-mfd" compatible to register mdio0 after gmac init so that mdio registers aren't reset after initialization. 2. move mdio reset from mdio-bus to its parent eth node. NOTE: This can't be applied on gmac1 with builtin switch since we haven't add a feature to defer probe if phy connection failed. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: register mdio using of_platform_populateChuanhong Guo2019-03-051-5/+12
| | | | | | | remove the hacky checking of "simple-mfd" compatible also add some comments explaining that piece of code. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx-mdio: get reset control using devm apiChuanhong Guo2019-03-051-1/+1
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: replace alloc_etherdev with devm_alloc_etherdevChuanhong Guo2019-03-051-22/+11
| | | | | | | | using the devm api makes the code simpler. also drop unneeded memory free from ag71xx_remove since they are allocated using devm apis. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: replace ag71xx_get_phy_if_mode_name() with phy_modes()Chuanhong Guo2019-03-051-22/+2
| | | | | | | | | phy_modes() in phy.h can convert PHY modes to string with supports for all available PHY modes. Also add a space in mode printing to make it look better. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: make TP-Link revision naming consistentDavid Bauer2019-03-029-9/+9
| | | | | | | | This commit makes the TP-Link hardware-revision naming consistent to match the one used by the vendor. TP-Link refers to the different revisions as "vX" not "Version X". Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: TP-Link Archer C7 v4 swap usb led namesDavid Santamaría Rogado2019-03-021-2/+2
| | | | | | | | | | | | | | | | Commit 34b10b46 made usb match with the corresponding usb label. The problem is that v4 seems to use in stock firmware the upper led for usb 1 and the lower led for usb 2. The led assigned varies between TP-Link models and even same model versions. For example, Archer C7 v1 and v2 have the leds in the reverse order. Revert 34b10b46 and swap led labels instead, now usb port and led label match and also respect the original behavior. Tested-by: Oldrich Jedlicka <oldium.pro@gmail.com> Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
* ath79: speed up ath9k-eeprom extractionDmitry Tunin2019-03-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This is a simple copy of ipq40xx: speed up ath10k-caldata extraction commit a69e101ed1169f562fc030a783cd997d3f066b16 Tested on DIR-825-B1 3768+0 records in 3768+0 records out real 0m 11.90s user 0m 0.03s sys 0m 9.94s 1+0 records in 1+0 records out real 0m 0.03s user 0m 0.00s sys 0m 0.03s With this change eeprom extraction is fast enough to get working Wi-Fi after initial install. Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
* ath79: Fix indentAdrian Schmutzler2019-03-011-1/+1
| | | | | | Fix wrong indentation introduced in 59c2f8a. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: add support for TP-Link Archer C5 v1Bart Lauret2019-02-284-0/+58
| | | | | | | | | | | | | | | | | | | | TP-Link Archer C5 v1 is a dual band router based on Qualcomm/Atheros QCA9558 + QCA9880. Specification: - 720 MHz CPU - 128 MB of RAM (Various chips) - 16 MB of FLASH (Various chips) - SoC QCA9558 integrated 3T3R 2.4 GHz Wi-Fi - minipcie slot with 3T3R 5 GHz QCA9880-BR4A - 5x 10/100/1000 Mbps Ethernet (AR8327N Switch) - 10x LEDs, 2x software buttons For further informwation on the device, visit the wiki: <https://openwrt.org/toh/tp-link/archer-c5-c7-wdr7500> Signed-off-by: Bart Lauret <bblauret@gmail.com>
* ath79: TP-Link Archer C7 v4 swap usb port ledsDavid Santamaría Rogado2019-02-281-2/+2
| | | | | | | USB 1 triggers usb2 led and USB 2 triggers usb1. Lower LED is usb1 and upper LED usb2. Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
* ath79: Modify glinet x750 and AR300m MAC address offsetsLuo chongjun2019-02-282-2/+4
| | | | | | | | In the production of glinet, the MAC address of ethernet port is only written at the position where the ART area offset address is 0, and the MAC address of eth1 is added 1 on the basis of eth0. Signed-off-by: Luo chongjun <luochongjun@gl-inet.com>
* ath79: add support for COMFAST CF-E120A v3Roger Pueyo Centelles2019-02-283-0/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the COMFAST CF-E120A v3, an outdoor wireless CPE with two Ethernet ports and a 802.11an radio. Specifications: - AR9344 SoC - 535/400/267 MHz (CPU/DDR/AHB) - 2x 10/100 Mbps Ethernet, both with PoE-in support - 64 MB of RAM (DDR2) - 8 MB of FLASH - 2T2R 5 GHz, up to 25 dBm - 11 dBi built-in antenna - POWER/LAN/WAN/WLAN green LEDs - 4x RSSI LEDs (2x red, 2x green) - UART (115200 8N1) and GPIO (J9) headers on PCB Flashing instructions: The original firmware is based on OpenWrt so a sysupgrade image can be installed via the stock web GUI. Settings from the original firmware will be saved and restored on the new one, so a factory reset will be needed. To do so, once the new firmware is flashed, enter into failsafe mode by pressing the reset button several times during the boot process, while while the WAN LED flashes, until it starts flashing faster. Once in failsafe mode, perform a factory reset as usual. The U-boot bootloader contains a recovery HTTP server to upload the firmware. Push the reset button while powering the device on and keep it pressed for >10 seconds. The recovery page will be at http://192.168.1.1 Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
* ath79: fix support-list for TP-Link WDR3600David Bauer2019-02-261-1/+1
| | | | | | | | | | | | The TP-Link WDR3600 shares the same machine-code in the ar71xx target, thus expecting "tl-wdr4300" not "tl-wdr3600" in the support-list metadata to allow non-forced sysupgrades from ar71xx to ath79. With this, it is possible to flash a WDR4300 image on the WDR3600. It is no problem however, as the only difference is the 5GHz WiFi chip which has 3SS instead of 2SS. Both work with either image. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: add ar71xx support-list entry for Fritz4020David Bauer2019-02-261-0/+1
| | | | | | | This adds the support-list entry the AVM FRITZ!Box 4020 expects in the ar71xx target to allow non-forced sysupgrades from ar71xx to ath79. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: fix wmac memory region for qca953xChuanhong Guo2019-02-201-1/+1
| | | | | | | According to /arch/mips/include/asm/mach-ath79/ar71xx_regs.h the size of wmac register range for qca953x is only 0x20000. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: add support for I-O DATA WN-AC1600DGRINAGAKI Hiroshi2019-02-148-16/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I-O DATA WN-AC1600DGR is a 2.4/5 GHz band 11ac router, based on Qualcomm Atheros QCA9557. Specification: - SoC: Qualcomm Atheros QCA9557 - RAM: 128 MB - Flash: 16 MB - WLAN: 2.4/5 GHz - 2.4 GHz: 2T2R (SoC internal) - 5 GHz: 3T3R (QCA9880) - Ethernet: 5x 10/100/1000 Mbps - Switch: QCA8337N - LED/key: 6x/6x(4x buttons, 1x slide switch) - UART: through-hole on PCB - Vcc, GND, TX, RX from ethernet port side - 115200n8 Flash instruction using factory image: 1. Connect the computer to the LAN port of WN-AC1600DGR 2. Connect power cable to WN-AC1600DGR and turn on it 3. Access to "http://192.168.0.1/" and open firmware update page ("ファームウェア") 4. Select the OpenWrt factory image and click update ("更新") button 5. Wait ~150 seconds to complete flashing Alternative flash instruction using initramfs image: 1. Prepare a computer and TFTP server software with the IP address "192.168.99.8" and renamed OpenWrt initramfs image "uImageWN-AC1600DGR" 2. Connect between WN-AC1600DGR and the computer with UART 3. Connect power cable to WN-AC1600DGR, press "4" on the serial console and enter the U-Boot console 4. execute "tftpboot" command on the console and download initramfs image from the TFTP server 5. execute "bootm" command and boot OpenWrt 6. On initramfs image, download the sysupgrade image to the device and perform sysupgrade with it 7. Wait ~150 seconds to complete flashing This commit also removes unnecessary "qca,no-eeprom" property from the ath10k wifi node. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* ath79: fix qca955x dual pci resource allocationSantiago Piccinini2019-02-141-1/+1
| | | | | | | | Tested with a dual pci QCA9558 board (LibreRouter v1) in three configurations: enabling pcie0 only, pcie1 only and both enabled. Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed ML notice]
* ath79: fix qca955x pcie0 memory sizeSantiago Piccinini2019-02-141-1/+1
| | | | | | | | | Datasheet states that both PCI ranges are of 0x2000000 size: 0x1000_0000-0x11FF_FFF and 0x1200_0000-0x13FF_0000. Signed-off-by: Santiago Piccinini <spiccinini@altermundi.net> Reviewed-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed ML notice]
* ath79: proper indentation in image/common-tp-link.mkPaul Wassi2019-02-141-1/+1
| | | | | | Add two spaces for proper indentation in image/common-tp-link.mk Signed-off-by: Paul Wassi <p.wassi@gmx.at>
* ath79: fix port order on TL-WR841ND-v7Paul Wassi2019-02-141-3/+3
| | | | | | | | The switch ports are seen one to one on the case. Also remove unneeded secondary port numbers in this case statement. Signed-off-by: Paul Wassi <p.wassi@gmx.at>
* ath79: change ledtrig on GL.iNet AR150Paul Wassi2019-02-141-1/+1
| | | | | | | | | Change the ledtrig for LAN from netdev to switch. Although eth1 comes out of the device at a single port, this port is a switch-port and therefore the LED must be triggered by that. Signed-off-by: Paul Wassi <p.wassi@gmx.at>
* ath79: rename TP-LINK to TP-LinkPaul Wassi2019-02-146-34/+34
| | | | | | Remove inconsistencies in the vendor's name. Signed-off-by: Paul Wassi <p.wassi@gmx.at>
* ath79: rename TL-WR740ND-v4 to TL-WR740N-v4Paul Wassi2019-02-144-7/+7
| | | | | | Give the device the same name it had in ar71xx. Signed-off-by: Paul Wassi <p.wassi@gmx.at>
* ath79: fix TL-WR741ND-v4 switch port orderPaul Wassi2019-02-141-1/+1
| | | | | | | Fix the switch port order for proper display on high level interfaces. Signed-off-by: Paul Wassi <p.wassi@gmx.at>
* ath79: add support for Xiaomi Mi Router 4QDavid Bauer2019-02-113-0/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- CPU: Qualcomm Atheros QCA9561 RAM: 64M DDR2 FLASH: 16M SPI-NOR ETH: 1x WAN - 2x LAN WiFi: QCA9561 3T3R BTN: 1x Reset - 1x WPS LED: 1x Blue - 1x Red - 1x Yellow UART: TX - GND - RX - VCC (From ethernet port) 115200n8 - 3.3V Installation ------------ 1. Connect to the device via UART. 2. Interrupt the U-Boot on power-on by pressing enter when prompted. 3. Connect you computer to one of the routers LAN ports. Assign yourself the IP 192.168.31.10/24. Copy the OpenWRT initramfs image to a tftp server root directory. Rename the image to 'x4q.bin'. 4. Load the initramfs image to the router by executing following command in U-Boot. The image will boot afterwards. > tftpboot 0x81000000 x4q.bin; bootm 5. SCP the sysupgrade-image into '/tmp'. Remember to assign yourself an IP in 192.168.1.0/24 for this step! 6. Install OpenWRT permanently by executing > sysupgrade -n /tmp/<OpenWRT-sysupgrade-image> Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: ag71xx: Fix tx queue timeouts during ifupPetr Štetiar2019-02-071-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ath79 and UBNT Bullet M XW (ar9342) I was experiencing weird issues during network setup[1] which I was able to reproduce easily with following commands: uci set network.lan.ipaddr='192.168.1.20' uci commit network ifup lan Which resulted after some time in: ... WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x16c/0x280 NETDEV WATCHDOG: eth0 (ag71xx): transmit queue 0 timed out ... Sometimes I wasn't able to use networking anymore, sometimes it was enough to just ifdown/ifup lan and network was backup. On ar71xx it was all working just fine. I've found out, that it was happening because ag71xx_poll() wasn't called, thus the TX queue wasn't emptied. The ag71xx_poll() is being called from napi hrtimer, which is enabled by napi_schedule() in ar71xx_interrupt(), but since no interrupts were ever fired again after ag71xx_stop() was called, it was always leading to tx queue timeouts: *** ag71xx_hard_start_xmit() eth0: packet injected into TX queue eth0: raw intr=00000001 TXPS POLL eth0: enable polling mode eth0: processing TX ring, flush=no eth0: disable polling mode, rx=1, tx=1,limit=32 ( `ifup lan done here` ) *** ag71xx_stop() *** ag71xx_open() *** ag71xx_hw_enable() IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready *** ag71xx_hard_start_xmit() eth0: packet injected into TX queue *** ag71xx_hard_start_xmit() eth0: packet injected into TX queue ... WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:320 dev_watchdog+0x164/0x274 So I've looked at ag71xx_stop() in ar71xx, added the missing bits to ath79 and fixed this issue. 1. https://github.com/openwrt/openwrt/pull/1635#issuecomment-448638246 Signed-off-by: Petr Štetiar <ynezz@true.cz> [move ag->link before ag71xx_hw_disable to retain ordering as original] Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ath79: add support for TP-LINK Archer C7 v4Oldřich Jedlička2019-02-055-0/+290
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TP-Link Archer C7 v4 is a dual-band AC1750 router, based on the Qualcomm/Atheros QCA9561 SoC + QCA9880. Specification: - 775/650/258 MHz (CPU/DDR/AHB) - 128 MB of RAM (DDR2) - 16 MB of FLASH (SPI NOR) - 3T3R 2.4 GHz - 3T3R 5 GHz - 5x 10/100/1000 Mbps Ethernet - 7x LED, 2x button - UART header on PCB Flash instruction: 1. Upload openwrt-ath79-generic-tplink_archer-c7-v4-squashfs-factory.bin via Web interface Flash instruction using TFTP recovery: 1. Set PC to fixed ip address 192.168.0.66 2. Download openwrt-ath79-generic-tplink_archer-c7-v4-squashfs-factory.bin and rename it to ArcherC7v4_tp_recovery.bin 3. Start a tftp server with the file tp_recovery.bin in its root directory 4. Turn off the router 5. Press and hold Reset button 6. Turn on router with the reset button pressed and wait ~15 seconds 7. Release the reset button and after a short time the firmware should be transferred from the tftp server 8. Wait ~30 second to complete recovery. Signed-off-by: Oldřich Jedlička <oldium.pro@gmail.com>
* ath79: add support for TP-Link Archer C2 V3 (AC900)Skirmantas Lauzikas2019-01-275-7/+208
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for the TP-link Archer C2 V3 (AC900). Specifications: - CPU: QCA9563 750Mhz - Ram: 64MB (DDR2) - Flash: 8MB (SPI NOR) - Ethernet: 5x 10/100/1000 - Wifi: QCA9563 bgn + QCA9887 an+ac - 9x Leds, 2x buttons Flash instructions: Upload openwrt-ath79-generic-tplink_archer-c2-v3-squashfs-factory.bin via the router Web interface and flash as normal firmware update. Signed-off-by: Skirmantas Lauzikas <skirmantas.lauzikas@blackraven.lt> [reorder entries, fix trailing whitespace in dts, add firmware partition compatible string, remove led default off states, use default on state for system led, reuse tplink-safeloader-uimage image build recipe, squash with dynamic partitioning commit, reword commit message, add installation instructions] Signed-off-by: Jo-Philipp Wich <jo@mein.io>
* ath79: add support for Devolo WiFi Pro 1750eDjango Armstrong2019-01-264-1/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- CPU: Qualcomm Atheros QCA9558 RAM: 128M DDR2 FLASH: 16MiB ETH: 1x Atheros AR8035 (PoE in) 1x Atheros AR8033 WiFi2: QCA9558 3T3R (SiGE SE2565T 2.4 GHz power amp x3) WiFi5: QCA9880 3T3R (Skyworks 5003L1 5 GHz power amp x3) BTN: 1x Reset 1x WPS 1x USB eject LED: 1x LED blue 1x LED red BEEP: 1x GPIO attached piezo beeper UART: 3.3V GND TX RX (115200-N-8) (3.3V is pin closest to rear ports) Dupont 4 pin header Rear RJ45 serial port non-functional USB: 1x v2.0 Installation ------------ Make sure you set a password for the root user as prompted on first setup! 1. Upload OpenWRT sysupgrade image via SSH to the device. Use /tmp as the destination folder on the device. User is root, password previously set in the web interface. 2. Install OpenWRT with > sysupgrade -n -F /tmp/<openwrt-image-name> Signed-off-by: Django Armstrong <iamdjango@hotmail.com>
* ath79: dts: Unify naming of gpio-led nodesPetr Štetiar2019-01-268-8/+8
| | | | | | | | | | | | | | | In DTS Checklist[1] we're now demanding proper generic node names, as the name of a node should reflect the function of the device and use generic name for that[2]. Everybody seems to be copy&pasting from DTS files available in the repository today, so let's unify that naming there as well and provide proper examples. 1. https://openwrt.org/submitting-patches#dts_checklist 2. https://github.com/devicetree-org/devicetree-specification/blob/master/source/devicetree-basics.rst#generic-names-recommendation Signed-off-by: Petr Štetiar <ynezz@true.cz> [split up, removed entries where it could clash due to ath9k-leds] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ath79: dts: Unify naming of gpio-keys nodesPetr Štetiar2019-01-2613-13/+13
| | | | | | | | | | | | | | In DTS Checklist[1] we're now demanding proper generic node names, as the name of a node should reflect the function of the device and use generic name for that[2]. Everybody seems to be copy&pasting from DTS files available in the repository today, so let's unify that naming there as well and provide proper examples. 1. https://openwrt.org/submitting-patches#dts_checklist 2. https://github.com/devicetree-org/devicetree-specification/blob/master/source/devicetree-basics.rst#generic-names-recommendation Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [split up]
* ath79: fix GL.iNet AR300M family GPIOs/LEDsJeff Kletsky2019-01-261-14/+2
| | | | | | | | | | | | | | | | | Change the "status" LED to proper GPIO 12 and "red" naming. Remove GPIO 2 from definition as a USB LED. GPIO 2 is used to control power to the USB socket, not an LED. As such, PWM on the line or typical LED triggers are inappropriate. Users who wish to control the USB power for custom applications can manipulate the GPIO through code, or for example, export it through /sys/class/gpio/export. Runtime-tested:  GL.iNet AR300M-Lite Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
* kernel: bump 4.14 to 4.14.95Koen Vandeputte2019-01-241-2/+2
| | | | | | | | | | | | | | Refreshed all patches. Removed superseded patches: - 0400-Revert-MIPS-smp-mt-Use-CPU-interrupt-controller-IPI-.patch Compile-tested on: ar71xx, cns3xxx, imx6, lantiq (xrx200, AVM 3370), x86_64 Runtime-tested on: ar71xx, cns3xxx, imx6, lantiq (xrx200, AVM 3370) Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> Tested-by: Mathias Kresin <dev@kresin.me> Tested-by: Robert Resch <openwrt@webnmail.de>
* ath79: fix port order for dir 825-c1 and 835-a1Sebastian Kemper2019-01-221-11/+11
| | | | | | | | | | LAN ports 1 and 4 and 2 and 3 are interchanged. Fix this in 02_network so the ports show up in the correct order in luci. The correct ucidef_add_switch line is already present. This commit moves the blocks around to keep alphabetical order. Signed-off-by: Sebastian Kemper <sebastian_ml@gmx.net>
* ath79: ag71xx: preserve port mirror flags during swconfig applyMilan Krstic2019-01-221-0/+4
| | | | | | | | The swconfig load operation always triggers 'apply' function which in this driver currently clears port mirroring flags effectively undoing port mirroring configuration. Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
* ath79: add support for devolo WiFi pro 1200iDavid Bauer2019-01-054-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- CPU: Qualcomm Atheros QCA9558 RAM: 128M DDR2 FLASH: 16MiB ETH: 1x Atheros AR8035 (PoE in) WiFi2: QCA9558 2T2R WiFi5: QCA9880 2T2R BTN: 1x Reset LED: 1x LED blue 1x LED red BEEP: 1x GPIO attached piezo beeper UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad) Header is located next to reset-button Installation ------------ Make sure you set a password for the root user as prompted on first setup! 1. Upload OpenWRT sysupgrade image via SSH to the device. Use /tmp as the destination folder on the device. User is root, password the one set in the web interface. 2. Install OpenWRT with > sysupgrade -n -F /tmp/<openwrt-image-name> Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: add support for devolo WiFi pro 1750iDavid Bauer2019-01-054-1/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- CPU: Qualcomm Atheros QCA9558 RAM: 128M DDR2 FLASH: 16MiB ETH: 1x Atheros AR8035 (PoE in) WiFi2: QCA9558 3T3R WiFi5: QCA9880 3T3R BTN: 1x Reset LED: 1x LED blue 1x LED red BEEP: 1x GPIO attached piezo beeper UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad) Header is located next to reset-button Installation ------------ Make sure you set a password for the root user as prompted on first setup! 1. Upload OpenWRT sysupgrade image via SSH to the device. Use /tmp as the destination folder on the device. User is root, password the one set in the web interface. 2. Install OpenWRT with > sysupgrade -n -F /tmp/<openwrt-image-name> Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: merge cases in 02_networkPaul Wassi2019-01-021-16/+6
| | | | | | Merge some duplicate cases in /etc/board.d/02_network Signed-off-by: Paul Wassi <p.wassi@gmx.at>
* ath79: align GL-AR750S boardname to other GL.iNet devicesChristoph Krapp2019-01-014-10/+7
| | | | | | As the official device name is GL-AR750S, rename the board accordingly. Signed-off-by: Christoph Krapp <achterin@googlemail.com>
* ath79: fix case statement in 01_ledsPaul Wassi2019-01-011-0/+1
| | | | | | Fix a missing 'end-of-case' recently introduced in 01_leds Signed-off-by: Paul Wassi <p.wassi@gmx.at>
* ath79: rework elecom-header recipeMathias Kresin2018-12-311-26/+22
| | | | | | | | Replace the code with a more readable version. Rename the recipe to reflect the real usecase. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Mathias Kresin <dev@kresin.me>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 12:31:55 +0000