| Commit message (Collapse) | Author | Age | Files | Lines |
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ethtool doesn't work currently as phy_ethtool_ioctl expects user space
pointer, but it's being passed kernel one. Fixing it doesn't make sense
as {s,g}et_settings were deprecated anyway. So let's rather remove
phy_ethtool_ioctl and use new {s,g}et_link_ksettings instead. While at
it, update nway_reset as well.
Cc: John Crispin <john@phrozen.org>
Ref: https://bugs.openwrt.org/index.php?do=details&task_id=1982
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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This ioctl is currently routed through generic interface code:
dev_ioctl
dev_ethtool
__ethtool_get_link_ksettings
phy_ethtool_ioctl
Cc: John Crispin <john@phrozen.org>
Cc: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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The register size of the QCA955x currently matches the size stated in
the datasheet. However, there are more hidden GMAC registers which are
needed for the SGMII workaround to work.
Signed-off-by: David Bauer <mail@david-bauer.net>
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In ar71xx v2 has blue color defined because the same mach-*.c is also used
for TL-WDR4900 model with blue leds. ath79 v2 dts defines them as green.
For v4 the situation is the same as v5 so the conversion is identical only
v4 instead v5.
So now upgrading from ar71xx to ath79 should be also smoother for v2 and v4.
Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
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This patch fixes following missing bits:
- add missing 'compatible' property on firmware partition
- set vendor partition 'userconfig' read-only
Fixes: 30dcbc741d84 ("ath79: add support for EnGenius ECB1750")
Signed-off-by: Sven Friedmann <sf.openwrt@okay.ms>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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SoC: AR9344
RAM: 128MB
Flash: 16MiB Winbond 25Q128BVFG SPI NOR
5GHz WiFi: AR9380 PCIe 3x3:3 802.11n
2.4GHz WiFi: AR9344 (SoC) AHB 2x2:2 802.11n
5x Gigabit ethernet via AR8327N switch (green + amber LEDs)
2x USB 2.0 via GL850G hub
4x front LEDs from SoC GPIO
1x front WPS button from SoC GPIO
1x bottom reset button from SoC GPIO
Known issues:
AR8327N LEDs only have default functionality, not presented in sysfs.
This is a regression from ar71xx.
UART header JP1, 115200 no parity 1 stop
TX
GND
VCC
(N/P)
RX
See https://openwrt.org/toh/wd/n750 for flashing detail.
Procedures unchanged from ar71xx.
Tested sysupgrade + factory flash from WD Emergency Recovery
Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
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Refreshed all patches.
Remove upstreamed:
- 103-MIPS-perf-ath79-Fix-perfcount-IRQ-assignment.patch
Compile-tested on: cns3xxx, imx6
Runtime-tested on: cns3xxx, imx6
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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The GL.iNet AR750S USB and microSD port is currently not working out of
the box. GPIO 7 is used to control the power of the USB port. Add GPIO
7 as a fixed-regulator for the port. Also add &usb1 to DTS to get the
microSD port to work.
Signed-off-by: Alexander Wördekemper <alexwoerde@web.de>
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ar71xx uses `archer-c7-v5` for led prefix, but ath79 sticks to more
generic `tplink` as the DTS is reused by more boards, so we need to
perform migrations of the LED names during upgrade.
Cc: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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Commit "generic: ar8216: add mib_poll_interval switch attribute" sets
mib-poll-interval as disabled by default (was set to 2s), so it makes
switch LEDs trigger disfunctional on devices which don't have
mib-poll-interval set.
So this patch sets mib-poll-interval to 500ms on devices which have
ar83xx switch connected to mdio0 bus, as the same value was set for
built in switches in 443fc9ac35 ("ath79: use ar8216 for builtin
switch").
Some measurements performed on TP-Link Archer C7-v5:
mib-type=0, mib-poll-interval=500ms (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.93 0.00 0.00 1.93 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
mib-type=0, mib-poll-interval=2s (10s pidstat)
Average: %usr %system %guest %wait %CPU CPU Command
Average: 0.00 1.14 0.00 0.00 1.14 - kworker/0:2
iperf3 (30s): 334 Mbits/sec
So it seems like we get 4x faster LED refresh rate for additional 0.8%
CPU load.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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This patch converts the Range Extender to use the
interrupt-driven gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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This patch converts the WNDR3700 to use the interrupt-driven
gpio-keys driver over the polled variant.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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All other QCA9563 devices already use this identifier for
the exact SoC. Not that this matters much since as upstream
states in Documentation/devicetree/usage-model.txt:
"First and foremost, the kernel will use data in the DT to
identify the specific machine. In a perfect world, the
specific platform shouldn't matter to the kernel because all
platform details would be described perfectly by the device
tree in a consistent and reliable manner.
[...]
In the majority of cases, the machine identity is irrelevant,
and the kernel will instead select setup code based on the
machine's core CPU or SoC."
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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TP-Link Archer D50 v1 is a dual-band AC1200 router + modem.
The router section is based on Qualcomm/Atheros QCA9531 + QCA9882.
The "DSL" section is based on BCM6318 but it's currently not supported.
Internally eth0 is connected to the Broadcom CPU.
Router section - Specification:
CPU: QCA9531 650/600/200 MHz (CPU/DDR/AHB)
RAM: 64 MB (DDR2)
Flash: 8 MB (SPI NOR)
Wifi 2.4GHz: QCA9531 2T2R
Wifi 5GHz: QCA9982 2T2R
4x 10/100 Mbps Ethernet
8x LED, 3x button
UART header on PCB
Known issues:
DSL not working (eth0) (WIP)
UART connection
---------------
J2 HEADER (Qualcomm CPU)
. TX
. RX
. GND
O VCC
J16 HEADER (Broadcom CPU)
O VCC
. GND
. RX
. TX
The following instructions require a connection to the J2 UART header.
Flash instruction under U-Boot, using UART
------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-squashfs-sysupgrade.bin
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Initramfs instruction under U-Boot for testing, using UART
----------------------------------------------------------
1. Press any key to stop autobooting and obtain U-Boot CLI access.
2. Setup ip addresses for U-Boot and your tftp server.
3. Issue below commands:
tftpboot 0x81000000 openwrt-ath79-generic-tplink_archer-d50-v1-initramfs-kernel.bin
bootm 0x81000000
Restore the original firmware
-----------------------------
0. Backup every partition using the OpenWrt web interface
1. Download the OEM firmware from the TP-Link website
2. Extract the bin file in a folder (eg. Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin)
3. Remove the U-Boot and the Broadcom image part from the file.
Issue the following command:
dd if="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin" of="Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod" skip=257 bs=512 count=15616
4. Double check the .mod file size. It must be 7995392 bytes.
5. Flash it using the OpenWrt web interface. Force the update if needed.
WARNING: Remember to NOT keep settings.
5b. (Alternative to 5.) Flash it using the U-Boot and UART connection.
Issue below commands in the U-Boot:
tftpboot 0x81000000 Archer_D50v1_0.8.0_1.3_up_boot(170223)_full_2017-02-24_09.37.45.bin.mod
erase 0x9f020000 +$filesize
cp.b 0x81000000 0x9f020000 $filesize
reset
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [removed
default-state = "off", it's already the default, added pcie node,
fixed typo]
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SoC: Atheros AR7161-8C1A @ 680 MHz
RAM: 128MB - 2x Etron Technology EM6AB160TSA-5G
NOR: 16MB - 1x MXIC MX25L12845EMI-10G (SPI-NOR)
WI1: Atheros AR9223-AC1A 802.11bgn
WI2: Atheros AR9220-AC1A 802.11an
ETH: Atheros AR8021-BL1E + PoE
LED: Dual-Color Power/Status, Ethernet, WLAN2G and WLAN5G
BTN: 1 x Reset
I2C: AT97SC4303s TPM (needs driver!)
CON: RS232-level 8P8C/RJ45 Console Port - 9600 Baud
Factory installation:
- Needs a u-boot replacement. See Wiki for
information on how to do a in-circut flash with
a SPI-Flasher like a CH314A or flashrom. Wiki page
can be found at https://openwrt.org/toh/aruba/aruba_ap-105
- Be careful when dis- and reassembling the device to
not squish any of the antenna cables in the process!
- Be sure to make a full 16 MiB backup of your device
before flashing the new u-boot! This is needed if you
ever have interest in reverting back to stock firmware.
Not working:
- TPM (needs a driver)
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
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Specifications:
- QCA9563 at 775 MHz
- 64 MB RAM Zentel A3R12E40CBF-8E
- 16 MB flash Winbond W25Q128FVSG
- 3 (non-detachable) Antennas / 450 Mbit
- 1x/4x WAN/LAN Gbps Ethernet (QCA8337)
- reset and Wi-Fi buttons
TP-Link TL-WR1043N v5 appears to be identical to the TL-WR1043ND v4,
except that the USB port has been removed and there is no longer a
removable antenna option. It also has different partitioning scheme.
The software is more in line with the Archer series in that it uses a
nested bootloader scheme.
(This has been adapted from the OpenWrt Wiki page)
<https://openwrt.org/toh/tp-link/tl-wr1043nd>
Installation on HW rev.5:
Factory firmware can be installed via the WEB interface.
Alternatively, it is also possible to use a TFTP server
for recovery purposes:
- Rename OpenWRT or original firmware to WR1043v5_tp_recovery.bin
- Set static IP of your PC to *192.168.0.66*
- Router will obtain IP 192.168.0.86 for a few seconds while
loading, when reset button pressed at power On.
And finally, there's always u-boot access through the UART.
For information visit the wiki.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[reworked commit message]
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Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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This prepares for support of v5.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Specification:
- Qualcomm Atheros SoC QCA9558
- 720/600/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 1x 10/100/1000 Mbps Ethernet
- 3T3R 2.4 GHz (QCA9558 WMAC)
- 3T3R 5.8 Ghz (QCA9880-BR4A, Senao PCE4553AH)
https://fccid.io/A8J-ECB1750
Tested and working:
- lan, wireless, leds, sysupgrade (tftp)
Flash instructions:
1.) tftp recovery
- use a 1GbE switch or direct attached 1GbE link
- setup client ip address 192.168.1.10 and start tftpd
- save "openwrt-ath79-generic-engenius_ecb1750-initramfs-kernel.bin" as "ap.bin" in tfpd root directory
- plugin powercord and hold reset button 10secs.. "ap.bin" will be downloaded and executed
- afterwards login via ssh and do a sysuprade
2.) oem webinterface factory install (not tested)
Use normal webinterface upgrade page und select "openwrt-ath79-generic-engenius_ecb1750-squashfs-factory.bin".
3.) oem webinterface command injection
OEM Firmware already running OpenWrt (Attitude Adjustment 12.09).
Use OEM webinterface and command injection. See wiki for details.
https://openwrt.org/toh/engenius/engenius_ecb1750_1
Signed-off-by: sven friedmann <sf.openwrt@okay.ms>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[use interrupt-driven "gpio-keys" binding]
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These dts itself are incomplete (e.g. missing mtd partitions) and its
deivce support is never added to ath79 target.
Drop these unused dts for now.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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In commit e9652e1696d9 ("ath79: fix pinmux for ar933x devices") I've
wrongly changed desired register value to 0xf8 although it should've
been set to 0x0.
0xf8 value sets bits 3-7 (ETH_SWITCH_LEDx_EN) to 1 which actually
enables ethernet switch LEDs, so 0x0 is correct value in order to use
the pins as GPIO.
Fixes: e9652e1696d9 ("ath79: fix pinmux for ar933x devices")
Reported-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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Simply dumped content of this regs in ar71xx and wrote them to DTS, as a
result port 6 on the switch will appear disconnected as on Archer C7v4.
[AS: testing and PORT6_STATUS fix]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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Reset button support seems to be missing in ath79.
Run-tested on CPE210 v2.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Properly disable the SoC's internal Switch LEDs on the pinmux.
Devices that previously called ath79_gpio_function_disable for
the switch LEDs, just need to reference switch_led_pins in the
pinctrl-0 property of the gpio-leds node.
Signed-off-by: Paul Wassi <p.wassi@gmx.at>
[changed desired pinctrl register value from 0x1f to proper 0xf8]
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[renamed pinmux name to switch_led_disable_pins to make purpose more clear]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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This devices have LEDs connected to the SoC's GPIOs, so it makes no
sense to fiddle with ar8327 LED regs.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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Refreshed all patches.
Remove upstreamed:
- 060-v5.1-serial-ar933x_uart-Fix-build-failure-with-disabled-c.patch
- 400-v5.2-leds-trigger-netdev-fix-refcnt-leak-on-interface-ren.patch
Compile-tested on: cns3xxx, imx6
Runtime-tested on: cns3xxx, imx6
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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Refreshed all patches.
Remove upstreamed:
- 060-v5.1-serial-ar933x_uart-Fix-build-failure-with-disabled-c.patch
Altered:
- 143-gpio-fix-device-tree-gpio-hogs-on-dual-role-gpio-pin.patch
Compile-tested on: ar71xx, cns3xxx, imx6, x86_64
Runtime-tested on: ar71xx, cns3xxx, imx6
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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Add some read-only properties to protect partitions from
accidental changes.
Also fixed two whitespaces error on the way.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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If the target supports a newer kernel version that is not used by default
yet, it can be enabled with this option
Signed-off-by: Felix Fietkau <nbd@nbd.name>
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The GL.iNet AR750S is based around the QCA9563
and requires the QCA9887 firmware for operation.
Signed-off-by: Jeff Kletsky <git-commits@allycomm.com>
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This corrects the PLL value for 10 Mbit/s links on the OCEDO Raccoon.
Prior to this patch, 10 Mbit/s links would not transmit data.
It is worth mentioning that the vendor firmware used the same PLL
settings and 10Mbit/s was also not working there.
All other link-modes are working correctly without any packet loss.
Signed-off-by: David Bauer <mail@david-bauer.net>
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Refreshed all patches.
Altered patches:
- 150-bridge_allow_receiption_on_disabled_port.patch
- 201-extra_optimization.patch
Remove upstreamed:
- 022-0006-crypto-crypto4xx-properly-set-IV-after-de-and-encryp.patch
Compile-tested on: ar71xx, cns3xxx, imx6, x86_64
Runtime-tested on: ar71xx, cns3xxx, imx6
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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Refreshed all patches.
Fixes:
- CVE-2019-3887
New symbol:
- CONFIG_LDISC_AUTOLOAD
Compile-tested on: cns3xxx, imx6
Runtime-tested on: cns3xxx, imx6
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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Refreshed all patches.
New symbol:
- CONFIG_LDISC_AUTOLOAD
Compile-tested on: ar71xx, cns3xxx, imx6, x86_64
Runtime-tested on: ar71xx, cns3xxx, imx6
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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Reverting this commit as I've missed the fact, that the button is
already present in the included DTSI file.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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I-O DATA ETG3-R is a wired router. So wireless-related packages are
unnecessary and remove those packages from default configuration to
reduce flash usage.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
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This adds support for the TP-Link WR842N v3 which is already supported on ar71xx
target (0b45bec22c59cc6e6b2fa71dc9a88386c5587132).
Specification:
* SoC: QCA9533 ver 2 rev 0
* 16 MB Flash (gd25q128)
* 64 MB RAM
* 1 WAN 10/100 MBit/s (blue connector)
* 4 LAN 10/100 MBit/s (AR8229; 4 ports; yellow connectors)
* Atheros AR9531 (2,4GHz, two fixed antennas)
* USB
* Reset / WPS button
* WiFi button (rf kill)
* 8 green leds; 1 red/green led
* serial console (115200 8N1, according to the OpenWrt-wiki some soldering is needed)
Installation:
* flash via vendor WebUI (the filename must not exceed certain length)
* sysupgrade from installed OpenWrt (also ar71xx)
Thanks to Holger Drefs for providing the hardware
Tested-by: @kofec (github)
Signed-off-by: Sven Roederer <devel-sven@geroedel.de>
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This is sold as a dual-band 802.11ac range extender. It has a sliding
switch for Extender mode or Access Point mode, a WPS button, a recessed
Reset button, a hard-power button, and a multitude of LED's, some
multiplexed via an NXP 74AHC164D chip. The internal serial header pinout is
Vcc, Tx, Rx, GND, with GND closest to the corner of the board. You may
connect at 115200 bps, 8 data bits, no parity, 1 stop bit.
Specification:
- System-On-Chip: QCA9558
- CPU/Speed: 720 MHz
- Flash-Chip: Winbond 25Q128FVSG
- Flash size: 16 MiB
- RAM: 128 MiB
- Wireless No1: QCA9558 on-chip 2.4GHz 802.11bgn, 3x3
- Wireless No2: QCA99x0 chip 5GHz 802.11an+ac, 4x4
- PHY: Atheros AR8035-A
Installation:
If you can get to the stock firmware's firmware upgrade option, just feed
it the factory.img and boot as usual. As an alternative, TFTP the
factory.img to the bootloader.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[whitespace fix in DTS and reorder of make variables]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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Remove Netgear-specific image build variables which are set to the same
value.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
[reordering of variables, removed stray newline]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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This patch adds currently missing support for the WPS button on TP-Link
Archer C7v5.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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These devices share the network config with C7v4, thus the WAN MAC
also needs to be fixed the same way. However, the partition
where the MAC address resides has been changed.
Based on: https://github.com/openwrt/openwrt/pull/1726
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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The GPIO for the reset button for the Archer C7v5 changed from
ar71xx to ath79. An investigation based on tests revealed
that the A7v5 responds on "11", while the C7v5 responds on
"5" as set for ar71xx.
Thus, we just define this in the DTS files instead of in the
common DTSI.
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Definition is split here without obvious reason. Just merge it
(and align order to that from C7 v4).
Tested-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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The Ubiquiti Network airCube ISP is a cube shaped 2.4 GHz with internal
2x2 MIMO antennas. It can be supplied via a USB connector or via PoE.
There are for 10/100 Mbps ports (1 * WAN + 3 * LAN). There is an
optional PoE passthrough from the first LAN port to the WAN port.
SoC: Qualcomm / Atheros QCA9533-BL3A
RAM: 64 MB DDR2
Flash: 16 MB SPI NOR
Ethernet: 4x 10/100 Mbps (1 WAN + 3 LAN)
LEDS: 1x via a SPI controller (not yet supported)
Buttons: 1x Reset
Serial: 1x (only RX and TX); 115200 baud, 8N1
Missing points:
- LED not yet supported
- Factory upgrade via web IF or TFTP recovery not yet supported
(Needs RSA signed images, for details see PR#1958)
The serial port is on a four pin connextor labeled J1 and located
between Ethernet and USB connector. The pinout is:
1. 3V3 (out)
2. Rx (in)
3. Tx (out)
4. GND
Upgrading via serial port / U-Boot:
- Connect the serial port via a level converter
- Power the system and stop U-Boot with pressing any key when `Hit any
key to stop autoboot` is displayed. Note: Pressing space multiple
times untill U-Boot reaches that location works well.
- Connect a PC with the IP 192.168.1.100 (or some other in that net)
running a TFTP-Server to one of the LAN ports. Copy the sysupgrade
image to the server.
- Set the U-Boot server IP with
setenv serverip 192.168.1.100
- Load the flash image to RAM with
tftpboot 0x81000000 sysupgrade.bin
- Erase the flash with
erase 0x9f050000 0x9ffaffff
- Write the new flash content with
cp 0x81000000 0x9f050000 ${filesize}
- Reset the device with
reset
Signed-off-by: Christian Mauderer <oss@c-mauderer.de>
[removed full stop in subject and added lockdown note to commit message]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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SOC: Qualcomm Atheros QCA9558
RAM: 128MB
FLASH: 16MB (Macronix MX25L12845EMI-10G)
WLAN1: QCA9558 2.4GHz 802.11bgn 3SS
WLAN2: QCA9880 5GHz 802.11ac 3SS
LED: Power, LAN1, LAN2, 2.4GHz, 5GHz
Serial:Next to SPI Flash,
Pinout is 3V3 - GND - TX - RX (Square Pin is 3V3)
The Serial setting is 115200-8-N-1
INSTALLATION:
1. Serve an OpenWrt ramdisk image named "ursus.bin".
Set your IP-address to 192.168.100.8/24.
2. Connect to the serial. Power up the device and interrupt
the boot process.
3. Set the correct bootcmd with
> setenv bootcmd run bootcmd_1
> saveenv
4. Run
> tftpboot 0x81000000 ursus.bin
> bootm 0x81000000
5. Wait for OpenWrt to boot up.
6. Transfer OpenWrt sysupdate image and flash via sysupgrade.
Signed-off-by: Markus Scheck <markus.scheck1@gmail.com>
Tested-by: David Bauer <mail@david-bauer.net>
[whitespace fix, renamed LED labels and SoC type fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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In ar71xx we check for stuck DMA on devices which fall in the is_ar724x
SoC group (ar724x, ar933x, ar934x, qca9533, tp9343, qca955x, qca956x).
In ath79 we're currently performing this check only for devices with
ar7240 SoC, so this patch tries to sync the dma stuck checking behavior
with what is being done in ar71xx.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
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Refreshed all patches.
Removed:
- 030-PCI-dwc-skip-MSI-init-if-MSIs-have-been-explicitly-d.patch
Altered:
- 366-netfilter-nf_flow_table-clean-up-and-fix-dst-handlin.patch
- 650-netfilter-add-xt_OFFLOAD-target.patch
- 662-remove_pfifo_fast.patch
- 332-arc-add-OWRTDTB-section.patch
- 100-clocksource-drivers-arch_timer-Workaround-for-Allwin.patch
- 702-phy_add_aneg_done_function.patch
New symbols:
- ARC_IRQ_NO_AUTOSAVE
- SUN50I_ERRATUM_UNKNOWN1
Compile-tested: cns3xxx, imx6, sunxi
Runtime-tested: cns3xxx, imx6
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
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NEC Aterm WG1200CR is a 2.4/5 GHz band 11ac router,
based on Qualcomm Atheros QCA9563.
Specification:
- SoC : Qualcomm Atheros QCA9563
- RAM : DDR2 128 MiB
- Flash : SPI-NOR 8 MiB
- WLAN : 2.4/5 GHz 2T2R
- 2.4 GHz : QCA9563 (SoC)
- 5 GHz : QCA9888
- Ethernet : 2x 10/100/1000 Mbps
- Switch : QCA8334
- LEDs/Input : 12x/4x (2x buttons, 1x slide-switch)
- UART : through-hole on PCB
- JP1: Vcc, GND, NC, TX, RX from power connector side
- 115200 bps
Flash instruction using factory image:
1. Boot WG1200CR normaly
2. Access to "http://192.168.10.1/" and open firmware update page
("ファームウェア更新")
3. Select the OpenWrt factory image and click update ("更新") button
to perform firmware update
4. Wait ~150 seconds to complete flashing
Known issues:
- cannot be controlled LEDs other than Power (Green/Red)
- only Power LEDs are connected to SoC GPIO; other LEDs
connected to the gpiochip on ath10k chip (QCA9888)
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [commit
message formatting]
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Currently, tplink-safeloader definition is only used a base for
another common definition.
This patch adjusts tplink-safeloader so it can be actually used
for some targets in generic-tp-link.mk.
This patch is cosmetic except for the order of
"check-size $$$$(IMAGE_SIZE)" and "append-metadata" exchanged
for the tplink_re350k-v1 .
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [dealed with
tplink_cpe210-v2 and tplink_cpe210-v3, removed tplink-safeloader-uimage's
extra IMAGE/sysupgrade.bin rule]
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