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* ath79: ag71xx: unify version dependent codeDavid Bauer2020-04-271-5/+1
| | | | | | | Use IS_ERR_OR_NULL macro to use the same code on kernel 4.19 as well as 5.4. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: ag71xx: remove code for legacy kernelsDavid Bauer2020-04-271-32/+0
| | | | | | | ath79 does not support kernels prior to 4.19 anymore. Remove legacy code for those kernels from the ag71xx driver. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: move tplinkpart.c parser to patchesAdrian Schmutzler2020-04-241-235/+0
| | | | | | | | | | | | | Between 4.19 and 5.4, mtd parsers have been moved to "parsers" subdirectory. Like for myloader.c in the previous patch, this patch moves tplinkpart.c to the kernel patches, so the code and the kernel includes are at the same location and the path can be adjusted per kernel. While at it, remove some outdated kernel version switches from the C code. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: fix missing return statement in ar934x_nandDavid Bauer2020-03-221-4/+12
| | | | | | | | | | | The reset assert and deassert methods currently miss a return value, leading to a compilation warning. Return the return-value of reset_control_assert and reset_control_deassert to fix these warnings. Suggested-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl> Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: fix NAND driver compilation for kernel 5.4David Bauer2020-03-221-5/+122
| | | | | | | | | | | | | | | This fixes the compilation of the AR934x NAND controller driver for kernel 5.4 while leaving it untouched for kernel 4.19. This change is currently not run-tested, as i do not have such a device at hand. CC: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl> CC: André Valentin <avalentin@marcant.net> CC: WeiDong Jia <jwdsccd@gmail.com> Signed-off-by: David Bauer <mail@david-bauer.net> Tested-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
* ath79: use downstream ag71xx for Kernel 5.4David Bauer2020-03-139-0/+3106
| | | | | | | | | | | | | | | | | | | The ag71xx driver from Linux 5.4 currently has various shortcomings when used with OpenWrt compared to our downstream version. For example, the upstream driver does not support modifying the ethernet clock and configuring RGMII delays on the MAC side. While we should certainly switch to the upstream driver, the amount of necessary patches would make it cumbersome to work with. It's also highly likely we won't be able to finish patching the upstream driver in time for a Linux 5.4 release. Tested on Siemens WS-AP3610. CC: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: David Bauer <mail@david-bauer.net> Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
* ath79: add support for kernel 5.4David Bauer2020-02-289-3102/+0
| | | | | | | | | | | | | | | Signed-off-by: David Bauer <mail@david-bauer.net> [refreshed] Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> * Sync the patches with the changes done for kernel 4.19 * Use KERNEL_TESTING_PATCHVER * Refresh the configuration * Fix multiple compile bugs in the patches * Only add own ag71xx files for kernel 4.19 and use upstream version for 5.4. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ath79: ag71xx: use netif_receive_skb_list on 4.19Chuanhong Guo2020-02-071-1/+19
| | | | | | | | This new function make batch processing of network packets possible, which slightly improves performance. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Tested-by: Rosen Penev <rosenp@gmail.com>
* ath79: add QCA955x SGMII link loss workaroundDavid Bauer2020-01-231-0/+108
| | | | | | | | | | | | | | | | This commit adds a workaround for the loss of the SGMII link observed on the QCA955x generation of SoCs. The workaround originates part from the U-Boot source code, part from the implementation from AVM found in the GPL tarball for the AVM FRITZ!WLAN Repeater 450E. The bug results in a stuck SGMII link between the PHY device and the SoC side. This has only been observed with the Atheros AR8033 PHY and most likely all devices using such combination are affected. It is worked around by reading a hidden SGMII status register and issuing a SGMII PHY reset until the link becomes useable again. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: add AR934x NAND Flash Controller driverMichal Cieslakiewicz2019-10-201-0/+1481
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains updated driver for Atheros NAND Flash Controller written originally by Gabor Juhos for ar71xx (aka 'ar934x-nfc'). ath79 version has adapted to work with kernel 4.19 and Device Tree. It has also been renamed to 'ar934x-nand' to avoid confusion with Near-Field Communication technology. Controller is present on Atheros AR934x SoCs and required for accessing internal flash storage on routers like Netgear WNDR4300. This port preserves all NAND programming code while moving platform configuration to Device Tree and replacing some kernel functions marked for retirement by 4.19. Suitable definition is included in 'ar934x.dtsi' ('nand@1b000200' section). Most important changes to ar71xx version are: * old kernel sections of code removed * 'bool swap_dma' provided by platform data is now set by boolean DT property 'qca,nand-swap-dma' * board-supplied (mach-*.c code) platform data removed - its elements become either unused, redundant or replaced by DT methods (like reset) * IRQ is reserved by devm_request_irq() so free_irq() is not needed anymore * calls to deprecated nand_scan_ident() + nand_scan_tail() function pair replaced by using recommended nand_scan() with attach_chip() callback * ECC is set to hardware by default, can be overriden by standard DT 'nand-ecc-*' properties (software Hamming or BCH are other options) This driver has been successfully tested on Netgear WNDR4300 running experimental ath79 OpenWrt master branch. Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl> [add reset control] Signed-off-by: David Bauer <mail@david-bauer.net>
* ar71xx/ath79: ag71xx: dont fetch the same var againKoen Vandeputte2019-08-271-1/+1
| | | | | | | tx_size was just declared above and set to BIT(tx->order) Use the declaration instead, which could avoid a pointer deref Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx/ath79: ag71xx: get ring_mask consistentKoen Vandeputte2019-08-271-1/+1
| | | | | | | | | All other instances of this identical declaration fetch the value directly from the ring_order. Also do it here. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx/ath79: ag71xx: init rings with GFP_KERNELKoen Vandeputte2019-08-091-1/+1
| | | | | | | | | | | | | | | Upstream commit 246902bdf562d45ea3475fac64c93048a7a39f01 Which contains following explanation: -- There is no need to use GFP_ATOMIC here, GFP_KERNEL should be enough. The 'kcalloc()' just a few lines above, already uses GFP_KERNEL. -- Looking at the code, all other descriptors also use plain GFP_KERNEL Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ar71xx/ath79: ag71xx: fix sleep in atomicKoen Vandeputte2019-08-091-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When enabling atomic-sleep-debugging options in the kernel, following splat is seen when disabling the interface (which happens on boot): [ 10.892878] eth0: link down [ 10.896788] BUG: sleeping function called from invalid context at net/core/dev.c:5563 [ 10.904730] in_atomic(): 1, irqs_disabled(): 1, pid: 425, name: ip [ 10.911004] 2 locks held by ip/425: [ 10.914539] #0: (rtnl_mutex){....}, at: [<80377474>] rtnetlink_rcv_msg+0x2d8/0x380 [ 10.922441] #1: (&(&ag->lock)->rlock){....}, at: [<80330158>] ag71xx_hw_disable+0x24/0x94 [ 10.930976] CPU: 0 PID: 425 Comm: ip Not tainted 4.14.136 #0 [ 10.936716] Stack : 805e0000 80589228 80557404 876998ec 80610000 80610000 87cdcafc 805b5327 [ 10.945233] 80551534 000001a9 8061386c 87699ccc 87cfb180 00000001 876998a0 84f70903 [ 10.953751] 00000000 00000000 80b00000 8769979c 6a7407fa 00000000 00000007 00000000 [ 10.962270] 000000b7 16d0954a 000000b6 00000000 80000000 87cb658c 87cb65b0 00000001 [ 10.970787] 8046f97c 87699ccc 87cfb180 87ff2810 00000003 802ce724 0806e098 80610000 [ 10.979306] ... [ 10.981797] Call Trace: [ 10.984287] [<8006cb0c>] show_stack+0x58/0x100 [ 10.988814] [<800aab34>] ___might_sleep+0x100/0x120 [ 10.993774] [<8035c434>] napi_disable+0x30/0xd8 [ 10.998377] [<80330198>] ag71xx_hw_disable+0x64/0x94 [ 11.003418] [<8033069c>] ag71xx_stop+0x24/0x38 [ 11.007959] [<80359e30>] __dev_close_many+0xcc/0x104 [ 11.013009] [<80362eac>] __dev_change_flags+0xc8/0x1ac [ 11.018227] [<80362fb8>] dev_change_flags+0x28/0x70 [ 11.023182] [<80376890>] do_setlink+0x31c/0x91c [ 11.027786] [<80379360>] rtnl_newlink+0x3ec/0x7f8 [ 11.032563] [<80377498>] rtnetlink_rcv_msg+0x2fc/0x380 [ 11.037799] [<8039a734>] netlink_rcv_skb+0xd4/0x178 [ 11.042754] [<80399d10>] netlink_unicast+0x168/0x250 [ 11.047796] [<8039a2d4>] netlink_sendmsg+0x3d8/0x434 [ 11.052841] [<8033f0e4>] ___sys_sendmsg+0x1dc/0x290 [ 11.057794] [<80340140>] __sys_sendmsg+0x54/0x84 [ 11.062495] [<8007212c>] syscall_common+0x34/0x58 This is caused by calling napi_disable() while holding the spinlock. Fix it by omitting the spinlock, which is not required here Extensively tested on GL-MiFi, RB-912 and RB-922 hardware Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ath79: support "rgmii-id" PHY mode in ag71xxDaniel Gimpelevich2019-07-171-0/+2
| | | | | | | The ag71xx code did not include a case for the "rgmii-id" PHY mode in the code. There are devices that need this mode, so I'm adding it. Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
* ath79: ag71xx: defer probe if of_phy_connect failedChuanhong Guo2019-06-051-2/+2
| | | | | | | | | gmac0 may need a phy on builtin switch, which can be unavailable if gmac0 is probed before builtin switch. Return -EPROBE_DEFER in this case so that gmac0 can be probed later. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: update ethtool supportPetr Štetiar2019-06-051-26/+14
| | | | | | | | | | | | ethtool doesn't work currently as phy_ethtool_ioctl expects user space pointer, but it's being passed kernel one. Fixing it doesn't make sense as {s,g}et_settings were deprecated anyway. So let's rather remove phy_ethtool_ioctl and use new {s,g}et_link_ksettings instead. While at it, update nway_reset as well. Cc: John Crispin <john@phrozen.org> Ref: https://bugs.openwrt.org/index.php?do=details&task_id=1982 Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: ag71xx: remove unused SIOCETHTOOL ioctl handlingPetr Štetiar2019-06-051-10/+1
| | | | | | | | | | | | | This ioctl is currently routed through generic interface code: dev_ioctl dev_ethtool __ethtool_get_link_ksettings phy_ethtool_ioctl Cc: John Crispin <john@phrozen.org> Cc: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: ag71xx: Enable tx hang workaround for the rest of ar724x SoCsPetr Štetiar2019-04-081-1/+8
| | | | | | | | | | | In ar71xx we check for stuck DMA on devices which fall in the is_ar724x SoC group (ar724x, ar933x, ar934x, qca9533, tp9343, qca955x, qca956x). In ath79 we're currently performing this check only for devices with ar7240 SoC, so this patch tries to sync the dma stuck checking behavior with what is being done in ar71xx. Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: ag71xx: remove switch driver in ag71xxChuanhong Guo2019-03-242-1345/+0
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: pass correct device pointer to dma functionsChuanhong Guo2019-03-241-7/+7
| | | | | | | | | linux 4.19 doesn't accept a NULL device for these functions. It also complains that the device struct in net_device doesn't have a dma_mask set. Pass the device struct from platform_device for these functions. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: add support for timer functions in linux 4.15+Chuanhong Guo2019-03-241-0/+10
| | | | | | | Kernel newer than 4.15 dropped "data" field and used from_timer to cast out the parent struct pointer for current timer. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Remove ndo_poll_controllerRosen Penev2019-03-131-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | It is unused by default and upstream is trying to remove it as it has negative effects when the driver is under load. Upstream explanation: netpoll: avoid capture effects for NAPI drivers As diagnosed by Song Liu, ndo_poll_controller() can be very dangerous on loaded hosts, since the cpu calling ndo_poll_controller() might steal all NAPI contexts (for all RX/TX queues of the NIC). This capture, showing one ksoftirqd eating all cycles can last for unlimited amount of time, since one cpu is generally not able to drain all the queues under load. It seems that all networking drivers that do use NAPI for their TX completions, should not provide a ndo_poll_controller() : Most NAPI drivers have netpoll support already handled in core networking stack, since netpoll_poll_dev( uses poll_napi(dev) to iterate through registered NAPI contexts for a device. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ath79: gmac: ar934x: Add parser for mii-gmac0-slavePetr Štetiar2019-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | While converting Nanostation M XW from current ar71xx code to ath79 I've hit one issue, where the ethernet networking wasn't working, so I was checking every bit in the networking setup path between ar71xx and ath79. I've came to the following code in ar71xx/mach-ubnt-xm.c: static void __init ubnt_xw_init(void) { ... ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0_SLAVE); ... } Where this code is setting AR934X_ETH_CFG_MII_GMAC0_SLAVE bit in AR934X_GMAC_REG_ETH_CFG register, but I couldn't find a way of setting this bit from DTS, so this patch adds `mii-gmac0-slave` DTS property which allows setting of this bit in `gmac-config`, which is then used in Nanostation M XW DTS. Tested-by: Joe Ayers <ae6xe@arrl.net> Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: ag71xx: add support for optional mdio resetChuanhong Guo2019-03-052-1/+8
| | | | | | | | | | | | | | | | | | | | | | On ar933x and later chips, there are separated mac/mdio resets, but resetting the entire gmac block with register values requires both mac_reset and mdio_reset to be asserted together. Add support for optional mdio reset so that we can do a full reset if needed. This patch also replaced deprecated devm_reset_control_get for mac reset. To use this feature, the following is needed: 1. drop "simple-mfd" compatible to register mdio0 after gmac init so that mdio registers aren't reset after initialization. 2. move mdio reset from mdio-bus to its parent eth node. NOTE: This can't be applied on gmac1 with builtin switch since we haven't add a feature to defer probe if phy connection failed. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: register mdio using of_platform_populateChuanhong Guo2019-03-051-5/+12
| | | | | | | remove the hacky checking of "simple-mfd" compatible also add some comments explaining that piece of code. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx-mdio: get reset control using devm apiChuanhong Guo2019-03-051-1/+1
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: replace alloc_etherdev with devm_alloc_etherdevChuanhong Guo2019-03-051-22/+11
| | | | | | | | using the devm api makes the code simpler. also drop unneeded memory free from ag71xx_remove since they are allocated using devm apis. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: replace ag71xx_get_phy_if_mode_name() with phy_modes()Chuanhong Guo2019-03-051-22/+2
| | | | | | | | | phy_modes() in phy.h can convert PHY modes to string with supports for all available PHY modes. Also add a space in mode printing to make it look better. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Fix tx queue timeouts during ifupPetr Štetiar2019-02-071-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ath79 and UBNT Bullet M XW (ar9342) I was experiencing weird issues during network setup[1] which I was able to reproduce easily with following commands: uci set network.lan.ipaddr='192.168.1.20' uci commit network ifup lan Which resulted after some time in: ... WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x16c/0x280 NETDEV WATCHDOG: eth0 (ag71xx): transmit queue 0 timed out ... Sometimes I wasn't able to use networking anymore, sometimes it was enough to just ifdown/ifup lan and network was backup. On ar71xx it was all working just fine. I've found out, that it was happening because ag71xx_poll() wasn't called, thus the TX queue wasn't emptied. The ag71xx_poll() is being called from napi hrtimer, which is enabled by napi_schedule() in ar71xx_interrupt(), but since no interrupts were ever fired again after ag71xx_stop() was called, it was always leading to tx queue timeouts: *** ag71xx_hard_start_xmit() eth0: packet injected into TX queue eth0: raw intr=00000001 TXPS POLL eth0: enable polling mode eth0: processing TX ring, flush=no eth0: disable polling mode, rx=1, tx=1,limit=32 ( `ifup lan done here` ) *** ag71xx_stop() *** ag71xx_open() *** ag71xx_hw_enable() IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready *** ag71xx_hard_start_xmit() eth0: packet injected into TX queue *** ag71xx_hard_start_xmit() eth0: packet injected into TX queue ... WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:320 dev_watchdog+0x164/0x274 So I've looked at ag71xx_stop() in ar71xx, added the missing bits to ath79 and fixed this issue. 1. https://github.com/openwrt/openwrt/pull/1635#issuecomment-448638246 Signed-off-by: Petr Štetiar <ynezz@true.cz> [move ag->link before ag71xx_hw_disable to retain ordering as original] Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ath79: ag71xx: preserve port mirror flags during swconfig applyMilan Krstic2019-01-221-0/+4
| | | | | | | | The swconfig load operation always triggers 'apply' function which in this driver currently clears port mirroring flags effectively undoing port mirroring configuration. Signed-off-by: Milan Krstic <milan.krstic@gmail.com>
* ath79: ag71xx: Fix code formatting in ag71xx_probePetr Štetiar2018-12-171-2/+2
| | | | Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: ag71xx: Unify debug output with ar71xx and make debugging easierPetr Štetiar2018-12-171-16/+32
| | | | | | | | | Currently it's quite hard to diff debugging output between ar71xx and ath79, so this patch tries to improve it by adding the same ag71xx_dump_regs function and placing debugging output from the registers to relatively same places. Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ath79: port cybertan_part from ar71xxChristian Lamparter2018-09-101-0/+163
| | | | | | | | | | | | | This patch ports the cybertan_part code from ar71xx and converts the driver to a DT-supported mtd parser. As a result, it will no longer add the u-boot, nvram and art partitions, which were never part of the special Cybertan header. Instead these partitions have to be specified in the DT, which has the upside of making it possible to add properties (i.e.: read-only), labels and references to these important partitions. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ath79: fix unaligned access panic in ag71xx_mdio_probeMatt Merhar2018-09-061-2/+2
| | | | | | | | | | | Without "syscon" being present in an ag71xx ethernet DT node's compatible property, a panic occurs at boot during probe citing "Unhandled kernel unaligned access". With this modification, the panic no longer occurs and instead the probe simply fails, allowing the boot process to continue. Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
* ath79: ag71xx: apply interface mode to MII0/1_CTRL on ar71xx/ar913xChuanhong Guo2018-08-282-0/+70
| | | | | | | | | | | | | We currently don't have any code configuring interface mode in ath79, meaning that we relies on bootloader to set the correct interface mode. This patch added code to set interface correctly so that everything works even if bootloader configures it wrong.(e.g. on WNDR3800 u-boot set the second GMAC mode to RMII but it should be RGMII.) Introduced "qca,mac-idx" for the difference in MII_CTRL register value. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344Christian Lamparter2018-08-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some AR9344 boards do very poorly with the default settings and need custom rxdv-delay, rxd-delay, txd-delay, txen-delay flags to perform reasonably. In this case the WD My Net Wi-Fi Range Extender can not even manage 10Mbps on a 1Gbit link: root@AR9344:~# iperf3 -s ----------------------------------------------------------- Server listening on 5201 ----------------------------------------------------------- Accepted connection from client [...] [ 5] local [...] connected to client [ ID] Interval Transfer Bitrate [ 5] 0.00-1.00 sec 1.09 MBytes 9.16 Mbits/sec [ 5] 1.00-2.00 sec 895 KBytes 7.33 Mbits/sec [ 5] 2.00-3.00 sec 762 KBytes 6.25 Mbits/sec [...] [ 5] 10.00-10.03 sec 17.0 KBytes 4.74 Mbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate [ 5] 0.00-10.03 sec 9.00 MBytes 7.52 Mbits/sec with but with the correct settings in place, it does much better: root@AR9344:~# iperf3 -s ----------------------------------------------------------- Server listening on 5201 ----------------------------------------------------------- Accepted connection from client [...] [ 5] local [...] connected to client [ ID] Interval Transfer Bitrate [ 5] 0.00-1.00 sec 23.1 MBytes 193 Mbits/sec [ 5] 1.00-2.00 sec 23.1 MBytes 194 Mbits/sec [ 5] 2.00-3.00 sec 23.2 MBytes 195 Mbits/sec [...] [ 5] 10.00-10.04 sec 710 KBytes 180 Mbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate [ 5] 0.00-10.04 sec 237 MBytes 198 Mbits/sec The tx data and enable delay bits definitions are taken from Atheros' AR9344 Data Sheet Section "8.6.1 Ethernet Configuration (ETH_CFG)" on page 153. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
* ath79: add QCA956x GMAC configDavid Bauer2018-08-131-0/+13
| | | | | | This commit adds the ability to configure the GMAC of the QCA956x. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: ag71xx: fix speed applied to MII0/1_CTRL on ar71xx/ar913xChuanhong Guo2018-08-131-2/+2
| | | | | | Currently speed value is applied to interface mode field. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: remove PHY resetChuanhong Guo2018-08-092-10/+0
| | | | | | | | | | | | Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET in datasheets will trigger either a reset for builtin switch or assert an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected to external PHY/switch. None of them should be triggered every time an interface is brought up in ethernet driver. Remove PHY reset support from ag71xx and definition for them in dtsi. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: assert a switch reset if defined in dts.Chuanhong Guo2018-07-301-0/+9
| | | | Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Explicitly register mdio bus after ag71xx_hw_init() for ar7240Chuanhong Guo2018-07-301-0/+8
| | | | | | | | | | mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?) Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0 For ar7240 and older chips, manually create platform device after ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between ag71xx_hw_init() and ag71xx_phy_connect(). Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Rework mdio clock settingsChuanhong Guo2018-07-301-26/+62
| | | | | | | Allow specifying desired mdio clock frequency in dts. Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Make builtin switch driver a separated moduleChuanhong Guo2018-07-302-68/+84
| | | | | | | | | This patch did several things: 1. Probe the builtin switch as a separated mdio device. 2. Register a separated mdio bus for builtin switch. 3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Split mdio driver into an independent platform device.Chuanhong Guo2018-07-304-84/+78
| | | | | | | We need to have mdio1 belonging to gmac1 initialized before gmac0. Split it into a separated mdio device to get both mdios ready before probing gmac. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Remove ar7240_set_addr and ag71xx_ar7240_startChuanhong Guo2018-07-303-29/+1
| | | | | | | | The builtin switch has it's initial valid mac address(00:00:01:00:00:00). Since the builtin switch is an independent device, setting mac address of gmac1 to builtin switch isn't a good idea and this makes it impossilbe to split builtin switch apart as an independent platform device. Remove these functions and apply default VLAN during initialization as a preparation for further driver splitting. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: ag71xx: Split gmac config into separated file and add support for ↵Chuanhong Guo2018-07-304-58/+116
| | | | | | ar934x/qca955x. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
* ath79: drop mv88e6063 switch driverMathias Kresin2018-07-041-289/+0
| | | | | | | | Due do a missing KCONFIG isn't selectable nor enabled in the target kernel config. Drop it for now and enable/add the driver at the time it is required. Signed-off-by: Mathias Kresin <dev@kresin.me>
* ath79: fix rx ring buffer stall qca956xLucian Cristian2018-06-181-1/+2
| | | | | | when ported from ar71xx to ath79 the qca9560-eth was omitted Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com>
* ath79: ag71xx: fix pll-data setting for ar7242/ar934x/qca955x/qca956xWeijie Gao2018-06-181-10/+7
| | | | | | | | | | | ar71xx/ar913x series use the old pll registers and settings. However started from ar7242, a new pll register is introduced and the pll setting is much simpler. This can be observed from dev-eth.c from the ar71xx target. Signed-off-by: Weijie Gao <hackpascal@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-29 20:27:22 +0000