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* ath79: increase SPI frequency for OCEDO boardsDavid Bauer2021-07-073-3/+3
| | | | | | | | | | The MX25L12805D used on all ath79 OCEDO boards supports clock speeds up to 50 MHz. Thus, we can increase the maximum SPI frequency the flash chip is controlled at to 50 MHz, increasing transfer speed. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: increase WS-AP3610 SPI frequencyDavid Bauer2021-07-071-1/+1
| | | | | | | | The M25P80 used on the Siemens WS-AP3610 supports clock speeds up to 54 MHz. Thus, we can safely increase the maximum SPI frequency the flash chip is controlled at to 50 MHz, increasing transfer speed. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: add support for Xiaomi AIoT Router AC2350Evgeniy Isaev2021-07-051-0/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device specifications * SoC: QCA9563 @ 775MHz (MIPS 74Kc) * RAM: 128MiB DDR2 * Flash: 16MiB SPI-NOR (EN25QH128) * Wireless 2.4GHz (SoC): b/g/n, 3x3 * Wireless 5Ghz (QCA9988): a/n/ac, 4x4 MU-MIMO * IoT Wireless 2.4GHz (QCA6006): currently unusable * Ethernet (AR8327): 3 LAN × 1GbE, 1 WAN × 1GbE * LEDs: Internet (blue/orange), System (blue/orange) * Buttons: Reset * UART: through-hole on PCB ([VCC 3.3v](RX)(GND)(TX) 115200, 8n1) * Power: 12VDC, 1,5A MAC addresses map (like in OEM firmware) art@0x0 88:C3:97:*:57 wan/label art@0x1002 88:C3:97:*:2D lan/wlan2g art@0x5006 88:C3:97:*:2C wlan5g Obtain SSH Access 1. Download and flash the firmware version 1.3.8 (China). 2. Login to the router web interface and get the value of `stok=` from the URL 3. Open a new tab and go to the following URL (replace <STOK> with the stok value gained above; line breaks are only for easier handling, please put together all four lines into a single URL without any spaces): http://192.168.31.1/cgi-bin/luci/;stok=<STOK>/api/misystem/set_config_iotdev ?bssid=any&user_id=any&ssid=-h%0Anvram%20set%20ssh_en%3D1%0Anvram%20commit %0Ased%20-i%20%27s%2Fchannel%3D.%2A%2Fchannel%3D%5C%5C%22debug%5C%5C%22%2F g%27%20%2Fetc%2Finit.d%2Fdropbear%0A%2Fetc%2Finit.d%2Fdropbear%20start%0A 4. Wait 30-60 seconds (this is the time required to generate keys for the SSH server on the router). Create Full Backup 1. Obtain SSH Access. 2. Create backup of all flash (on router): dd if=/dev/mtd0 of=/tmp/ALL.backup 3. Copy backup to PC (on PC): scp root@192.168.31.1:/tmp/ALL.backup ./ Tip: backup of the original firmware, taken three times, increases the chances of recovery :) Calculate The Password * Locally using shell (replace "12345/E0QM98765" with your router's serial number): On Linux printf "%s6d2df50a-250f-4a30-a5e6-d44fb0960aa0" "12345/E0QM98765" | \ md5sum - | head -c8 && echo On macOS printf "%s6d2df50a-250f-4a30-a5e6-d44fb0960aa0" "12345/E0QM98765" | \ md5 | head -c8 * Locally using python script (replace "12345/E0QM98765" with your router's serial number): wget https://raw.githubusercontent.com/eisaev/ax3600-files/master/scripts/calc_passwd.py python3.7 -c 'from calc_passwd import calc_passwd; print(calc_passwd("12345/E0QM98765"))' * Online https://www.oxygen7.cn/miwifi/ Debricking (lite) If you have a healthy bootloader, you can use recovery via TFTP using programs like TinyPXE on Windows or dnsmasq on Linux. To switch the router to TFTP recovery mode, hold down the reset button, connect the power supply, and release the button after about 10 seconds. The router must be connected directly to the PC via the LAN port. Debricking You will need a full dump of your flash, a CH341 programmer, and a clip for in-circuit programming. Install OpenWRT 1. Obtain SSH Access. 2. Create script (on router): echo '#!/bin/sh' > /tmp/flash_fw.sh echo >> /tmp/flash_fw.sh echo '. /bin/boardupgrade.sh' >> /tmp/flash_fw.sh echo >> /tmp/flash_fw.sh echo 'board_prepare_upgrade' >> /tmp/flash_fw.sh echo 'mtd erase rootfs_data' >> /tmp/flash_fw.sh echo 'mtd write /tmp/openwrt.bin firmware' >> /tmp/flash_fw.sh echo 'sleep 3' >> /tmp/flash_fw.sh echo 'reboot' >> /tmp/flash_fw.sh echo >> /tmp/flash_fw.sh chmod +x /tmp/flash_fw.sh 3. Copy `openwrt-ath79-generic-xiaomi_aiot-ac2350-squashfs-sysupgrade.bin` to the router (on PC): scp openwrt-ath79-generic-xiaomi_aiot-ac2350-squashfs-sysupgrade.bin \ root@192.168.31.1:/tmp/openwrt.bin 4. Flash OpenWRT (on router): /bin/ash /tmp/flash_fw.sh & 5. SSH connection will be interrupted - this is normal. 6. Wait for the indicator to turn blue. Signed-off-by: Evgeniy Isaev <isaev.evgeniy@gmail.com> [improve commit message formatting slightly] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: add support for TP-Link TL-WR941HP v1Diogenes Rengo2021-07-041-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: SOC: Qualcomm Atheros TP9343 (750 MHz) Flash: 8 Mb (GigaDevice GD25Q64CSIG) RAM: 64 Mb (Zentel A3R12E40DBF-8E) Serial: yes, 4-pin header Wlan: Qualcomm Atheros TP9343, antenna: MIM0 3x3:3 RP-SMA 3 x 2.4GHz power amp module Skyworks (SiGe) SE2576L Ethernet: Qualcomm Atheros TP9343 Lan speed: 100M ports: 4 Lan speed: 100M ports: 1 Other info: same case, ram and flash that TP-Link TL-WR841HP, different SOC https://forum.openwrt.org/t/adding-device-support-tp-link-wr941hp/ Label MAC addresses based on vendor firmware: LAN *:ee label WAN *:ef label +1 WLAN *:ee label The label MAC address found in "config" partition at 0x8 Flash instruction: Upload the generated factory firmware on web interface. Signed-off-by: Diogenes Rengo <rengocbx250@gmail.com> [remove various whitespace issues, squash commits, use short 0x0] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: add support for Ubiquiti PowerBeam M (XW)Russell Senior2021-07-041-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Ubiquiti PowerBeam M (XW), e.g. PBE-M5-400, a 802.11n wireless with a feed+dish form factor. This device was previously supported by the ar71xx loco-m-xw firmware. Specifications: - Atheros AR9342 SoC - 64 MB RAM - 8 MB SPI flash - 1x 10/100 Mbps Ethernet port, 24 Vdc PoE-in - Power and LAN green LEDs - 4x RSSI LEDs (red, orange, green, green) - UART (115200 8N1) Flashing via stock GUI: - Downgrade to AirOS v5.5.x (latest available is 5.5.10-u2) first (see https://openwrt.org/toh/ubiquiti/powerbeam installation instructions) - Upload the factory image via AirOS web GUI. Flashing via TFTP: - Use a pointy tool (e.g., unbent paperclip) to keep the reset button pressed. - Power on the device (keep reset button pressed). - Keep pressing until LEDs flash alternatively LED1+LED3 => LED2+LED4 => LED1+LED3, etc. - Release reset button. - The device starts a TFTP server at 192.168.1.20. - Set a static IP on the computer (e.g., 192.168.1.21/24). - Upload via tftp the factory image: $ tftp 192.168.1.20 tftp> bin tftp> trace tftp> put openwrt-ath79-generic-xxxxx-ubnt_powerbeam-m-xw-squashfs-factory.bin WARNING: so far, no non-destructive method has been discovered for opening the enclosure to reach the serial console. Internal photos are available here: https://fcc.io/SWX-NBM5HP Signed-off-by: Russell Senior <russell@personaltelco.net>
* ath79: resolve GPIO address conflictsDavid Bauer2021-07-015-5/+5
| | | | | | | | | | | | | | | The ar71xx GPIO driver only uses 0x24 registers, all following GPIO registers are using to control pinmux functions, which are not handles by the GPIO driver but the generic Linux pinctrl driver. For some SoC conflicting address ranges were defined for these (AR7240 & AR9330). Resolve these cases and align the address space of the GPIO controller between all SoCs, as the used address space of the driver is identical for all these. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: mikrotik: fix beeper phantom noise on RB912Koen Vandeputte2021-07-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Analysis done by Denis Kalashnikov: It seems that some ROS versions on some routerboard models have this bug: after silence boot (no output to uart, no beeps) beeper clicks when wireless traffic is. https://forum.mikrotik.com/viewtopic.php?f=3&t=92269 https://forum.mikrotik.com/viewtopic.php?t=63399 From these links: 1) Hello, I have RB951G-2HnD and I noticed strange thing when I loaded the device with some wireless traffic it produced strange sound - like hissing, fizzing etc. 2) Same problem still on 6.33, with silent boot enabled I hear buzzing noise on wireless load. 3) The sound is fixed in v5.19, it was a bug that caused beeper to make clicks. It also got fixed in RouterOS: * What's new in 5.19 (2012-Jul-16 10:51): fix ticking sound on RB411UAHL; * What's new in 6.38.3 (2017-Feb-07 09:52): rb3011 - fixed noise from buzzer after silent boot; I've checked with an oscilloscope that: * When on the ssr beeper pin is 0, on the beeper itself is 1 (~5V), and when on the ssr beeper pin is 1, on the beeper is 0 The beeper doesn't consume power, so 1 should be a default/idle value for the ssr beeper pin). * When there is wireless traffic (ping packets) in the background and the beeper clicks, I see pulses on the beeper itself, but no pulses on the ssr beeper pin (Q5 pin of 74hc595). When I manually toggle the ssr beeper pin I see pulses on both. So, it is likely that the phantom beeper clicks are caused by the EMI. Suggested-by: Denis Kalashnikov <denis281089@gmail.com> Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* ath79: add support for Teltonika RUT230 v1David Bauer2021-06-301-0/+193
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for the Teltonika RUT230 v1, a Atheros AR9331 based router with a Quectel UC20 UMTS modem. Hardware -------- Atheros AR9331 16 MB SPI-NOR XTX XT25F128B 64M DDR2 memory Atheros AR9331 1T1R 802.11bgn Wireless Boootloader: pepe2k U-Boot mod Hardware-Revision ----------------- There are two board revisions of the RUT230, a v0 and v1. A HW version is silkscreened on the top of the PCBs front side as well as shown in the Teltonika UI. However, this looks to be a different identifier, as the GPl dump shows this silkscreened / UI shown version are internally treated identically. Th following mapping has been obtained from the latest GPl dump. HW Ver 01 - 04 --> v0 HW Ver > 05 --> v1 My board was a HW Ver 09 and is treated as a v1. Installation ------------ While attaching power, hold down the reset button and release it after the signal LEDs flashed 3 times. Attach your Computer with the devices LAN port and assign yourself the IPv4 address 192.168.1.10/24. Open a web browser, navigate to 192.168.1.1. Upload the OpenWrt factory image. The device will install OpenWrt and automatically reboots afterwards. You can use the smae procedure with the stock firmware to return back to the vendor firmware. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: add support for MikroTik RouterBOARD 912UAG-2HPnDDenis Kalashnikov2021-06-211-0/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has been supported in the ar71xx. Links: * https://mikrotik.com/product/RB912UAG-2HPnD * https://openwrt.org/toh/hwdata/mikrotik/mikrotik_rb912uag-2hpnd This also supports the 5GHz flavour of the board. Hardware: * SoC: Atheros AR9342, * RAM: DDR 64MB, * SPI NOR: 64KB, * NAND: 128MB, * Ethernet: x1 10/100/1000 port with passive POE in, * Wi-Fi: 802.11 b/g/n, * PCIe, * USB: 2.0 EHCI controller, connected to mPCIe slot and a Type-A port -- both can be used for LTE modem, but only one can be used at any time. * LEDs: 5 general purpose LEDs (led1..led5), power LED, user LED, Ethernet phy LED, * Button, * Beeper. Not working: * Button: it shares gpio line 15 with NAND ALE and NAND IO7, and current drivers doesn't easily support this configuration, * Beeper: it is connected to bit 5 of a serial shift register (tested with sysfs led trigger timer). But kmod-gpio-beeper doesn't work -- we left this as is for now. Flashing: * Use the RouterBOARD Reset button to enable TFTP netboot, boot kernel and initramfs and then perform sysupgrade. * From ar71xx OpenWrt firmware run: $ sysupgrade -F /tmp/<sysupgrade.bin> For more info see: https://openwrt.org/toh/mikrotik/common. Co-Developed-by: Koen Vandeputte <koen.vandeputte@citymesh.com> Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Signed-off-by: Denis Kalashnikov <denis281089@gmail.com>
* ath79: add support for TP-Link TL-WR841HP v3Andy Lee2021-06-131-0/+146
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: - QCA9533 SoC, 8 MB nor flash, 64 MB DDR2 RAM - 2x2 9dBi antenna, wifi 2.4Ghz 300Mbps - 4x Ethernet LAN 10/100, 1x Ethernet WAN 10/100 - 1x WAN, LAN, Wifi, PWR, WPS, RE Leds - Reset, Wifi on/off, WPS, RE buttons - Serial UART at J4 onboard: 3.3v GND RX TX, 1152008N1 Label MAC addresses based on vendor firmware: LAN *:ea label WAN *:eb label +1 2.4 GHz *:ea label The label MAC address in found in u-boot 0x1fc00 Installation: Upload openwrt-ath79-generic-tplink_tl-wr841hp-v3-squashfs-factory.bin from stock firmware webgui. Maybe we need rename to shorten file name due to stock webgui error. Revert back to stock firmware instructions: - set your PC to static IP address 192.168.0.66 netmask 255.255.255.0 - download stock firmware from Tp-link website - put it in the root directory of tftp server software - rename it to wr841hpv3_tp_recovery.bin - power on while pressing Reset button until any Led is lighting up - wait for the router to reboot. done Forum support topic: https://forum.openwrt.org/t/support-for-tp-link-tl-wr841hp-v3-router Signed-off-by: Andy Lee <congquynh284@yahoo.com> [rebase and squash] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range ExtenderJonathan A. Kollasch2021-06-071-2/+2
| | | | | | | | | | | This replaces the register bits for RGMII delay on the MAC side in favor of having the RGMII delay on the PHY side by setting the phy-mode property to rgmii-id (RGMII internal delay), which is supported by the at803x driver. Speed 1000 is fixed as a result, so now all ethernet speeds function. Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Michael Pratt <mcpratt@pm.me>
* ath79: Support for Ubiquiti Rocket 5AC LiteNick Hainke2021-06-071-0/+38
| | | | | | | | | | | | | | | | | | | The Ubiquiti Rocket 5AC Lite (R5AC-Lite) is an outdoor router. Specifications: - SoC: Qualcomm Atheros QCA9558 - RAM: 128 MB - Flash: 16 MB SPI - Ethernet: 1x 10/100/1000 Mbps - WiFi 5 GHz: QCA988x - Buttons: 1x (reset) - LEDs: 1x power, 1x Ethernet, 4x RSSI Installation: - Instructions for XC-type Ubiquiti: https://openwrt.org/toh/ubiquiti/common Signed-off-by: Nick Hainke <vincent@systemli.org>
* ath79: add support for NEC Aterm WF1200CRINAGAKI Hiroshi2021-06-061-0/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NEC Aterm WF1200CR is a 2.4/5 GHz band 11ac (Wi-Fi 5) router, based on QCA9561. Specification: - SoC : Qualcomm Atheros QCA9561 - RAM : DDR2 128 MiB (W971GG6SB-25) - Flash : SPI-NOR 8 MiB (MX25L6433FM2I-08G) - WLAN : 2.4/5 GHz 2T2R - 2.4 GHz : QCA9561 (SoC) - 5 GHz : QCA9888 - Ethernet : 2x 10/100 Mbps - Switch : QCA9561 (SoC) - LEDs/Keys : 8x/3x (2x buttons, 1x slide-switch) - UART : through-hole on PCB - JP1: Vcc, GND, NC, TX, RX from "JP1" marking - 115200n8 - Power : 12 VDC, 0.9 A Flash instruction using factory image (stock: < v1.3.2): 1. Boot WF1200CR normally with "Router" mode 2. Access to "http://192.168.10.1/" and open firmware update page ("ファームウェア更新") 3. Select the OpenWrt factory image and click update ("更新") button to perform firmware update 4. Wait ~150 seconds to complete flashing Alternate flash instruction using initramfs image (stock: >= v1.3.2): 1. Prepare the TFTP server with the IP address 192.168.1.10 and place the OpenWrt initramfs image to the TFTP directory with the name "0101A8C0.img" 2. Connect serial console to WF1200CR 3. Boot WF1200CR and interrupt with any key after the message "Hit any key to stop autoboot: 2", the U-Boot starts telnetd after the message "starting telnetd server from server 192.168.1.1" 4. login the telnet (address: 192.168.1.1) 5. Perform the following commands to modify "bootcmd" variable temporary and check the value (to ignore the limitation of available commands, "tp; " command at the first is required as dummy, and the output of "printenv" is printed on the serial console) tp; set bootcmd 'set autostart yes; tftpboot' tp; printenv 6. Save the modified variable with the following command and reset device tp; saveenv tp; reset 7. The U-Boot downloads initramfs image from TFTP server and boots it 8. On initramfs image, download the sysupgrade image to the device and perform the following commands to erase stock firmware and sysupgrade mtd erase firmware sysupgrade <sysupgrade image> 9. After the rebooting by completion of sysupgrade, start U-Boot telnetd and login with the same way above (3, 4) 10. Perform the following commands to reset "bootcmd" variable to the default and reset the device tp; run seattle tp; reset (the contents of "seattle": setenv bootcmd 'bootm 0x9f070040' && saveenv) 11. Wait booting-up the device Known issues: - the following 6x LEDs are connected to the gpio controller on QCA9888 chip and the implementation of control via the controller is missing in ath10k/ath10k-ct - "ACTIVE" (Red/Green) - "2.4GHz" (Red/Green) - "5GHz" (Red/Green) Note: - after the version v1.3.2 of stock firmware, "offline update" by uploading image by user is deleted and the factory image cannot be used - the U-Boot on WF1200CR doesn't configure the port-side LEDs on WAN/LAN and the configuration is required on OpenWrt - gpio-hog: set the direction of GPIO 14(WAN)/19(LAN) to output - pinmux: set GPIO 14/19 as switch-controlled LEDs Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
* ath79: add support for Devolo dLAN pro 1200+ WiFi acFelix Matouschek2021-06-063-166/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Devolo dLAN pro 1200+ WiFi ac. This device is a plc wifi AC2400 router/extender with 2 Ethernet ports, has a QCA7500 PLC and uses the HomePlug AV2 standard. Other than the PLC the hardware is identical to the Devolo Magic 2 WIFI. Therefore it uses the same dts, which was moved to a dtsi to be included by both boards. This is a board that was previously included in the ar71xx tree. Hardware: SoC: AR9344 CPU: 560 MHz Flash: 16 MiB (W25Q128JVSIQ) RAM: 128 MiB DDR2 Ethernet: 2xLAN 10/100/1000 PLC: QCA75000 (Qualcomm HPAV2) PLC Uplink: 1Gbps MIMO PLC Link: RGMII 1Gbps (WAN) WiFi: Atheros AR9340 2.4GHz 802.11bgn Atheros AR9882-BR4A 5GHz 802.11ac Switch: QCA8337, Port0:CPU, Port2:PLC, Port3:LAN1, Port4:LAN2 Button: 3x Buttons (Reset, wifi and plc) LED: 3x Leds (wifi, plc white, plc red) GPIO Switch: 11-PLC Pairing (Active Low) 13-PLC Enable 21-WLAN power MACs Details verified with the stock firmware: Radio1: 2.4 GHz &wmac *:4c Art location: 0x1002 Radio0: 5.0 GHz &pcie *:4d Art location: 0x5006 Ethernet &ethernet *:4e = 2.4 GHz + 2 PLC uplink --- *:4f = 2.4 GHz + 3 Label MAC address is from PLC uplink The Powerline (PLC) interface of the dLAN pro 1200+ WiFi ac requires 3rd party firmware which is not available from standard OpenWrt package feeds. There is a package feed on github which you must add to OpenWrt buildroot so you can build a firmware image which supports the plc interface. See: https://github.com/0xFelix/dlan-openwrt (forked from Devolo and added compatibility for OpenWrt 21.02) Flash instruction (TFTP): 1. Set PC to fixed ip address 192.168.0.100 2. Download the sysupgrade image and rename it to uploadfile 3. Start a tftp server with the image file in its root directory 4. Turn off the router 5. Press and hold Reset button 6. Turn on router with the reset button pressed and wait ~15 seconds 7. Release the reset button and after a short time the firmware should be transferred from the tftp server 8. Allow 1-2 minutes for the first boot. Signed-off-by: Felix Matouschek <felix@matouschek.org> [add "plus" to compatible and device name] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: use dynamic partitioning for TP-Link CPE seriesMichael Pratt2021-06-051-14/+4
| | | | | | | | | | | | | | | | | | | | | | | | | CPExxx and WBSxxx boards with AR9344 SOC use the OKLI lzma kernel loader with the offset of 3 blocks of length 4k (0x3000) in order to have a fake "kernel" that cannot grow larger than how it is defined in the now static OEM partition table. Before recent changes to the mtdsplit driver, the uImage parser for OKLI only supported images that started exactly on an eraseblock boundary. The mtdsplit parser for uImage now supports identifying images with any magic number value and at any offset from the eraseblock boundary using DTS properties to define those values. So, it is no longer necessary to use fixed sizes for kernel and rootfs Tested-by: Andrew Cameron <apcameron@softhome.net> [CPE510 v2] Tested-by: Bernhard Geier <freifunk@geierb.de> [WBS210 v2] Tested-by: Petrov <d7c48mWsPKx67w2@gmail.com> [CPE210 v1] Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: add support for Qualcomm AP143 reference boardsZoltan HERPAI2021-06-053-0/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: SoC: QCA9533 DRAM: 32Mb DDR1 Flash: 8/16Mb SPI-NOR LAN: 4x 10/100Mbps via AR8229 switch (integrated into SoC) on GMII WAN: 1x 10/100Mbps via MII WLAN: QCA9530 USB: 1x 2.0 UART: standard QCA UART header JTAG: yes Button: 1x WPS, 1x reset LEDs: 8x LEDs A version with 4Mb flash is also available, but due to lack of enough space it's not supported. As the original flash layout does not provide enough space for the kernel (1472k), the firmware uses OKLI and concat flash to overcome the limitation without changing the boot address of the bootloaders. Installation: 1. Original bootloader Connect the board to ethernet Set up a server with an IP address of 192.168.1.10 Make the openwrt-ath79-generic-qca_ap143-8m-squashfs-factory.bin available via TFTP tftpboot 0x80060000 openwrt-ath79-generic-qca_ap143-8m-squashfs-factory.bin erase 0x9f050000 +$filesize cp.b $fileaddr 0x9f050000 $filesize Reboot the board. 2. pepe2k's u-boot_mod Connect the board to ethernet Set up a server with an IP address of 192.168.1.10 Make the openwrt-ath79-generic-qca_ap143-8m-squashfs-factory.bin available via TFTP, as "firmware.bin" run fw_upg Reboot the board. For the 16M version of the board, please use openwrt-ath79-generic-qca_ap143-16m-squashfs-factory.bin Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> [use fwconcatX names, drop redundant uart status, fix IMAGE_SIZE, set up IMAGE/factory.bin without metadata] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: Add support for OpenMesh A40Sven Eckelmann2021-06-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device specifications: ====================== * Qualcomm/Atheros QCA9558 ver 1 rev 0 * 720/600/240 MHz (CPU/DDR/AHB) * 128 MB of RAM * 16 MB of SPI NOR flash - 2x 7 MB available; but one of the 7 MB regions is the recovery image * 2T2R 2.4 GHz Wi-Fi (11n) * 2T2R 5 GHz Wi-Fi (11ac) * multi-color LED (controlled via red/green/blue GPIOs) * 1x GPIO-button (reset) * external h/w watchdog (enabled by default)) * TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX) * 2x ethernet - eth0 + Label: Ethernet 1 + AR8035 ethernet PHY (RGMII) + 10/100/1000 Mbps Ethernet + 802.3af POE + used as WAN interface - eth1 + Label: Ethernet 2 + AR8035 ethernet PHY (SGMII) + 10/100/1000 Mbps Ethernet + used as LAN interface * 1x USB * internal antennas Flashing instructions: ====================== Various methods can be used to install the actual image on the flash. Two easy ones are: ap51-flash ---------- The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be used to transfer the image to the u-boot when the device boots up. initramfs from TFTP ------------------- The serial console must be used to access the u-boot shell during bootup. It can then be used to first boot up the initramfs image from a TFTP server (here with the IP 192.168.1.21): setenv serverip 192.168.1.21 setenv ipaddr 192.168.1.1 tftpboot 0c00000 <filename-of-initramfs-kernel>.bin && bootm $fileaddr The actual sysupgrade image can then be transferred (on the LAN port) to the device via scp <filename-of-squashfs-sysupgrade>.bin root@192.168.1.1:/tmp/ On the device, the sysupgrade must then be started using sysupgrade -n /tmp/<filename-of-squashfs-sysupgrade>.bin Signed-off-by: Sven Eckelmann <sven@narfation.org>
* ath79: Add support for OpenMesh A60Sven Eckelmann2021-06-052-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device specifications: ====================== * Qualcomm/Atheros QCA9558 ver 1 rev 0 * 720/600/240 MHz (CPU/DDR/AHB) * 128 MB of RAM * 16 MB of SPI NOR flash - 2x 7 MB available; but one of the 7 MB regions is the recovery image * 3T3R 2.4 GHz Wi-Fi (11n) * 3T3R 5 GHz Wi-Fi (11ac) * multi-color LED (controlled via red/green/blue GPIOs) * 1x GPIO-button (reset) * external h/w watchdog (enabled by default)) * TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX) * 2x ethernet - eth0 + Label: Ethernet 1 + AR8035 ethernet PHY (RGMII) + 10/100/1000 Mbps Ethernet + 802.3af POE + used as WAN interface - eth1 + Label: Ethernet 2 + AR8031 ethernet PHY (SGMII) + 10/100/1000 Mbps Ethernet + used as LAN interface * 1x USB * internal antennas Flashing instructions: ====================== Various methods can be used to install the actual image on the flash. Two easy ones are: ap51-flash ---------- The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be used to transfer the image to the u-boot when the device boots up. initramfs from TFTP ------------------- The serial console must be used to access the u-boot shell during bootup. It can then be used to first boot up the initramfs image from a TFTP server (here with the IP 192.168.1.21): setenv serverip 192.168.1.21 setenv ipaddr 192.168.1.1 tftpboot 0c00000 <filename-of-initramfs-kernel>.bin && bootm $fileaddr The actual sysupgrade image can then be transferred (on the LAN port) to the device via scp <filename-of-squashfs-sysupgrade>.bin root@192.168.1.1:/tmp/ On the device, the sysupgrade must then be started using sysupgrade -n /tmp/<filename-of-squashfs-sysupgrade>.bin Signed-off-by: Sven Eckelmann <sven@narfation.org>
* ath79: add support for ZiKing CPE46BGiulio Lorenzo2021-05-171-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZiKing CPE46B is a POE outdoor 2.4ghz device with an integrated directional antenna. It is low cost and mostly available via Aliexpress, references can be found at: - https://forum.openwrt.org/t/anddear-ziking-cpe46b-ar9331-ap121/60383 - https://git.lsd.cat/g/openwrt-cpe46b Specifications: - Atheros AR9330 - 32MB of RAM - 8MB of flash (SPI NOR) - 1 * 2.4ghz integrated antenna - 2 * 10/100/1000 ethernet ports (1 POE) - 3 * Green LEDs controlled by the SoC - 3 * Green LEDs controlled via GPIO - 1 * Reset Button controlled via GPIO - 1 * 4 pin serial header on the PCB - Outdoor packaging Flashing instruction: You can use sysupgrade image directly in vendor firmware which is based on OpenWrt/LEDE. In case of issues with the vendor GUI, the vendor Telnet console is vulnerable to command injection and can be used to gain a shell directly on the OEM OpenWrt distribution. Signed-off-by: Giulio Lorenzo <salveenee@mortemale.org> [fix whitespaces, drop redundant uart status and serial0, drop num-chipselects, drop 0x1002 MAC address for wmac] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: add support for COMFAST CF-E375ACJoao Henrique Albuquerque2021-05-171-0/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | COMFAST CF-E375AC is a ceiling mount AP with PoE support, based on Qualcomm/Atheros QCA9563 + QCA9886 + QCA8337. Short specification: 2x 10/100/1000 Mbps Ethernet, with PoE support 128MB of RAM (DDR2) 16 MB of FLASH 3T3R 2.4 GHz, 802.11b/g/n 2T2R 5 GHz, 802.11ac/n/a, wave 2 built-in 5x 3 dBi antennas output power (max): 500 mW (27 dBm) 1x RGB LED, 1x button built-in watchdog chipset Flash instruction: 1) Original firmware is based on OpenWrt. Use sysupgrade image directly in vendor GUI. 2) TFTP 2.1) Set a tftp server on your machine with a fixed IP address of 192.168.1.10. A place the sysupgrade as firmware_auto.bin. 2.2) boot the device with an ethernet connection on fixed ip route 2.3) wait a few seconds and try to login via ssh 3) TFTP trough Bootloader 3.1) open the device case and get a uart connection working 3.2) stop the autoboot process and test connection with serverip 3.3) name the sysupgrade image firmware.bin and run firmware_upg MAC addresses: Though the OEM firmware has four adresses in the usual locations, it appears that the assigned addresses are just incremented in a different way: interface address location LAN: *:DC 0x0 WAN *:DD 0x1002 WLAN 2.4g *:E6 n/a (0x0 + 10) WLAN 5g *:DE 0x6 unused *:DF 0x5006 The MAC address pointed at the label is the one assign to the LAN interface. Signed-off-by: Joao Henrique Albuquerque <joaohccalbu@gmail.com> [add label-mac-device, remove redundant uart status, fix whitespace issues, fix commit message wrapping, remove x bit on DTS file] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: drop cs-gpios propertyDavid Bauer2021-05-014-7/+0
| | | | | | | | | The spi-ath79 driver performs the chipselect by writing to dedicated register in the SPI register block. So the GPIO numbers were not used. Tested-on: Enterasys WS-AP3705i Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: mikrotik: enable SFP on RB922UAGS-5HPaCDRoger Pueyo Centelles2021-04-161-0/+48
| | | | | | | | | | | | | | | | This patch enables the SFP cage on the MikroTik RouterBOARD 922UAGS-5HPacD. GPIO16 (tx-disable-gpios) should be governed by the SFP driver to enable or disable transmission, but no change is observed. Therefore, it is left as output high to ensure the SFP module is forced to transmit. Tested on a RouterBOARD 922UAGS-5HPacD board, with a CISCO GLC-LH-SMD 1310nm module and an unbranded GLC-T RJ45 Gigabit module. PC=>router iperf3 tests deliver 440/300 Mbps up/down, both via regular eth0 port or SFP port with RJ45 module. Bridge between eth0 and eth1 delivers 950 Mbps symmetric. Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
* ath79: fix 10 Mbit PLL data for TP-Link EAP2xxDavid Bauer2021-04-151-0/+1
| | | | | | | | | | | Fix the PLL register value for 10 Mbit/s link modes on TP-Link EAP boards using a AR8033 SGMII PHY. Otherwise, 10 Mbit/s links do not transfer data. Reported-by: Tom Herbers <freifunk@tomherbers.de> Tested-by: Tom Herbers <freifunk@tomherbers.de> Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: fix 10 Mbit PLL data for UniFi ACDavid Bauer2021-04-151-0/+2
| | | | | | | Fix the PLL register value for 10 Mbit/s link modes on the UniFi AC Lite / Mesh / LR. Otherwise, 10 Mbit/s links do not transfer data. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: mikrotik: enable 2nd USB on RouterBOARD 922UAGS-5HPacDKoen Vandeputte2021-04-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RB922 boards have 2 separate USB controllers: - 1 is connected to Slot Type A - 1 is connected to the mini PCIe port Enable the 2nd one too. Before: [ 5.339304] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 5.355053] SCSI subsystem initialized [ 5.364184] ehci-fsl: Freescale EHCI Host controller driver [ 5.372377] ehci-platform: EHCI generic platform driver [ 5.378053] ehci-platform 1b000000.usb: EHCI Host Controller [ 5.383861] ehci-platform 1b000000.usb: new USB bus registered, assigned bus number 1 [ 5.391932] ehci-platform 1b000000.usb: irq 14, io mem 0x1b000000 [ 5.410730] ehci-platform 1b000000.usb: USB 2.0 started, EHCI 1.00 [ 5.417739] hub 1-0:1.0: USB hub found [ 5.422280] hub 1-0:1.0: 1 port detected [ 5.434007] usbcore: registered new interface driver usb-storage After: [ 5.342988] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 5.358687] SCSI subsystem initialized [ 5.367813] ehci-fsl: Freescale EHCI Host controller driver [ 5.375998] ehci-platform: EHCI generic platform driver [ 5.381695] ehci-platform 1b000000.usb: EHCI Host Controller [ 5.387507] ehci-platform 1b000000.usb: new USB bus registered, assigned bus number 1 [ 5.395571] ehci-platform 1b000000.usb: irq 14, io mem 0x1b000000 [ 5.416050] ehci-platform 1b000000.usb: USB 2.0 started, EHCI 1.00 [ 5.423089] hub 1-0:1.0: USB hub found [ 5.427578] hub 1-0:1.0: 1 port detected [ 5.432432] ehci-platform 1b400000.usb: EHCI Host Controller [ 5.438254] ehci-platform 1b400000.usb: new USB bus registered, assigned bus number 2 [ 5.446325] ehci-platform 1b400000.usb: irq 15, io mem 0x1b400000 [ 5.468049] ehci-platform 1b400000.usb: USB 2.0 started, EHCI 1.00 [ 5.475082] hub 2-0:1.0: USB hub found [ 5.479574] hub 2-0:1.0: 1 port detected [ 5.491305] usbcore: registered new interface driver usb-storage Fixes: 8f93c05a59 ("ath79: add support for MikroTik RouterBOARD 922UAGS-5HPacD") Signed-off-by: Koen Vandeputte <koen.vandeputte@citymesh.com>
* ath79: increase max SPI clock for DIR-859 A1Jan Forman2021-04-101-1/+1
| | | | | | | | Increase the spi-max frequency to 50 MHz, similar to the DIR-842. Signed-off-by: Jan Forman <forman.jan96@gmail.com> [improve commit title, fix commit message alignment] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: move pcie node to DTSI for qca955x Senao APsMichael Pratt2021-04-084-29/+9
| | | | | | | | | | pcie0 is the same for this generation of Senao APs while eth0, eth1, and wmac can differ the qca,no-eeprom property has no effect for the ath10k drivers Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: cleanup DTS for ALLNET ALL-WAP02860ACMichael Pratt2021-04-081-92/+17
| | | | | | | | | | | | | | | | | | | | | | | | | use qca955x_senao_loader.dtsi because it is the same hardware / partitioning and some cleanup Effects: nodes to match similar boards - keys - eth0 - pcie0 bumps SPI frequency to 40 MHz removes &pll node: the property is defined in qca955x.dtsi removes qca,no-eeprom: has no effect with mtd-cal-data property (also spelling) Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: add factory.bin for ALLNET ALL-WAP02860ACMichael Pratt2021-04-081-3/+32
| | | | | | | | | | | | | | | This device is a Senao-based product using hardware and software from Senao with the tar-gz platform for factory.bin and checksum verification at boot time using variables stored in uboot environment and a 'failsafe' image when it fails. Extremely similar hardware/software to Engenius EAP1200H and other Engenius APs with qca955x Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: add Senao 'failsafe' sysupgrade procedureMichael Pratt2021-04-084-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a similar upgrade method for sysupgrade.bin, like factory.bin, for Senao boards with the tar.gz OEM upgrade platform, and 'failsafe' image which is loaded on checksum failure. This is inspired by the OEM upgrade script /etc/fwupgrade.sh and the existing platforms for dual-boot Senao boards. Previously, if the real kernel was damaged or missing the only way to recover was with UART serial console, because the OKLI lzma-loader is programmed to halt. uboot did not detect cases where kernel or rootfs is damaged and boots OKLI instead of the failsafe image, because the checksums stored in uboot environment did not include the real kernel and rootfs space. Now, the stored checksums include the space for both the lzma-loader, kernel, and rootfs. Therefore, these boards are now practically unbrickable. Also, the factory.bin and sysupgrade.bin are now the same, except for image metadata. This allows for flashing OEM image directly from openwrt as well as flashing openwrt image directly from OEM. Make 'loader' partition writable so that it can be updated during a sysupgrade. tested with ENS202EXT v1 EAP1200H EAP350 v1 EAP600 ECB350 v1 ECB600 ENH202 v1 Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: adjust ath79/tiny Senao APs to 4k blocksizeMichael Pratt2021-04-085-3/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ath79/tiny kernel config has CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y from commit 05d35403b211ccb9bf20e2b3c0b7a30c82c6d6a2 Because of this, these changes are required for 2 reasons: 1. Senao devices in ath79/tiny with a 'failsafe' partition and the tar.gz sysupgrade platform and a flash chip that supports 4k sectors will fail to reboot to openwrt after a sysupgrade. the stored checksum is made with the 64k blocksize length of the image to be flashed, and the actual checksum changes after flashing due to JFFS2 space being formatted within the length of the rootfs from the image example: 0x440000 length of kernel + rootfs (from sysupgrade.bin) 0x439000 offset of rootfs_data (from kernel log) 2. for boards with flash chips that support 4k sectors: saving configuration over sysupgrade is not possible because sysupgrade.tgz is appended at a 64k boundary and the mtd parser starts JFFS2 at a 4k boundary. for boards with flash chips that do not support 4k sectors: partitioning with 4k boundaries causes a boot loop from the mtd parser not finding kernel and rootfs. Also: Some of the Senao boards that belong in ath79/tiny, for example ENH202, have a flash chip that does not support 4k sectors (no SECT_4K symbol in upstream source). Because of this, partitioning must be different for these devices depending on the flash chip model detected by the kernel. Therefore: this creates 2 DTSI files to replace the single one with 64k partitioning for 4k and 64k partitioning respectively. Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: remove 'fakeroot' for Senao devicesMichael Pratt2021-04-083-27/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By using the same custom kernel header magic in both OKLI lzma-loader, DTS, and makefile this hack is not necessary anymore However, "rootfs" size and checksum must now be supplied by the factory.bin image through a script that is accepted by the OEM upgrade script. This is because Senao OEM scripts assume a squashfs header exists at the offset for the original "rootfs" partition which is actually the kernel + rootfs in this implementation, and takes size value from the header that would be there with hexdump, but this offset is now the uImage header instead. This frees up 1 eraseblock previously used by the "fakeroot" partition for bypassing the OEM image verification. Also, these Senao devices with a 'failsafe' partition and the tar-gz factory.bin platform would otherwise require flashing the new tar-gz sysupgrade.bin afterward. So this also prevents having to flash both images when starting from OEM or 'failsafe' the OEM upgrade script verifies the header magic numbers, but only the first two bytes. Example: [ "${magic_word_kernel}" = "2705" ] && [ "${magic_word_rootfs}" = "7371" -o "${magic_word_rootfs}" = "6873" ] && errcode="0" therefore picked the magic number 0x73714f4b which is 'sqOK' Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: Add support for Buffalo WZR-HP-G300NHMauri Sandberg2021-03-223-0/+301
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This device is a wireless router working on 2.4GHz band based on Qualcom/Atheros AR9132 rev 2 SoC and is accompanied by Atheros AR9103 wireless chip and Realtek RTL8366RB/S switches. Due to two different switches being used also two different devices are provided. Specification: - 400 MHz CPU - 64 MB of RAM - 32 MB of FLASH (NOR) - 3x3:2 2.4 GHz 802.11bgn - 5x 10/100/1000 Mbps Ethernet - 4x LED, 3x button, On/Off slider, Auto/On/Off slider - 1x USB 2.0 - bare UART header place on PCB Flash instruction: - NOTE: Pay attention to the switch variant and choose the image to flash accordingly. (dmesg / kernel logs can tell it) - Methods for flashing - Apply factory image in OEM firmware web-gui. - Sysupgrade on top of existing OpenWRT image - U-Boot TFPT recovery for both stock or OpenWRT images: The device U-boot contains a TFTP server that by default has an address 192.168.11.1 (MAC 02:AA:BB:CC:DD:1A). During the boot there is a time window, during which the device allows an image to be uploaded from a client with address 192.168.11.2. The image will be written on flash automatically. 1) Have a computer with static IP address 192.168.11.2 and the router device switched off. 2) Connect the LAN port next to the WAN port in the device and the computer using a network switch. 3) Assign IP 192.168.11.1 the MAC address 02:AA:BB:CC:DD:1A arp -s 192.168.11.1 02:AA:BB:CC:DD:1A 4) Initiate an upload using TFTP image variant curl -T <imagename> tftp://192.168.11.1 5) Switch on the device. The image will be uploaded subsequently. You can keep an eye on the diag light on the device, it should keep on blinking for a while indicating the writing of the image. General notes: - In the stock firmware the MAC address is the same among all interfaces so it is left here that way too. Recovery: - TFTP method - U-boot serial console Differences to ar71xx platform - This device is split in two different targets now due to hardware being a bit different under the hood. Dynamic solution within the same image is left for later time. - GPIOs for a sliding On/Off switch, marked 'Movie engine' on the device cover, were the wrong way around and were renamed qos_on -> movie_off, qos_off -> movie_on. Associated key codes remained the same they were. The device tree source code is mostly based on musashino's work Signed-off-by: Mauri Sandberg <sandberg@mailfence.com>
* ath79: fix RS-485 on Teltonika RUT-955Daniel Golle2021-03-173-14/+6
| | | | | | | | | DTR GPIO isn't actually needed and triggers boot warning. TX pin was off by one (GPIO 19 instead of GPIO 18). Reported-by: @tophirsch Fixes: d1130ad265 ("ath79: add support for Teltonika RUT955") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ath79: fix USB power on TP-Link TL-WR810N v1Tom Stöveken2021-02-261-0/+1
| | | | | | | | | | | Before: Kernel reported "usb_vbus: disabling" and the USB was not providing power After: USB power is switched on, peripheral is powered from the device Signed-off-by: Tom Stöveken <tom@naaa.de> [squash and tidy up] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: enable UART node for GL-USB150Adrian Schmutzler2021-02-251-4/+0
| | | | | | | | | | This was overlooked when adding support for this device. (It has recently been discovered that this was the only device in ath79 having &uart disabled.) Fixes: acc62630132c ("ath79: add support for GL.iNet GL-USB150") Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: create common DTSI for Senao qca955x APsAdrian Schmutzler2021-02-243-170/+101
| | | | | | | | | | | | | | This creates a shared DTSI for qca955x Senao/Engenius APs with concatenated firmware partition/okli loader: - EAP1200H - EnstationAC v1 To make this usable for future boards with 32 MB flash as well, split the partitions node already. Suggested-by: Michael Pratt <mcpratt@pm.me> Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: create common DTSI for Senao ar934x APsAdrian Schmutzler2021-02-244-273/+98
| | | | | | | | | | | | | | | This creates a shared DTSI for ar934x Senao/Engenius APs: - EAP300 v2 - ENS202EXT v1 - EAP600 - ECB600 Since ar9341/ar9344 have different configuration, this new file mostly contains the partitioning. Suggested-by: Michael Pratt <mcpratt@pm.me> Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: create common DTSI for Senao ar724x APsAdrian Schmutzler2021-02-244-261/+94
| | | | | | | | | | | | | | This creates a shared DTSI for ar724x Senao/Engenius APs: - ENH202 v1 - EAP350 v1 - ECB350 v1 Since ar7240/ar7242 have different configuration, this new file mostly contains the partitioning. Suggested-by: Michael Pratt <mcpratt@pm.me> Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: enable UART in SoC DTSI filesAdrian Schmutzler2021-02-24208-847/+16
| | | | | | | | | | | | | | | The uart node is enabled on all devices except one (GL-USB150 *). Thus, let's not have a few hundred nodes to enable it, but do not disable it in the first place. Where the majority of devices is using it, also move the serial0 alias to the DTSI. *) Since GL-USB150 even defines serial0 alias, the missing uart is probably just a mistake. Anyway, disable it for now so this patch stays cosmetic. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: specify device-type for PCI controllersDavid Bauer2021-02-206-0/+14
| | | | | | | | Specify the device_type property for PCI as well as PCIe controllers. Otherwise, the PCI range parser will not be selected when using kernel 5.10. Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: fix USB power GPIO for TP-Link TL-WR810N v1Adrian Schmutzler2021-02-111-1/+1
| | | | | | | | | | | | | | | | | | The TP-Link TL-WR810N v1 is known to cause soft-brick on ath79 and work fine for ar71xx [1]. On closer inspection, the only apparent difference is the GPIO used for the USB regulator, which deviates between the two targets. This applies the value from ar71xx to ath79. Tested successfully by a forum user. [1] https://forum.openwrt.org/t/tp-link-tl-wr810n-v1-ath79/48267 Fixes: cdbf2de77768 ("ath79: Add support for TP-Link WR810N") Fixes: FS#3522 Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: add support for D-Link DAP-3662 A1Sebastian Schaper2021-02-091-0/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifications: * QCA9557, 16 MiB Flash, 128 MiB RAM, 802.11n 2T2R * QCA9882, 802.11ac 2T2R * 2x Gigabit LAN (1x 802.11af PoE) * IP68 pole-mountable outdoor case Installation: * Factory Web UI is at 192.168.0.50 login with 'admin' and blank password, flash factory.bin * Recovery Web UI is at 192.168.0.50 connect network cable, hold reset button during power-on and keep it pressed until uploading has started (only required when checksum is ok, e.g. for reverting back to oem firmware), flash factory.bin After flashing factory.bin, additional free space can be reclaimed by flashing sysupgrade.bin, since the factory image requires some padding to be accepted for upgrading via OEM Web UI. Both ethernet ports are set to LAN by default, matching the labelling on the case. However, since both GMAC Interfaces eth0 and eth1 are connected to the switch (QCA8337), the user may create an additional 'wan' interface as desired and override the vlan id settings to map br-lan / wan to either the PoE or non-PoE port, depending on the individual scenario of use. So, the LAN and WAN ports would then be connected to different GMACs, e.g. config interface 'lan' option ifname 'eth0.1' ... config interface 'wan' option ifname 'eth1.2' ... config switch_vlan option device 'switch0' option vlan '1' option ports '1 0t' config switch_vlan option device 'switch0' option vlan '2' option ports '2 6t' Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net> [add configuration example] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: use internal switch for EAP300 v2Michael Pratt2021-02-081-19/+1
| | | | | | | | | | | | | | | | Have the port use GMAC1 with internal switch which fixes the issue of the ethernet LED not functioning The LED is triggered by the internal switch, not a GPIO. The GPIO for the ethernet LED was added in ath79 as it was defined in the ar71xx target but it was not functioning in ath79 for a previously unknown reason. It is unknown why that GPIO was defined as an LED in ar71xx. Signed-off-by: Michael Pratt <mcpratt@pm.me> [drop unrelated changes: model property and SPI max frequency] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: add support for Meraki MR12Martin Kennedy2021-02-051-0/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port device support for Meraki MR12 from the ar71xx target to ath79. Specifications: - SoC: AR7242-AH1A CPU - RAM: 64MiB (NANYA NT5DS32M16DS-5T) - NOR Flash: 16MiB (MXIC MX25L12845EMI-10G) - Ethernet: 1 x PoE Gigabit Ethernet Port (SoC MAC + AR8021-BL1E PHY) - Ethernet: 1 x 100Mbit port (SoC MAC+PHY) - Wi-Fi: Atheros AR9283-AL1A (2T2R, 11n) Installation: 1. Requires TFTP server at 192.168.1.101, w/ initramfs & sysupgrade .bins 2. Open shell case 3. Connect a USB->TTL cable to headers furthest from the RF shield 4. Power on the router; connect to U-boot over 115200-baud connection 5. Interrupt U-boot process to boot Openwrt by running: setenv bootcmd bootm 0xbf0a0000; saveenv; tftpboot 0c00000 <filename-of-initramfs-kernel>.bin; bootm 0c00000; 6. Copy sysupgrade image to /tmp on MR12 7. sysupgrade /tmp/<filename-of-sysupgrade>.bin Notes: - kmod-owl-loader is still required to load the ART partition into the driver. - The manner of storing MAC addresses is updated from ar71xx; it is at 0x66 of the 'config' partition, where it was discovered that the OEM firmware stores it. This is set as read-only. If you are migrating from ar71xx and used the method mentioned above to upgrade, use kmod-mtd-rw or UCI to add the MAC back in. One more method for doing this is described below. - Migrating directly from ar71xx has not been thoroughly tested, but one method has been used a couple of times with good success, migrating 18.06.2 to a full image produced as of this commit. Please note that these instructions are only for experienced users, and/or those still able to open their device up to flash it via the serial headers should anything go wrong. 1) Install kmod-mtd-rw and uboot-envtools 2) Run `insmod mtd-rw.ko i_want_a_brick=1` 3) Modify /etc/fw_env.config to point to the u-boot-env partition. The file /etc/fw_env.config should contain: # MTD device env offset env size sector size /dev/mtd1 0x00000 0x10000 0x10000 See https://openwrt.org/docs/techref/bootloader/uboot.config for more details. 4) Run `fw_printenv` to verify everything is correct, as per the link above. 5) Run `fw_setenv bootcmd bootm 0xbf0a0000` to set a new boot address. 6) Manually modify /lib/upgrade/common.sh's get_image function: Change ... cat "$from" 2>/dev/null | $cmd ... into ... ( dd if=/dev/zero bs=1 count=$((0x66)) ; # Pad the first 102 bytes echo -ne '\x00\x18\x0a\x12\x34\x56' ; # Add in MAC address dd if=/dev/zero bs=1 count=$((0x20000-0x66-0x6)) ; # Pad the rest cat "$from" 2>/dev/null ) | $cmd ... which, during the upgrade process, will pad the image by 128K of zeroes-plus-MAC-address, in order for the ar71xx's firmware partition -- which starts at 0xbf080000 -- to be instead aligned with the ath79 firmware partition, which starts 128K later at 0xbf0a0000. 7) Copy the sysupgrade image into /tmp, as above 8) Run `sysupgrade -F /tmp/<sysupgrade>.bin`, then wait Again, this may BRICK YOUR DEVICE, so make *sure* to have your serial cable handy. Signed-off-by: Martin Kennedy <hurricos@gmail.com> [add LED migration and extend compat message] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
* ath79: add support for Ubiquiti UniFi AP Outdoor+David Bauer2021-02-013-44/+155
| | | | | | | | | | | | | | | | | | | Hardware -------- Atheros AR7241 16M SPI-NOR 64M DDR2 Atheros AR9283 2T2R b/g/n 2x Fast Ethernet (built-in) Installation ------------ Transfer the Firmware update to the device using SCP. Install using fwupdate.real -m <openwrt.bin> -d Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: add support for Senao Engenius EAP1200HMichael Pratt2021-01-231-0/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FCC ID: A8J-EAP1200H Engenius EAP1200H is an indoor wireless access point with 1 Gb ethernet port, dual-band wireless, internal antenna plates, and 802.3at PoE+ **Specification:** - QCA9557 SOC - QCA9882 WLAN PCI card, 5 GHz, 2x2, 26dBm - AR8035-A PHY RGMII GbE with PoE+ IN - 40 MHz clock - 16 MB FLASH MX25L12845EMI-10G - 2x 64 MB RAM NT5TU32M16FG - UART at J10 populated - 4 internal antenna plates (5 dbi, omni-directional) - 5 LEDs, 1 button (power, eth0, 2G, 5G, WPS) (reset) **MAC addresses:** MAC addresses are labeled as ETH, 2.4G, and 5GHz Only one Vendor MAC address in flash eth0 ETH *:a2 art 0x0 phy1 2.4G *:a3 --- phy0 5GHz *:a4 --- **Serial Access:** the RX line on the board for UART is shorted to ground by resistor R176 therefore it must be removed to use the console but it is not necessary to remove to view boot log optionally, R175 can be replaced with a solder bridge short the resistors R175 and R176 are next to the UART RX pin at J10 **Installation:** 2 ways to flash factory.bin from OEM: Method 1: Firmware upgrade page: OEM webpage at 192.168.1.1 username and password "admin" Navigate to "Firmware Upgrade" page from left pane Click Browse and select the factory.bin image Upload and verify checksum Click Continue to confirm and wait 3 minutes Method 2: Serial to load Failsafe webpage: After connecting to serial console and rebooting... Interrupt uboot with any key pressed rapidly execute `run failsafe_boot` OR `bootm 0x9fd70000` wait a minute connect to ethernet and navigate to "192.168.1.1/index.htm" Select the factory.bin image and upload wait about 3 minutes **Return to OEM:** If you have a serial cable, see Serial Failsafe instructions otherwise, uboot-env can be used to make uboot load the failsafe image *DISCLAIMER* The Failsafe image is unique to Engenius boards. If the failsafe image is missing or damaged this will brick the device DO NOT downgrade to ar71xx this way, it can cause kernel loop or halt ssh into openwrt and run `fw_setenv rootfs_checksum 0` reboot, wait 3 minutes connect to ethernet and navigate to 192.168.1.1/index.htm select OEM firmware image from Engenius and click upgrade **TFTP recovery:** Requires serial console, reset button does nothing rename initramfs to 'vmlinux-art-ramdisk' make available on TFTP server at 192.168.1.101 power board, interrupt boot execute tftpboot and bootm 0x81000000 NOTE: TFTP is not reliable due to bugged bootloader set MTU to 600 and try many times **Format of OEM firmware image:** The OEM software of EAP1200H is a heavily modified version of Openwrt Kamikaze. One of the many modifications is to the sysupgrade program. Image verification is performed simply by the successful ungzip and untar of the supplied file and name check and header verification of the resulting contents. To form a factory.bin that is accepted by OEM Openwrt build, the kernel and rootfs must have specific names... openwrt-ar71xx-generic-eap1200h-uImage-lzma.bin openwrt-ar71xx-generic-eap1200h-root.squashfs and begin with the respective headers (uImage, squashfs). Then the files must be tarballed and gzipped. The resulting binary is actually a tar.gz file in disguise. This can be verified by using binwalk on the OEM firmware images, ungzipping then untaring. Newer EnGenius software requires more checks but their script includes a way to skip them, otherwise the tar must include a text file with the version and md5sums in a deprecated format. The OEM upgrade script is at /etc/fwupgrade.sh. OKLI kernel loader is required because the OEM software expects the kernel to be no greater than 1536k and the factory.bin upgrade procedure would otherwise overwrite part of the kernel when writing rootfs. Note on PLL-data cells: The default PLL register values will not work because of the external AR8035 switch between the SOC and the ethernet port. For QCA955x series, the PLL registers for eth0 and eth1 can be see in the DTSI as 0x28 and 0x48 respectively. Therefore the PLL registers can be read from uboot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x18050028 1` and `md 0x18050048 1`. The clock delay required for RGMII can be applied at the PHY side, using the at803x driver `phy-mode`. Therefore the PLL registers for GMAC0 do not need the bits for delay on the MAC side. This is possible due to fixes in at803x driver since Linux 5.1 and 5.3 Signed-off-by: Michael Pratt <mcpratt@pm.me>
* kernel: mtdsplit_uimage: replace "netgear, uimage" parserBjørn Mork2021-01-2214-12/+42
| | | | | | | | | | | | | | | | | | | The "netgear,uimage" parser can be replaced by the generic parser using device specific openwrt,ih-magic and openwrt,ih-type properties. Device tree properties for the following devices have not been set, as they have been dropped from OpenWrt with the removal of the ar71xx target: FW_MAGIC_WNR2000V1 0x32303031 FW_MAGIC_WNR2000V4 0x32303034 FW_MAGIC_WNR1000V2_VC 0x31303030 FW_MAGIC_WPN824N 0x31313030 Tested-by: Sander Vanheule <sander@svanheule.net> # WNDR3700v2 Tested-by: Stijn Segers <foss@volatilesystems.org> # WNDR3700v1 Signed-off-by: Bjørn Mork <bjorn@mork.no>
* kernel: mtdsplit_uimage: replace "openwrt, okli" parserBjørn Mork2021-01-229-9/+27
| | | | | | | | | The only difference between the "openwrt,okli" and the generic parser is the magic. Set this in device tree for all affected devices and remove the "openwrt,okli" parser. Tested-by: Michael Pratt <mcpratt@protonmail.com> # EAP300 v2, ENS202EXT and ENH202 Signed-off-by: Bjørn Mork <bjorn@mork.no>
* ath79: Add support for OpenMesh MR1750 v2Sven Eckelmann2021-01-191-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device specifications: ====================== * Qualcomm/Atheros QCA9558 ver 1 rev 0 * 720/600/240 MHz (CPU/DDR/AHB) * 128 MB of RAM * 16 MB of SPI NOR flash - 2x 7 MB available; but one of the 7 MB regions is the recovery image * 3T3R 2.4 GHz Wi-Fi (11n) * 3T3R 5 GHz Wi-Fi (11ac) * 6x GPIO-LEDs (2x wifi, 2x status, 1x lan, 1x power) * 1x GPIO-button (reset) * external h/w watchdog (enabled by default)) * TTL pins are on board (arrow points to VCC, then follows: GND, TX, RX) * 1x ethernet - AR8035 ethernet PHY (RGMII) - 10/100/1000 Mbps Ethernet - 802.3af POE - used as LAN interface * 12-24V 1A DC * internal antennas Flashing instructions: ====================== Various methods can be used to install the actual image on the flash. Two easy ones are: ap51-flash ---------- The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be used to transfer the image to the u-boot when the device boots up. initramfs from TFTP ------------------- The serial console must be used to access the u-boot shell during bootup. It can then be used to first boot up the initramfs image from a TFTP server (here with the IP 192.168.1.21): setenv serverip 192.168.1.21 setenv ipaddr 192.168.1.1 tftpboot 0c00000 <filename-of-initramfs-kernel>.bin && bootm $fileaddr The actual sysupgrade image can then be transferred (on the LAN port) to the device via scp <filename-of-squashfs-sysupgrade>.bin root@192.168.1.1:/tmp/ On the device, the sysupgrade must then be started using sysupgrade -n /tmp/<filename-of-squashfs-sysupgrade>.bin Signed-off-by: Sven Eckelmann <sven@narfation.org> [rebase, add LED migration] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 08:16:25 +0000