openwrt/upstream - upstream openwrt

	Commit message (Collapse)	Author	Age	Files	Lines
*	ath79: use ar8216 for builtin switch	Chuanhong Guo	2019-03-24	1	-2/+3
\| \| \| \|	Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
*	ath79: fix pinmux reg value for QCA956x	INAGAKI Hiroshi	2018-12-24	1	-1/+1
\| \| \| \| \| \| \| \| \| \| \| \| \|	The range of pinmux reg property "<0x1804002c 0x40>" for QCA956x SoC does not includes GPIO_FUNCTION register. If the device uses "&jtag_disable_pins", this causes the following errors: [ 1.982937] pinctrl-single 1804002c.pinmux: mux offset out of range: 0x40 (0x40) [ 1.990622] pinctrl-single 1804002c.pinmux: could not add functions for pinmux_jtag_disable_pins 64x Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
*	ath79: fix dtc compiler warnings	Mathias Kresin	2018-12-12	1	-2/+1
\| \| \| \| \| \| \| \| \| \| \| \|	The qca9557/qca956x reset-controller aren't a simple bus. A simple bus would require node unit addresses. Add the node unit addresses for the qca9557 usb phys. Add the regs for the USB_PWRCTL and USB_CONFIG registers even not yet used. Fix the wrong ar7100 pcie controller node unit address as well. Signed-off-by: Mathias Kresin <dev@kresin.me>
*	ath79: add QCA956x GMAC config	David Bauer	2018-08-13	1	-0/+5
\| \| \| \| \| \|	This commit adds the ability to configure the GMAC of the QCA956x. Signed-off-by: David Bauer <mail@david-bauer.net>
*	ath79: fix dts warnings	Mathias Kresin	2018-08-08	1	-4/+4
\| \| \| \| \| \| \|	Fix all issues found by the devicetree compiler like wrong address/size cells as well as wrong/missing/superfluous unit addresses. Signed-off-by: Mathias Kresin <dev@kresin.me>
*	ath79: Add switch reset definition in dts	Chuanhong Guo	2018-07-30	1	-0/+2
\| \| \| \|	Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
*	ath79: qca956x: Update dts for current ag71xx driver	Chuanhong Guo	2018-07-30	1	-4/+30
\| \| \| \| \| \| \| \|	enable mdio1 by default because mdio1 node is a subnode of eth1 and eth1 node is a "simple-mfd", which makes mdio1 disabled when eth1 isn't enabled. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
*	ath79: qca95xx: add new intc2, correct intc3 and add second pcie on qca9557	Johann Neuhauser	2018-06-20	1	-2/+4
\| \| \| \|	Signed-off-by: Johann Neuhauser <johann@it-neuhauser.de>
*	ath79: add support for Phicomm K2T	Weijie Gao	2018-06-18	1	-0/+281
	This patch adds dts for qca956x and also support for Phicomm K2T The qca965x.dtsi adds nearly all the necessary components. Both ath9k AHB and PCIe worked well. The Phicomm K2T uses MTD partition 'config' to store the mac addresses in JSON format. To extract these fields correctly, a script is introduced: /lib/functions/k2t.sh This script provides a helper function to extract mac addresses, and is used in three places. Hardware spec of Phicomm K2T: CPU: QCA9563 DRAM: 64MB DDR2 Flash: 16MB SPI-NOR Switch: QCA8337 WiFi 5.8GHz: QCA9886 Flash instruction: Apply sysupgrade.bin via serial console: tftp 0x80000000 sysupgrade.bin && erase 0x9f090000 +$filesize && cp.b $fileaddr 0x9f090000 $filesize Signed-off-by: Weijie Gao <hackpascal@gmail.com>