| Commit message (Collapse) | Author | Age | Files | Lines |
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The "/dts-v1/;" identifier is supposed to be present once at the
top of a device tree file after the includes have been processed.
In ath79, we therefore requested to have in the DTS files so far,
and omit it in the DTSI files. However, essentially the syntax of
the parent ath79.dtsi file already determines the DTS version, so
putting it into the DTS files is just a useless repetition.
Consequently, this patch puts the dts-v1 statement into the parent
ath79.dtsi, which is (indirectly) included by all DTS files. All
other occurences are removed.
Since the dts-v1 statement needs to be before any other definitions,
this also moves the includes to make sure the ath79.dtsi or its
descendants are always included first.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Some boards using a QCA9556 or QCA9558 had their machine compatible
binding incorrectly set to qca,qca9557.
Signed-off-by: David Bauer <mail@david-bauer.net>
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This applies several style adjustments that have been requested in
recent reviews to older DTS files. Despite making the code base more
consistent, this will also help to reduce review time when DTSes
are copy/pasted.
Applied changes:
- Rename gpio-keys/gpio-leds to keys/leds
- Remove node labels that are not used
- Use label property for partitions
- Prefix led node labels with "led_"
- Remove redundant includes
- Harmonize new lines after status property
- Several smaller style fixes
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Upstream commit 6d4cd04 changes how the internal delays of the AR803x
based PHYs are enabled. With this commit, all internal delays are
disabled on driver probe and enabled based on the 'phy-mode' property in
the device-tree.
Before this commit, the RX delay was always enabled upon soft-reset
while the TX delay retained it's previous state. A hard reset enabled
the RX delay while the TX delay was disabled.
Because of this inconsistency, wrongly specified PHY-modes were working
correctly while the hardware was in a different state.
Fix the PHY-modes of some affected devices (and clean up misplaced
properties along the way) to keep the devices working flawlessly with
kernels >= 5.1.
Signed-off-by: David Bauer <mail@david-bauer.net>
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Hardware
--------
CPU: Qualcomm Atheros QCA9558
RAM: 128M DDR2
FLASH: 16MiB
ETH: 1x Atheros AR8035 (PoE in)
WiFi2: QCA9558 2T2R
WiFi5: QCA9880 2T2R
BTN: 1x Reset
LED: 1x LED blue
1x LED red
BEEP: 1x GPIO attached piezo beeper
UART: 3.3V GND TX RX (115200-N-8) (3.3V is square pad)
Header is located next to reset-button
Installation
------------
Make sure you set a password for the root user as prompted on first
setup!
1. Upload OpenWRT sysupgrade image via SSH to the device.
Use /tmp as the destination folder on the device.
User is root, password the one set in the web interface.
2. Install OpenWRT with
> sysupgrade -n -F /tmp/<openwrt-image-name>
Signed-off-by: David Bauer <mail@david-bauer.net>
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