| Commit message (Collapse) | Author | Age | Files | Lines |
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These frequently used usb led triggers are universal. They should be
moved to SoC dtsi.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
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AR7161, AR724x, AR9132 and QCA95xx only support fixed frequency external
crystal oscillator, so move reference clock node to SoC dtsi files.
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
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ar9344_openmesh_mr600-v1.dts:40.10-44.5: Warning (gpios_property):
/leds-ath9k/wifi2g: Missing property '#gpio-cells' in node
/ahb/pcie-controller@180c0000/wifi@0,0 or bad phandle
=> added gpio-controller + #gpio-cells
qca955x_zyxel_nbg6x16.dtsi:121.3-13: Warning (reg_format):
/ahb/usb@1b000000/port@1:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
../dts/qca955x_zyxel_nbg6x16.dtsi:131.3-13: Warning (reg_format):
/ahb/usb@1b400000/port@1:reg: property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
qca955x_zyxel_nbg6x16.dtsi:120.20-123.4: Warning (avoid_default_addr_size):
/ahb/usb@1b000000/port@1: Relying on default #address-cells value
=> ath79's usb-nodes are missing the address- and size-cells properties.
These are needed for usb led trigger support.
ar7242_ubnt_sw.dtsi:54.4-14: Warning (reg_format): /gpio_spi/gpio_spi@0:reg:
property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
=> the #address-cells and #size-cells had to be nudged.
qca9531_dlink_dch-g020-a1.dts:19.6-39.4: Warning (i2c_bus_bridge):
/i2c: incorrect #size-cells for I2C bus
=> #size-cells = <0>;
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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The ar71xx GPIO driver only uses 0x24 registers, all following GPIO
registers are using to control pinmux functions, which are not handles
by the GPIO driver but the generic Linux pinctrl driver.
For some SoC conflicting address ranges were defined for these (AR7240 &
AR9330).
Resolve these cases and align the address space of the GPIO controller
between all SoCs, as the used address space of the driver is identical
for all these.
Signed-off-by: David Bauer <mail@david-bauer.net>
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The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.
Where the majority of devices is using it, also move the serial0
alias to the DTSI.
*) Since GL-USB150 even defines serial0 alias, the missing uart
is probably just a mistake. Anyway, disable it for now so this
patch stays cosmetic.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Specify the device_type property for PCI as well as PCIe controllers.
Otherwise, the PCI range parser will not be selected when using kernel
5.10.
Signed-off-by: David Bauer <mail@david-bauer.net>
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ath79.dtsi uses ATH79_CLK_MDIO, so the include
<dt-bindings/clock/ath79-clk.h>
needs to be moved there.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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In ath79, for several SoCs the console bootargs are defined to the
very same value in every device's DTS. Consolidate these definitions
in the SoC dtsi files and drop further redundant definitions elsewhere.
The only device without any bootargs set has been OpenMesh OM5P-AC V2.
This will now inherit the setting from qca955x.dtsi
Note that while this tidies up master a lot, it might develop into a
frequent pitfall for backports.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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The qca9557/qca956x reset-controller aren't a simple bus. A simple bus
would require node unit addresses.
Add the node unit addresses for the qca9557 usb phys. Add the regs for
the USB_PWRCTL and USB_CONFIG registers even not yet used.
Fix the wrong ar7100 pcie controller node unit address as well.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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This adds "syscon" to the compatible properties for the eth0/eth1 nodes
in ar7100.dtsi.
Without this, a kernel panic is encountered on boot with some ar7100
boards. This for some reason wasn't an issue for the WNDR3800, which
uses a Realtek switch chipset, but the panic was encountered on the
RouterStation Pro (using an AR8216 switch) and some other boards that
haven't yet been merged.
The panic message mentions an unaligned access and happens in
ag71xx_mdio_probe in drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c.
Even if the unaligned access is fixed, the ag71xx_mdio probe still fails
without the "syscon" property.
This was already being worked around in
ar7161_ubnt_routerstation-pro.dts by overriding the compatible property,
so this commit removes that as well.
All of the other ath79 .dtsi already have this property, so no changes
are needed elsewhere.
Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
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Currently all PCI devices get the same IRQ that affects performance badly.
This commit adresses this problem and cleans the code.
ar7100 has a special PCI interrupt controller@18060018 that works exactly
the same way as misc interrupt controller.
This patch does the following:
1. Defines pci-intc interrupt controller@18060018 in dtsi.
2. Removes interrupt-controller property from PCI node.
3. Sets a correct interrupt mask for PCI devices.
4. Removes all IRQ handling code from the PCI driver.
"qca,ar7100-misc-intc" should be used as the compatible property, becuase on ar7100
the controlled status register is read-only and the ack method used in
"qca,ar7240-misc-intc" won't work properly.
There are two very minor downsides of this patch that don't affect perormance:
1. We allocate an IRQ domain of 32 IRQ, whan we need only 5. But ar7100 aren't tiny un terms of RAM
and that is not very important and can be tuned if we implement "nr-interrupts" property".
2. It reuses the same irg chip name "MISC" for both controllers.
Run tested on DIR-825 B1.
Signed-off-by: Dmitry Tunin <hanipouspilot@gmail.com>
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We currently don't have any code configuring interface mode in ath79,
meaning that we relies on bootloader to set the correct interface mode.
This patch added code to set interface correctly so that everything works
even if bootloader configures it wrong.(e.g. on WNDR3800 u-boot set
the second GMAC mode to RMII but it should be RGMII.)
Introduced "qca,mac-idx" for the difference in MII_CTRL register value.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.
Remove PHY reset support from ag71xx and definition for them in dtsi.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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Some maintainers prefer DTS files licensed under permissive license like
MIT / BSD. As all DT bindings should be OS independent and DTS files are
pretty separated from Linux code it probably makes sense to share them
across projects.
The safest solution is to use dual licensing: that way it stays clear
these files can be used in GPL projects without depending on current
belief of licenses compatibility.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: John Crispin <john@phrozen.org>
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This target aims to replace ar71xx mid-term. The big part that is still
missing is making the MMIO/AHB wifi work using OF. NAND and mikrotik
subtargets will follow.
Signed-off-by: John Crispin <john@phrozen.org>
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