aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ar7
Commit message (Expand)AuthorAgeFilesLines
* move IMAGE_CMDLINE_HACK default to generic from targetsAndy Boyett2009-10-052-2/+0
* kernel: upgrade to 2.6.30.8 and refresh patchesGabor Juhos2009-10-011-1/+1
* update to latest 2.6.27 and 2.6.30 kernelsImre Kaloz2009-09-171-1/+1
* kernel: get rid of the simple_prom_emulator, it is not really usefulGabor Juhos2009-09-102-2/+1
* kernel: add generic image_cmdline hack to MIPS targetsGabor Juhos2009-09-102-0/+2
* update to 2.6.30.6, compile tested on some targets onlyFlorian Fainelli2009-09-091-1/+1
* ar7: remove CONFIG_CRYPTO_ALGAPI overrideFelix Fietkau2009-08-261-1/+0
* use 2.6.30.5Florian Fainelli2009-08-171-1/+1
* switch to 2.6.30.4Florian Fainelli2009-08-081-1/+1
* register watchdog only if enabled in hardware (#2378)Florian Fainelli2009-08-042-0/+60
* add fixed PHY patches from 2.6.27, refresh patchesFlorian Fainelli2009-08-035-34/+172
* add back the fixed PHY patches from #3124, until we move this to platform_dataFlorian Fainelli2009-08-032-0/+139
* add experimental support for 2.6.30Florian Fainelli2009-08-029-0/+813
* resync kernel configurationFlorian Fainelli2009-08-021-7/+2
* update to 2.6.27.29Florian Fainelli2009-07-311-1/+1
* switch to 2.6.27.28Florian Fainelli2009-07-271-1/+1
* use 2.6.27.7Florian Fainelli2009-07-241-1/+1
* update to latest 2.6.27.26 stable kernelFlorian Fainelli2009-07-031-1/+1
* we don't support 2.6.26 for a long time nowImre Kaloz2009-06-238-306/+0
* use 2.6.27.5Florian Fainelli2009-06-171-1/+1
* add experimental 2.6.30 support, boot testedFlorian Fainelli2009-06-019-0/+582
* remove old 2.6.24 codeFlorian Fainelli2009-06-012-15/+0
* use 2.6.27.24Florian Fainelli2009-05-301-1/+1
* rework ar7 profiles to separate dsl firmwares, annex-a being now the default ...Florian Fainelli2009-05-305-5/+40
* refresh patchesFlorian Fainelli2009-05-287-15/+16
* revert part of r16112, the setup.c part needs more testingFlorian Fainelli2009-05-271-37/+1
* include missing atm-tools to setup pppoe/a linksFlorian Fainelli2009-05-272-3/+39
* include atm drivers in default images, otherwise firmware is just uselessFlorian Fainelli2009-05-251-1/+2
* I recently came across an ar7 device which has the vlynq hardwired so that th...Florian Fainelli2009-05-251-23/+127
* even more config file cleanupImre Kaloz2009-05-181-4/+0
* without generic 2.6.26 support it doesn't make sense to keep 2.6.26 configs a...Imre Kaloz2009-05-151-155/+0
* config cleanupsImre Kaloz2009-05-152-7/+0
* some additional config file cleanup..Imre Kaloz2009-05-141-1/+0
* make kernels use /etc/preinit by defaultImre Kaloz2009-05-142-2/+2
* include kmod-acx in default imagesFlorian Fainelli2009-05-071-1/+1
* update to 2.6.27 (#4122)Florian Fainelli2009-05-0710-2/+430
* some more kernel config cleanup.. last for today :)Imre Kaloz2009-05-041-7/+0
* more cleanupImre Kaloz2009-05-041-5/+0
* cleanup MTD option handlingImre Kaloz2009-05-041-39/+0
* nuke obsolete kernel stuffFelix Fietkau2009-03-1433-2577/+0
* include pppoa and br2684 packages by default (#4648)Florian Fainelli2009-02-221-0/+2
* do not patch the local copy of ar7part.c to be exactly like what is mainline ...Florian Fainelli2009-02-222-200/+0
* disable all kernel config options that are set to =mFelix Fietkau2009-02-224-10/+10
* refresh 2.6.26 patchesGabor Juhos2008-12-061-4/+4
* make mips_machine stuff available for other MIPS targetsGabor Juhos2008-12-021-0/+1
* move THERMAL symbols into the generic configImre Kaloz2008-11-252-3/+0
* Fix this nasty patch which prevented others from applyingFlorian Fainelli2008-11-241-13/+2
* update to 2.6.25.20, 2.6.26.8, 2.6.27.5 and refresh patches * based on a patc...Gabor Juhos2008-11-121-1/+1
* refresh 2.6.26 patchesGabor Juhos2008-11-069-25/+25
* Update to 2.6.26.7Florian Fainelli2008-10-231-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-19 17:50:48 +0000
D_BCM4748: case BCMA_CHIP_ID_BCM4749: + case BCMA_CHIP_ID_BCM5357: case BCMA_CHIP_ID_BCM53572: + case BCMA_CHIP_ID_BCM6362: /* always 20Mhz */ return 20000 * 1000; - case BCMA_CHIP_ID_BCM5356: case BCMA_CHIP_ID_BCM4706: + case BCMA_CHIP_ID_BCM5356: /* always 25Mhz */ return 25000 * 1000; + case BCMA_CHIP_ID_BCM43460: + case BCMA_CHIP_ID_BCM4352: + case BCMA_CHIP_ID_BCM4360: + if (cc->status & BCMA_CC_CHIPST_4360_XTAL_40MZ) + return 40000 * 1000; + else + return 20000 * 1000; default: bcma_warn(bus, "No ALP clock specified for %04X device, pmu rev. %d, using default %d Hz\n", bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK); @@ -373,7 +389,7 @@ void bcma_pmu_spuravoid_pllupdate(struct tmp |= (bcm5357_bcm43236_ndiv[spuravoid]) << BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_SHIFT; bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, tmp); - tmp = 1 << 10; + tmp = BCMA_CC_PMU_CTL_PLL_UPD; break; case BCMA_CHIP_ID_BCM4331: @@ -394,7 +410,7 @@ void bcma_pmu_spuravoid_pllupdate(struct bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2, 0x03000a08); } - tmp = 1 << 10; + tmp = BCMA_CC_PMU_CTL_PLL_UPD; break; case BCMA_CHIP_ID_BCM43224: @@ -427,7 +443,7 @@ void bcma_pmu_spuravoid_pllupdate(struct bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL5, 0x88888815); } - tmp = 1 << 10; + tmp = BCMA_CC_PMU_CTL_PLL_UPD; break; case BCMA_CHIP_ID_BCM4716: @@ -461,7 +477,7 @@ void bcma_pmu_spuravoid_pllupdate(struct 0x88888815); } - tmp = 3 << 9; + tmp = BCMA_CC_PMU_CTL_PLL_UPD | BCMA_CC_PMU_CTL_NOILPONW; break; case BCMA_CHIP_ID_BCM43227: @@ -497,7 +513,7 @@ void bcma_pmu_spuravoid_pllupdate(struct bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL5, 0x88888815); } - tmp = 1 << 10; + tmp = BCMA_CC_PMU_CTL_PLL_UPD; break; default: bcma_err(bus, "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n", --- a/drivers/bcma/main.c +++ b/drivers/bcma/main.c @@ -120,6 +120,11 @@ static int bcma_register_cores(struct bc continue; } + /* Only first GMAC core on BCM4706 is connected and working */ + if (core->id.id == BCMA_CORE_4706_MAC_GBIT && + core->core_unit > 0) + continue; + core->dev.release = bcma_release_core_dev; core->dev.bus = &bcma_bus_type; dev_set_name(&core->dev, "bcma%d:%d", bus->num, dev_id); --- a/drivers/bcma/scan.c +++ b/drivers/bcma/scan.c @@ -137,19 +137,19 @@ static void bcma_scan_switch_core(struct addr); } -static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 **eromptr) +static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 __iomem **eromptr) { u32 ent = readl(*eromptr); (*eromptr)++; return ent; } -static void bcma_erom_push_ent(u32 **eromptr) +static void bcma_erom_push_ent(u32 __iomem **eromptr) { (*eromptr)--; } -static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 **eromptr) +static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 __iomem **eromptr) { u32 ent = bcma_erom_get_ent(bus, eromptr); if (!(ent & SCAN_ER_VALID)) @@ -159,14 +159,14 @@ static s32 bcma_erom_get_ci(struct bcma_ return ent; } -static bool bcma_erom_is_end(struct bcma_bus *bus, u32 **eromptr) +static bool bcma_erom_is_end(struct bcma_bus *bus, u32 __iomem **eromptr) { u32 ent = bcma_erom_get_ent(bus, eromptr); bcma_erom_push_ent(eromptr); return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID)); } -static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr) +static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 __iomem **eromptr) { u32 ent = bcma_erom_get_ent(bus, eromptr); bcma_erom_push_ent(eromptr); @@ -175,7 +175,7 @@ static bool bcma_erom_is_bridge(struct b ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE)); } -static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr) +static void bcma_erom_skip_component(struct bcma_bus *bus, u32 __iomem **eromptr) { u32 ent; while (1) { @@ -189,7 +189,7 @@ static void bcma_erom_skip_component(str bcma_erom_push_ent(eromptr); } -static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr) +static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 __iomem **eromptr) { u32 ent = bcma_erom_get_ent(bus, eromptr); if (!(ent & SCAN_ER_VALID)) @@ -199,7 +199,7 @@ static s32 bcma_erom_get_mst_port(struct return ent; } -static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr, +static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr, u32 type, u8 port) { u32 addrl, addrh, sizel, sizeh = 0; --- a/drivers/bcma/sprom.c +++ b/drivers/bcma/sprom.c @@ -217,6 +217,7 @@ static void bcma_sprom_extract_r8(struct } SPEX(board_rev, SSB_SPROM8_BOARDREV, ~0, 0); + SPEX(board_type, SSB_SPROM1_SPID, ~0, 0); SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT); --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h @@ -134,6 +134,7 @@ struct bcma_host_ops { #define BCMA_CORE_I2S 0x834 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */ #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */ +#define BCMA_CORE_ARM_CR4 0x83e #define BCMA_CORE_DEFAULT 0xFFF #define BCMA_MAX_NR_CORES 16 @@ -173,6 +174,60 @@ struct bcma_host_ops { #define BCMA_CHIP_ID_BCM53572 53572 #define BCMA_PKG_ID_BCM47188 9 +/* Board types (on PCI usually equals to the subsystem dev id) */ +/* BCM4313 */ +#define BCMA_BOARD_TYPE_BCM94313BU 0X050F +#define BCMA_BOARD_TYPE_BCM94313HM 0X0510 +#define BCMA_BOARD_TYPE_BCM94313EPA 0X0511 +#define BCMA_BOARD_TYPE_BCM94313HMG 0X051C +/* BCM4716 */ +#define BCMA_BOARD_TYPE_BCM94716NR2 0X04CD +/* BCM43224 */ +#define BCMA_BOARD_TYPE_BCM943224X21 0X056E +#define BCMA_BOARD_TYPE_BCM943224X21_FCC 0X00D1 +#define BCMA_BOARD_TYPE_BCM943224X21B 0X00E9 +#define BCMA_BOARD_TYPE_BCM943224M93 0X008B +#define BCMA_BOARD_TYPE_BCM943224M93A 0X0090 +#define BCMA_BOARD_TYPE_BCM943224X16 0X0093 +#define BCMA_BOARD_TYPE_BCM94322X9 0X008D +#define BCMA_BOARD_TYPE_BCM94322M35E 0X008E +/* BCM43228 */ +#define BCMA_BOARD_TYPE_BCM943228BU8 0X0540 +#define BCMA_BOARD_TYPE_BCM943228BU9 0X0541 +#define BCMA_BOARD_TYPE_BCM943228BU 0X0542 +#define BCMA_BOARD_TYPE_BCM943227HM4L 0X0543 +#define BCMA_BOARD_TYPE_BCM943227HMB 0X0544 +#define BCMA_BOARD_TYPE_BCM943228HM4L 0X0545 +#define BCMA_BOARD_TYPE_BCM943228SD 0X0573 +/* BCM4331 */ +#define BCMA_BOARD_TYPE_BCM94331X19 0X00D6 +#define BCMA_BOARD_TYPE_BCM94331X28 0X00E4 +#define BCMA_BOARD_TYPE_BCM94331X28B 0X010E +#define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX 0X00E4 +#define BCMA_BOARD_TYPE_BCM94331X12_2G 0X00EC +#define BCMA_BOARD_TYPE_BCM94331X12_5G 0X00ED +#define BCMA_BOARD_TYPE_BCM94331X29B 0X00EF +#define BCMA_BOARD_TYPE_BCM94331CSAX 0X00EF +#define BCMA_BOARD_TYPE_BCM94331X19C 0X00F5 +#define BCMA_BOARD_TYPE_BCM94331X33 0X00F4 +#define BCMA_BOARD_TYPE_BCM94331BU 0X0523 +#define BCMA_BOARD_TYPE_BCM94331S9BU 0X0524 +#define BCMA_BOARD_TYPE_BCM94331MC 0X0525 +#define BCMA_BOARD_TYPE_BCM94331MCI 0X0526 +#define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527 +#define BCMA_BOARD_TYPE_BCM94331HM 0X0574 +#define BCMA_BOARD_TYPE_BCM94331PCIEDUAL 0X059B +#define BCMA_BOARD_TYPE_BCM94331MCH5 0X05A9 +#define BCMA_BOARD_TYPE_BCM94331CS 0X05C6 +#define BCMA_BOARD_TYPE_BCM94331CD 0X05DA +/* BCM53572 */ +#define BCMA_BOARD_TYPE_BCM953572BU 0X058D +#define BCMA_BOARD_TYPE_BCM953572NR2 0X058E +#define BCMA_BOARD_TYPE_BCM947188NR2 0X058F +#define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590 +/* BCM43142 */ +#define BCMA_BOARD_TYPE_BCM943142HM 0X05E0 + struct bcma_device { struct bcma_bus *bus; struct bcma_device_id id; --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h @@ -104,6 +104,7 @@ #define BCMA_CC_CHIPST_4706_MIPS_BENDIAN BIT(3) /* 0: little, 1: big endian */ #define BCMA_CC_CHIPST_4706_PCIE1_DISABLE BIT(5) /* PCIE1 enable strap pin */ #define BCMA_CC_CHIPST_5357_NAND_BOOT BIT(4) /* NAND boot, valid for CC rev 38 and/or BCM5357 */ +#define BCMA_CC_CHIPST_4360_XTAL_40MZ 0x00000001 #define BCMA_CC_JCMD 0x0030 /* Rev >= 10 only */ #define BCMA_CC_JCMD_START 0x80000000 #define BCMA_CC_JCMD_BUSY 0x80000000 @@ -315,6 +316,9 @@ #define BCMA_CC_PMU_CTL 0x0600 /* PMU control */ #define BCMA_CC_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */ #define BCMA_CC_PMU_CTL_ILP_DIV_SHIFT 16 +#define BCMA_CC_PMU_CTL_RES 0x00006000 /* reset control mask */ +#define BCMA_CC_PMU_CTL_RES_SHIFT 13 +#define BCMA_CC_PMU_CTL_RES_RELOAD 0x2 /* reload POR values */ #define BCMA_CC_PMU_CTL_PLL_UPD 0x00000400 #define BCMA_CC_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */ #define BCMA_CC_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */ @@ -607,6 +611,8 @@ void bcma_chipco_bcm4331_ext_pa_lines_ct extern u32 bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks); +extern u32 bcma_chipco_get_alp_clock(struct bcma_drv_cc *cc); + void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value); u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask); --- a/include/linux/bcma/bcma_regs.h +++ b/include/linux/bcma/bcma_regs.h @@ -37,6 +37,7 @@ #define BCMA_IOST_BIST_DONE 0x8000 #define BCMA_RESET_CTL 0x0800 #define BCMA_RESET_CTL_RESET 0x0001 +#define BCMA_RESET_ST 0x0804 /* BCMA PCI config space registers. */ #define BCMA_PCI_PMCSR 0x44
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-19 17:50:48 +0000