| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch adds support for Cisco's Z1.
Detailed instructions for the flashing the device can
be found in the OpenWrt wiki:
<https://wiki.openwrt.org/toh/meraki/z1>
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
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It apparently causes a regression on some devices if the ethernet cable
is plugged in while booting.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Zbtlink ZBT-WE1526 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 650/400/200 MHz (CPU/DDR/AHB)
- 5x 10/100 Mbps Ethernet
- 1x USB 2.0
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 22 dBm
- two external, non-detachable antennas
- 8x LED, 1x button
- UART header (pinout: VCC, RX, TX, GND)
Flash instruction:
Use sysupgrade in vendor firmare which is based on OpenWrt.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
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This add initial support for gl-mifi.
Product page: http://www.gl-inet.com/mifi/
Signed-off-by: Zhao Gang <gang.zhao.42@gmail.com>
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This add initial support for gl-ar300m router.
Product page: http://www.gl-inet.com/ar300m/
Signed-off-by: Zhao Gang <gang.zhao.42@gmail.com>
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jjPlus JWAP230 is based on Qualcomm Atheros QCA9558 + QCA8337.
Short specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 2x 10/100/1000 Mbps Ethernet
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 3T3R 2.4 GHz with external PA (SST12LP15A), up to 28 dBm
- 3x MMCX connectors
- power input: 802.3at PoE or wide range DC (36-57 V)
- optional 802.3af PSE
- 1x mini-PCIe connector with PCIe, USB buses and SIM slot
- 1x mini-PCIe connector with PCIe bus
- 1x USB type-A connector
- 6x LED, 1x button (hardware reset)
- RS232 (MAX3223) and (E)JTAG headers
Default configuration:
- WAN on eth1 (RJ45 near LEDs with PoE input)
- LAN on eth0 (RJ45 near DC jack)
- left top LED set to be status LED
- all LEDs configurable form user space
Flash instruction (do it under U-Boot, using RS232):
1. tftp 0x80060000 lede-ar71xx-generic-jwap230-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
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Wallys DR531 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 550/400/200 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz with external PA (SE2576L), up to 30 dBm
- 2x MMCX connectors
- mini-PCIe connector with PCIe/USB buses and SIM slot
- 7x LED, 1x button, 1x optional buzzer
- UART, (E)JTAG and LED headers
Default configuration:
- WAN on eth1 (RJ45 near DC jack)
- LAN on eth0 (RJ45 near button)
- S4 LED set to be status LED
- all LEDs configurable form user space
- button configured for reset
Flash instruction (do it under U-Boot, using UART):
1. tftp 0x80060000 lede-ar71xx-generic-dr531-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Should fix LAN speed issues on some devices. This is an updated version
of the previously reverted commit with the same name.
It improves the check for MACs connected to a built-in switch
Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Using the high power table can damage the device in some cases.
This reverts commit bf27ac019c137e7baf90ca6ef0e40945ae871797.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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Signed-off-by: Arne Zachlod <arne@nerdkeller.org>
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This patch adds the target profile SOM9331 and configures hardware
functionality for the 3x Eth Ports & corresponding LED's, the USB Host,
the USART to USB bridge and the System LED.
Signed-off-by: Allan Nick Pedrana <nik9993@gmail.com>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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Signed-off-by: KeLei Liang <xzmu@wrtnode.com>
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Signed-off-by: Stijn Segers <francesco.borromini@inventati.org>
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The cpe510 has two calibration tables. The first calibration
table requires to modify ath9k driver to work (patched tx gain table).
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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Split profile into 2GHz and 5GHz. The 5GHz devices are
quite "special". The 2 GHz works perfect.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
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Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
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The LNA improves the rx path. Within a simple test setup
it improved the signal from -60dbm to -40dbm.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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- CPU QCA9531-BL3A
- RAM: 64MB
- flash: 16MB
- USB
AP143 platform, similar to tl-wr841n v10/v11, but with USB
Signed-off-by: Cezary Jackiewicz <cezary@eko.one.pl>
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This has minor differences to the V1
Signed-off-by: John Crispin <john@phrozen.org>
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Fix ARCHER_C7_GPIO_BTN_RFKILL, which is attached to GPIO23
Signed-off-by: Lars Buerding <lb.wrt@metatux.net>
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Add support for the Ubiquiti UniFi AP AC PRO
Signed-off-by: P.Wassi <p.wassi at gmx.at>
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To avoid confusion with different unifiac devices, rename existing target
"unifiac" to "unifiac-lite", before "unifiac-pro" is introduced.
Signed-off-by: P.Wassi <p.wassi at gmx.at>
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This patch adds support for the TP-Link TL-WR810N.
https://wiki.openwrt.org/toh/tp-link/tl-wr810n
Signed-off-by: Jens Steinhauser <jens.steinhauser@gmail.com>
SVN-Revision: 49286
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Fix eth0 support for the Ubiquiti UniFi AP AC
Signed-off-by: Paul Wassi <p.wassi at gmx.at>
SVN-Revision: 49277
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https://wiki.openwrt.org/toh/omylink/omy-g1
http://www.omylink.com/
Signed-off-by: L. D. Pinney <ldpinney@gmail.com>
SVN-Revision: 49258
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This fixes a build error introduced in r49193.
This closes #22230
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 49194
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The file linux/mdio-gpio.h was moved to linux/platform_data/mdio-gpio.h
in kernel 4.4
Reported-by: Arjen de Korte <arjen+openwrt@de-korte.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 49193
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Signed-off-by: Tiziano Bacocco <tizbac2@gmail.com>
SVN-Revision: 49158
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OpenWrt can be flashed with following uboot commands:
tftpboot 0x80500000 openwrt-ar71xx-generic-wpj342-16M-squashfs-sysupgrade.bin
erase 0x9f030000 +$filesize
cp.b $fileaddr 0x9f030000 $filesize
Signed-off-by: Christian Mehlis <christian@m3hlis.de>
SVN-Revision: 49157
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Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49149
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Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49141
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Enable buttons connected to the GPIOs of the AR9285.
Signed-off-by: Hartmut Knaack <knaack.h@gmx.de>
SVN-Revision: 49109
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Make use of ap9x_pci_setup_wmac_led_name() to set the name of the WLAN
LED.
Signed-off-by: Hartmut Knaack <knaack.h@gmx.de>
SVN-Revision: 49108
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This patch provides full GPIO support for WNR2200 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49101
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Fix for invalid/random/duplicate WLAN MAC address in WNR2200.
Permanent platform MAC is calculated and assigned during system startup.
WLAN MAC follows wired Ethernet interface addresses.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49100
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Signed-off-by: Luka Perkov <luka@openwrt.org>
SVN-Revision: 49086
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Signed-off-by: Luka Perkov <luka@openwrt.org>
SVN-Revision: 49082
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This patch provides full GPIO support for WNR1000v2 (LEDs and buttons).
It exposes all LEDs to operating system, including Ethernet ones.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49076
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Not all mach-* files set all boards correctly in ETH_CFG. They depend on
some preset values by u-boot which were not previously modified by
ath79_setup_qca955x_eth_cfg. Avoiding to modify them in this function keeps
it backward compatible for these boards.
This reverts commit 119b8ab2c2eac237ec4e9c4d0ed53df22b5c6978.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49072
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The default delays RXD 3. RDV 3, TXD 0, TXE 0 doesn't seem to work for some
boards. These boards depend on the preset values of u-boot which may
differ.
This reverts commit f2d4bb96b62512caa161dcc2867c91692fb16a38.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49071
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The MR1750 must unset some bits in ETH_CFG which were set by u-boot to work
correctly under OpenWrt. But the global function
ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
backward compatiblity with older mach-* files. A private (simplified)
version for MR1750 can be used instead.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49070
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The MR900 must unset some bits in ETH_CFG which were set by u-boot to work
correctly under OpenWrt. But the global function
ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
backward compatiblity with older mach-* files. A private (simplified)
version for MR900 can be used instead.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49069
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Fix for invalid/random WLAN MAC address in WNR1000v2. Permanent platform
MAC is calculated and assigned during system startup. WLAN MAC follows
wired Ethernet interface addresses. This is the same fix as for WNR2000v3
and WNR612v2.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
SVN-Revision: 49051
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The delays of PHY/MAC on the MR1750 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.
This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.
Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49031
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The delays of PHY/MAC on the MR900 are done by u-boot and OpenWrt in
different ways. u-boot only modifies the ETH_CFG of the QCA955x based on
the link speed. But OpenWrt can only modify the PHY delays based on the
link speed.
This can lead to communication problems when u-boot initializes the ETH_CFG
for a specific link speed (e.g. 10BASE-T) but then OpenWrt the sets the PHY
delays to an incompatible value.
Instead reset the ETH_CFG delay bits of the QCA955x to a specific value and
only rely on the AT803x PHY settings.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
SVN-Revision: 49030
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