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* toolchain: Include ./include/fortify for external musl toolchainHauke Mehrtens2022-09-121-0/+1
| | | | | | | | | | | | | | When building with an external toolcahin with musl also include ./include/fortify by default. This is also done when we build with the internal toolchain using musl libc. Without this extra include the fortify source feature is not working when using an external musl toolchain. All binaries were compiled without fortify source when an external musl toolchain was used. All binaries release done by the OpenWrt project use the internal toolcahin where fortify source is working. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* toolchain: Select USE_SSTRIP with external musl toolchainHauke Mehrtens2022-09-122-2/+0
| | | | | | | | | When we use the internal toolchain USE_SSTRIP will be selected by default for musl libc and USE_STRIP when glibc is used. Do the same when an external toolchain is used. USE_GLIBC will also be set for external toolchain builds based on the EXTERNAL_TOOLCHAIN_LIBC_USE_GLIBC setting. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* mac80211: rt2x00: experimental improvements for MT7620 wifiDaniel Golle2022-09-1217-15/+467
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Serge Vasilugin reports: To improve mt7620 built-in wifi performance some changes: 1. Correct BW20/BW40 switching (see comments with mark (1)) 2. Correct TX_SW_CFG1 MAC reg from v3 of vendor driver see https://gitlab.com/dm38/padavan-ng/-/blob/master/trunk/proprietary/rt_wifi/rtpci/3.0.X.X/mt76x2/chips/rt6352.c#L531 3. Set bbp66 for all chains. 4. US_CYC_CNT init based on Programming guide, default value was 33 (pci), set chipset bus clock with fallback to cpu clock/3. 5. Don't overwrite default values for mt7620. 6. Correct some typos. 7. Add support for external LNA: a) RF and BBP regs never be corrected for this mode b) eLNA is driven the same way as ePA with mt7620's pin PA but vendor driver explicitly pin PA to gpio mode (for forrect calibration?) so I'm not sure that request for pa_pin in dts-file will be enough First 5 changes (really 2) improve performance for boards w/o eLNA/ePA. Changes 7 add support for eLNA Configuration w/o eLAN/ePA and with eLNA show results tx/rx (from router point of view) for each stream: 35-40/30-35 Mbps for HT20 65-70/60-65 Mbps for HT40 Yes. Max results for 2T2R client is 140-145/135-140 with peaks 160/150, It correspond to mediatek driver results. Boards with ePA untested. Reported-by: Serge Vasilugin <vasilugin@yandex.ru> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mac80211: add patch descriptions to rt2x00 patchesDaniel Golle2022-09-126-1/+76
| | | | | | | Prepare patches for sending upstream by adding patch descriptions generated from the original OpenWrt commits adding each patch. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* unetd: only depend on bpf-headers if BPF toolchain support is availableFelix Fietkau2022-09-121-1/+1
| | | | | | If BPF is unavailable, unetd can be built without it (by disabling VXLAN support). Signed-off-by: Felix Fietkau <nbd@nbd.name>
* ramips: add support for ZyXEL Keenetic 4G Rev.B DeviceSergei Burakov2022-09-133-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | Specification: SoC: RT5350 CPU Frequency: 360 MHz Flash Chip: Macronix MX25L6406E (8192 KiB) RAM: Winbond W9825G6JH-6 (32768 KiB) 3x 10/100 Mbps Ethernet (2x LAN, 1x WAN) 1x external antenna UART (J1) header on PCB (57800 8n1) Wireless: SoC-intergated: 2.4GHz 802.11bgn USB: Yes 8x LED, 2x button Flash instruction: Configure PC with static IP 192.168.99.8/24 and start TFTP server. Rename "openwrt-ramips-rt305x-zyxel_keenetic-4g-b-squashfs-sysupgrade.bin" to "rt305x_firmware.bin" and place it in TFTP server directory. Connect PC with one of LAN ports, press the reset button, power up the router and keep button pressed until power LED start blinking. Router will download file from TFTP server, write it to flash and reboot. Signed-off-by: Sergei Burakov <senior.anonymous@mail.ru>
* mediatek: unset CONFIG_CMDLINE_OVERRIDE for all targets but mt7629Daniel Golle2022-09-123-0/+3
| | | | | | | | | | The newly introduced config symbol CONFIG_CMDLINE_OVERRIDE is only set for mt7629 for now which breaks automated build on all other mediatek subtargets. Make sure the symbol is configured as 'is not set' for all remaining subtargets. Fixes: c27279dc26 ("mediatek: add support for ipTIME A6004MX Add basic support for ipTIME A6004MX.") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: add support for ipTIME A6004MX Add basic support for ipTIME A6004MX.Yoonji Park2022-09-129-0/+416
| | | | | | | | | | | | | | | | | | | | | | | | | Hardware: SoC: MediaTek MT7629 Cortex-A7 (ARMv7 1.25GHz, Dual-Core) RAM: DDR3 128MB Flash: Macronix MX35LF1GE4AB (SPI-NAND 128MB) WiFi: MediaTek MT7761N (2.4GHz) / MediaTek MT7762N (5GHz) - no driver Ethernet: SoC (WAN) / MediaTek MT7531 (LAN x4) UART: [GND, RX, TX, 3.3V] (115200) Installation: - Flash recovery image with TFTP recovery Revert to stock firmware: - Flash stock firmware with TFTP recovery TFTP Recovery method: 1. Unplug the router 2. Hold the reset button and plug in 3. Release when the power LED stops flashing and go off 4. Set your computer IP address manually to 192.168.0.x / 255.255.255.0 5. Flash image with TFTP client to 192.168.0.1 Signed-off-by: Yoonji Park <koreapyj@dcmys.kr>
* kernel: add support for mtdsplit-fit offsetYoonji Park2022-09-121-4/+7
| | | | | | | | | | Support devices that has vendor custom header before FIT image. Some devices has vendor custom header before FIT image. In this case mtd- split can not find FIT image and it results in rootfs mount failure. Please refer iptime,a6004mx device for further examples. Signed-off-by: Yoonji Park <koreapyj@dcmys.kr>
* firmware-utils: update to git HEADDaniel Golle2022-09-121-3/+3
| | | | | | 0c92b20 iptime-crc32: add support for A6004MX Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* xdp-tools: don't rely on host bpf headersDaniel Golle2022-09-121-1/+5
| | | | | | | | | | xdp-tools build currently breaks on build hosts which do not have libbpf headers installed because the build system wrongly tries to use the host's include path. Properly pass path to libbpf headers to xdp-tools build system to fix build e.g. on the buildbots. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* mediatek: disable unsupported background radar detectionShiji Yang2022-09-123-2/+7
| | | | | | | | | | | MT7915 requires an additional antenna for background radar scanning. Disable this feature in the following devices that do not have a separate DFS antenna: linksys,e8450 ruijie,rg-ew3200gx-pro xiaomi,redmi-router-ax6s Signed-off-by: Shiji Yang <yangshiji66@qq.com>
* ramips: disable unsupported background radar detectionShiji Yang2022-09-127-0/+7
| | | | | | | | | | | | | | | | | | | Background radar detection is not supported on devices that using MT7905, so disable this feature in the following devices: asus,rt-ax53u jcg,q20 tplink,eap615-wall-v1 xiaomi,mi-router-cr6606 xiaomi,mi-router-cr6608 xiaomi,mi-router-cr6609 yuncore,ax820 Devices with MT7915 lacking a DFS antenna also do not support background DFS: totolink,x5000r cudy,x6 Signed-off-by: Shiji Yang <yangshiji66@qq.com>
* ramips: use lzma-loader on Sitecom WLR-6000Jasper Scholte2022-09-111-0/+1
| | | | | | | Fixes the boot loader LZMA decompression issue: LZMA ERROR 1 - must RESET board to recover Signed-off-by: Jasper Scholte <NightNL@outlook.com>
* ath79: Make patches apply againHauke Mehrtens2022-09-115-15/+15
| | | | | | | | The patch adding support for LEDs connected to a reset controller did not apply any more, refresh it on top of current master. Fixes: 53fc987b2552 ("generic: move ledbar driver from mediatek target") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ath79: add support for TP-Link TL-WR941ND v5Will Moss2022-09-114-2/+117
| | | | | | | | | | | | | | | | | | | Specifications: - SoC: ar9341 - RAM: 32M - Flash: 4M - Ethernet: 5x FE ports - WiFi: ar9341-wmac Flash instruction: Upload generated factory firmware on vendor's web interface. This device is very similar to the TL-WR841N v8, only two LED GPIOs are different. Buttons configuration is similar to TL-WR842ND v2 but both buttons are active low. Signed-off-by: Will Moss <willormos@gmail.com>
* ath79: add support for TP-Link Deco S4Nick French2022-09-117-2/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for TP-Link Deco S4 wifi router The label refers to the device as S4R and the TP-Link firmware site calls it the Deco S4 v2. (There does not appear to be a v1) Hardware (and FCC id) are identical to the Deco M4R v2 but the flash layout is ordered differently and the OEM firmware encrypts some config parameters (including the label mac address) in flash In order to set the encrypted mac address, the wlan's caldata node is removed from the DTS so the mac can be decrypted with the help of the uencrypt tool and patched into the wlan fw via hotplug Specifications: SoC: QCA9563-AL3A RAM: Zentel A3R1GE40JBF Wireless 2.4GHz: QCA9563-AL3A (main SoC) Wireless 5GHz: QCA9886 Ethernet Switch: QCA8337N-AL3C Flash: 16 MB SPI NOR UART serial access (115200N1) on board via solder pads: RX = TP1 pad TX = TP2 pad GND = C201 (pad nearest board edge) The device's bootloader and web gui will only accept images that were signed using TP-Link's RSA key, however a memory safety bug in the bootloader can be leveraged to install openwrt without accessing the serial console. See developer forum S4 support page for link to a "firmware" file that starts a tftp client, or you may generate one on your own like this: ``` python - > deco_s4_faux_fw_tftp.bin <<EOF import sys from struct import pack b = pack('>I', 0x00008000) + b'X'*16 + b"fw-type:" \ + b'x'*256 + b"S000S001S002" + pack('>I', 0x80060200) \ b += b"\x00"*(0x200-len(b)) \ + pack(">33I", *[0x3c0887fc, 0x35083ddc, 0xad000000, 0x24050000, 0x3c048006, 0x348402a0, 0x3c1987f9, 0x373947f4, 0x0320f809, 0x00000000, 0x24050000, 0x3c048006, 0x348402d0, 0x3c1987f9, 0x373947f4, 0x0320f809, 0x00000000, 0x24050000, 0x3c048006, 0x34840300, 0x3c1987f9, 0x373947f4, 0x0320f809, 0x00000000, 0x24050000, 0x3c048006, 0x34840400, 0x3c1987f9, 0x373947f4, 0x0320f809, 0x00000000, 0x1000fff1, 0x00000000]) b += b"\xff"*(0x2A0-len(b)) + b"setenv serverip 192.168.0.2\x00" b += b"\xff"*(0x2D0-len(b)) + b"setenv ipaddr 192.168.0.1\x00" b += b"\xff"*(0x300-len(b)) + b"tftpboot 0x81000000 initramfs-kernel.bin\x00" b += b"\xff"*(0x400-len(b)) + b"bootm 0x81000000\x00" b += b"\xff"*(0x8000-len(b)) sys.stdout.buffer.write(b) EOF ``` Installation: 1. Run tftp server on pc with static ip 192.168.0.2 2. Place openwrt "initramfs-kernel.bin" image in tftp root dir 3. Connect pc to router ethernet port1 4. While holding in reset button on bottom of router, power on router 5. From pc access router webgui at http://192.168.0.1 6. Upload deco_s4_faux_fw_tftp.bin 7. Router will load and execture in-memory openwrt 8. Switch pc back to dhcp or static 192.168.1.x 9. Flash openwrt sysupgrade image via luci/ssh at 192.168.1.1 Revert to stock: Press and hold reset button while powering device to start the bootloader's recovery mode, where stock firmware can be uploaded via web gui at 192.168.0.1 Please note that one additional non-github commits is also needed: firmware-utils: add tplink-safeloader support for Deco S4 Signed-off-by: Nick French <nickfrench@gmail.com>
* firmware-utils: update to git HEADHauke Mehrtens2022-09-111-3/+3
| | | | | | 71e1db6 tplink-safeloader: add TP-Link Deco S4 v2 support Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* ath79: add support for Senao Watchguard AP100Michael Pratt2022-09-117-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FCC ID: U2M-CAP2100AG WatchGuard AP100 is an indoor wireless access point with 1 Gb ethernet port, dual-band but single-radio wireless, internal antenna plates, and 802.3at PoE+ this board is a Senao device: the hardware is equivalent to EnGenius EAP300 v2 the software is modified Senao SDK which is based on openwrt and uboot including image checksum verification at boot time, and a failsafe image that boots if checksum fails **Specification:** - AR9344 SOC MIPS 74kc, 2.4 GHz AND 5 GHz WMAC, 2x2 - AR8035-A EPHY RGMII GbE with PoE+ IN - 25 MHz clock - 16 MB FLASH mx25l12805d - 2x 64 MB RAM - UART console J11, populated - GPIO watchdog GPIO 16, 20 sec toggle - 2 antennas 5 dBi, internal omni-directional plates - 5 LEDs power, eth0 link/data, 2G, 5G - 1 button reset **MAC addresses:** Label has no MAC Only one Vendor MAC address in flash at art 0x0 eth0 ---- *:e5 art 0x0 -2 phy0 ---- *:e5 art 0x0 -2 **Installation:** Method 1: OEM webpage use OEM webpage for firmware upgrade to upload factory.bin Method 2: root shell It may be necessary to use a Watchguard router to flash the image to the AP and / or to downgrade the software on the AP to access SSH For some Watchguard devices, serial console over UART is disabled. NOTE: DHCP is not enabled by default after flashing **TFTP recovery:** reset button has no function at boot time only possible with modified uboot environment, (see commit message for Watchguard AP300) **Return to OEM:** user should make backup of MTD partitions and write the backups back to mtd devices in order to revert to OEM reliably It may be possible to use sysupgrade with an OEM image as well... (not tested) **OEM upgrade info:** The OEM upgrade script is at /etc/fwupgrade.sh OKLI kernel loader is required because the OEM software expects the kernel to be no greater than 1536k and the factory.bin upgrade procedure would otherwise overwrite part of the kernel when writing rootfs. **Note on eth0 PLL-data:** The default Ethernet Configuration register values will not work because of the external AR8035 switch between the SOC and the ethernet port. For AR934x series, the PLL registers for eth0 can be see in the DTSI as 0x2c. Therefore the PLL registers can be read from uboot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x1805002c 1`. The clock delay required for RGMII can be applied at the PHY side, using the at803x driver `phy-mode`. Therefore the PLL registers for GMAC0 do not need the bits for delay on the MAC side. This is possible due to fixes in at803x driver since Linux 5.1 and 5.3 **Note on WatchGuard Magic string:** The OEM upgrade script is a modified version of the generic Senao sysupgrade script which is used on EnGenius devices. On WatchGuard boards produced by Senao, images are verified using a md5sum checksum of the upgrade image concatenated with a magic string. this checksum is then appended to the end of the final image. This variable does not apply to all the senao devices so set to null string as default Tested-by: Steve Wheeler <stephenw10@gmail.com> Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: add support for Senao WatchGuard AP200Michael Pratt2022-09-117-0/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FCC ID: U2M-CAP4200AG WatchGuard AP200 is an indoor wireless access point with 1 Gb ethernet port, dual-band wireless, internal antenna plates, and 802.3at PoE+ this board is a Senao device: the hardware is equivalent to EnGenius EAP600 the software is modified Senao SDK which is based on openwrt and uboot including image checksum verification at boot time, and a failsafe image that boots if checksum fails **Specification:** - AR9344 SOC MIPS 74kc, 2.4 GHz WMAC, 2x2 - AR9382 WLAN PCI card 168c:0030, 5 GHz, 2x2, 26dBm - AR8035-A EPHY RGMII GbE with PoE+ IN - 25 MHz clock - 16 MB FLASH mx25l12805d - 2x 64 MB RAM - UART console J11, populated - GPIO watchdog GPIO 16, 20 sec toggle - 4 antennas 5 dBi, internal omni-directional plates - 5 LEDs power, eth0 link/data, 2G, 5G - 1 button reset **MAC addresses:** Label has no MAC Only one Vendor MAC address in flash at art 0x0 eth0 ---- *:be art 0x0 -2 phy1 ---- *:bf art 0x0 -1 phy0 ---- *:be art 0x0 -2 **Installation:** Method 1: OEM webpage use OEM webpage for firmware upgrade to upload factory.bin Method 2: root shell It may be necessary to use a Watchguard router to flash the image to the AP and / or to downgrade the software on the AP to access SSH For some Watchguard devices, serial console over UART is disabled. NOTE: DHCP is not enabled by default after flashing **TFTP recovery:** reset button has no function at boot time only possible with modified uboot environment, (see commit message for Watchguard AP300) **Return to OEM:** user should make backup of MTD partitions and write the backups back to mtd devices in order to revert to OEM reliably It may be possible to use sysupgrade with an OEM image as well... (not tested) **OEM upgrade info:** The OEM upgrade script is at /etc/fwupgrade.sh OKLI kernel loader is required because the OEM software expects the kernel to be no greater than 1536k and the factory.bin upgrade procedure would otherwise overwrite part of the kernel when writing rootfs. **Note on eth0 PLL-data:** The default Ethernet Configuration register values will not work because of the external AR8035 switch between the SOC and the ethernet port. For AR934x series, the PLL registers for eth0 can be see in the DTSI as 0x2c. Therefore the PLL registers can be read from uboot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x1805002c 1`. The clock delay required for RGMII can be applied at the PHY side, using the at803x driver `phy-mode`. Therefore the PLL registers for GMAC0 do not need the bits for delay on the MAC side. This is possible due to fixes in at803x driver since Linux 5.1 and 5.3 **Note on WatchGuard Magic string:** The OEM upgrade script is a modified version of the generic Senao sysupgrade script which is used on EnGenius devices. On WatchGuard boards produced by Senao, images are verified using a md5sum checksum of the upgrade image concatenated with a magic string. this checksum is then appended to the end of the final image. This variable does not apply to all the senao devices so set to null string as default Tested-by: Steve Wheeler <stephenw10@gmail.com> Tested-by: John Delaney <johnd@ankco.net> Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: add support for Senao WatchGuard AP300Michael Pratt2022-09-118-4/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FCC ID: Q6G-AP300 WatchGuard AP300 is an indoor wireless access point with 1 Gb ethernet port, dual-band wireless, internal antenna plates, and 802.3at PoE+ this board is a Senao device: the hardware is equivalent to EnGenius EAP1750 the software is modified Senao SDK which is based on openwrt and uboot including image checksum verification at boot time, and a failsafe image that boots if checksum fails **Specification:** - QCA9558 SOC MIPS 74kc, 2.4 GHz WMAC, 3x3 - QCA9880 WLAN PCI card 168c:003c, 5 GHz, 3x3, 26dBm - AR8035-A PHY RGMII GbE with PoE+ IN - 40 MHz clock - 32 MB FLASH S25FL512S - 2x 64 MB RAM NT5TU32M16 - UART console J10, populated - GPIO watchdog GPIO 16, 20 sec toggle - 6 antennas 5 dBi, internal omni-directional plates - 5 LEDs power, eth0 link/data, 2G, 5G - 1 button reset **MAC addresses:** MAC address labeled as ETH Only one Vendor MAC address in flash at art 0x0 eth0 ETH *:3c art 0x0 phy1 ---- *:3d --- phy0 ---- *:3e --- **Serial console access:** For this board, its not certain whether UART is possible it is likely that software is blocking console access the RX line on the board for UART is shorted to ground by resistor R176 the resistors R175 and R176 are next to the UART RX pin at J10 however console output is garbage even after this fix **Installation:** Method 1: OEM webpage use OEM webpage for firmware upgrade to upload factory.bin Method 2: root shell access downgrade XTM firewall to v2.0.0.1 downgrade AP300 firmware: v1.0.1 remove / unpair AP from controller perform factory reset with reset button connect ethernet to a computer login to OEM webpage with default address / pass: wgwap enable SSHD in OEM webpage settings access root shell with SSH as user 'root' modify uboot environment to automatically try TFTP at boot time (see command below) rename initramfs-kernel.bin to test.bin load test.bin over TFTP (see TFTP recovery) (optionally backup all mtdblocks to have flash backup) perform a sysupgrade with sysupgrade.bin NOTE: DHCP is not enabled by default after flashing **TFTP recovery:** server ip: 192.168.1.101 reset button seems to do nothing at boot time... only possible with modified uboot environment, running this command in the root shell: fw_setenv bootcmd 'if ping 192.168.1.101; then tftp 0x82000000 test.bin && bootm 0x82000000; else bootm 0x9f0a0000; fi' and verify that it is correct with fw_printenv then, before boot, the device will attempt TFTP from 192.168.1.101 looking for file 'test.bin' to return uboot environment to normal: fw_setenv bootcmd 'bootm 0x9f0a0000' **Return to OEM:** user should make backup of MTD partitions and write the backups back to mtd devices in order to revert to OEM (see installation method 2) It may be possible to use sysupgrade with an OEM image as well... (not tested) **OEM upgrade info:** The OEM upgrade script is at /etc/fwupgrade.sh OKLI kernel loader is required because the OEM software expects the kernel to be no greater than 1536k and the factory.bin upgrade procedure would otherwise overwrite part of the kernel when writing rootfs. **Note on eth0 PLL-data:** The default Ethernet Configuration register values will not work because of the external AR8035 switch between the SOC and the ethernet port. For QCA955x series, the PLL registers for eth0 and eth1 can be see in the DTSI as 0x28 and 0x48 respectively. Therefore the PLL registers can be read from uboot for each link speed after attempting tftpboot or another network action using that link speed with `md 0x18050028 1` and `md 0x18050048 1`. The clock delay required for RGMII can be applied at the PHY side, using the at803x driver `phy-mode`. Therefore the PLL registers for GMAC0 do not need the bits for delay on the MAC side. This is possible due to fixes in at803x driver since Linux 5.1 and 5.3 **Note on WatchGuard Magic string:** The OEM upgrade script is a modified version of the generic Senao sysupgrade script which is used on EnGenius devices. On WatchGuard boards produced by Senao, images are verified using a md5sum checksum of the upgrade image concatenated with a magic string. this checksum is then appended to the end of the final image. This variable does not apply to all the senao devices so set to null string as default Tested-by: Alessandro Kornowski <ak@wski.org> Tested-by: John Wagner <john@wagner.us.org> Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: fix RGMII delay for ar9344 Senao APsMichael Pratt2022-09-111-8/+1
| | | | | | | | after some trial and error, it was discovered that by setting TX only delay on the AR8035 PHY that setting GMAC registers is no longer necessary. Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ath79: rename an engenius DTSI to generic senao nameMichael Pratt2022-09-113-2/+2
| | | | | | | | | | | | Other vendors can use this DTSI, for example, WatchGuard there are likely several brands that use the same board design because of outsourcing hardware from Senao. For example, Watchguard AP300 has the same hardware as Engenius EAP600 so we use ar9344_engenius_exx600.dtsi for that Signed-off-by: Michael Pratt <mcpratt@pm.me>
* mediatek: fix ledbar of UniFi 6 LR when running custom U-BootDaniel Golle2022-09-111-1/+2
| | | | | | | | | | The RGB LED of the UniFi 6 LR v1 doesn't work when using the Openwrt- built U-Boot. This is because the vendor loader resets the ledbar controller while our U-Boot doesn't care. Add reset-gpio so the ledbar driver in Linux will always reset the ledbar controller. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ramips: add support for Ubiquiti UniFi FlexHDSven Wegener2022-09-115-0/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- - SoC: MediaTek MT7621AT with 128 MiB RAM and 32 MiB Flash - Wi-Fi: MediaTek MT7603 (b/g/n, 2x2) and MediaTek MT7615 (ac, 4x4) - Bluetooth: CSR8811 (internal USB, install kmod-bluetooth) Installation ------------ 1. Connect to the booted device at 192.168.1.20 using username/password "ubnt". 2. Update the bootloader environment. $ fw_setenv devmode TRUE $ fw_setenv boot_openwrt "fdt addr \$(fdtcontroladdr); fdt rm /signature; bootubnt" $ fw_setenv bootcmd "run boot_openwrt" 3. Transfer the OpenWrt sysupgrade image to the device using SCP. 4. Check the mtd partition number for bs / kernel0 / kernel1 $ cat /proc/mtd 5. Set the bootselect flag to boot from kernel0 $ dd if=/dev/zero bs=1 count=1 of=/dev/mtdblock4 6. Write the OpenWrt sysupgrade image to both kernel0 as well as kernel1 $ dd if=openwrt.bin of=/dev/mtdblock6 $ dd if=openwrt.bin of=/dev/mtdblock7 7. Reboot the device. It should boot into OpenWrt. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* generic: move ledbar driver from mediatek targetSven Wegener2022-09-115-0/+31
| | | | | | This moves the ledbar driver to generic, to be also used by the ramips target. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* mediatek: add led countSven Wegener2022-09-111-1/+7
| | | | | | | | | The LEDs connected to the MCU are so-called smart LEDs and their signal is daisy-chained. Because of this, the MCU needs to be told how many LEDs are connected. It also means the LEDs could be individually controlled, if the MCU has a command for this. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* mediatek: add initialization after resetSven Wegener2022-09-111-0/+14
| | | | | | | | During GPIO initialization the pin state flips and triggers a reset of the ledbar MCU. It needs to be moved through an initialization sequence before working correctly. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* mediatek: add support for reset gpioSven Wegener2022-09-111-0/+26
| | | | | | | Some versions of the ledbar MCU have a reset pin. It needs to be correctly initialized or we might keep the MCU in reset state. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* mediatek: support reading more than one byte of responseSven Wegener2022-09-111-7/+8
| | | | | | There are commands that return more than one byte of response. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* mediatek: cast literal value to charSven Wegener2022-09-111-1/+1
| | | | | | | | | | Or the comparison against a signed char is always true, because the literal 0xaa is treated as an unsigned int, to which the signed char is casted during comparison. 0xaa is above the positive values of a signed char and negative signed char values result in values larger than 0xaa when casted to unsigned int. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* mediatek: correctly log i2c responseSven Wegener2022-09-111-2/+2
| | | | | | | The read response is in the i2c_response variable. Also use %hhx format, because we're dealing with a single char. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* mediatek: remove gpiod_direction_output()Sven Wegener2022-09-111-2/+0
| | | | | | It's already set to output with GPIOD_OUT_LOW. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* mediatek: do not use gpiod_set_raw_value()Sven Wegener2022-09-111-2/+2
| | | | | | The polarity of the signal is set in the device dts. Signed-off-by: Sven Wegener <sven.wegener@stealer.net>
* kernel: modules: package kmod-crypto-essivDaniel Golle2022-09-111-0/+12
| | | | | | Package kernel module providing ESSIV support for block encryption. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ipq40xx: add GL-AP1300 label-mac-deviceDavid Bauer2022-09-111-0/+1
| | | | Signed-off-by: David Bauer <mail@david-bauer.net>
* prereq-build: add check for stdlibRosen Penev2022-09-111-0/+4
| | | | | | | | | | | One way to solve the python3 dependency check is to install python3-minimal instead of python3 on Debian based systems. Unfortunately, this results in a fairly unusable python. Added check for ntpath, which is how the issue originally presented itself. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* prereq-build: fix python distutils detectionRosen Penev2022-09-111-1/+1
| | | | | | | | | Debian and by extension Ubuntu packages distutils in a suboptimal way where import distutils works but none of the methods do. This alternative check verifies that distutils is actually usable. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ipq40xx: add WAN LED mapping for GL-AP1300David Bauer2022-09-111-0/+3
| | | | Signed-off-by: David Bauer <mail@david-bauer.net>
* ramips: ASUS RT-ACx5P phy[01]radio to phy[01]tptDavid Santamaría Rogado2022-09-111-2/+2
| | | | | | | | phy[01]radio leaves the leds always on, if they are set through sysfs the leds get off. Set the triggers to phy[01]tpt to make them work. Signed-off-by: David Santamaría Rogado <howl.nsp@gmail.com>
* build: handle directory with whitespace in AUTOREMOVE cleanChristian Marangi2022-09-112-4/+4
| | | | | | | | | Package with whitespace in their build directory are not correctly removed when CONFIG_AUTOREMOVE is enabled. This is caused by xargs that use whitespace as delimiters. To handle this use \0 as the delimiter and set find to use \0 as the delimiter. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
* toolchain: gcc: improve patch handling by introducing major versionNick Hainke2022-09-1174-1/+2
| | | | | | | | | | | Every minor version bump of a major version will result in a huge patch diff because of the moving of all the patches from version e.g. 11.2.0 to 11.3.0. This commit only use the major version for the patch folders to differentiate between the different gcc versions. This will significantly improve the reviewing of the smaller version bump patches and help to see what really changed in a minor version bump. Signed-off-by: Nick Hainke <vincent@systemli.org>
* depends.mk: fix typo in rdep functionMichael Pratt2022-09-111-1/+1
| | | | | | | | | | | Just like later in the file, the precursor to <stampfile>_check <stampfile>_check.1 is supposed to be moved to <stampfile>_check before it is touched. This line would error if it was ever run. Signed-off-by: Michael Pratt <mcpratt@pm.me>
* CI: package kmods in kernel workflowChristian Marangi2022-09-111-0/+5
| | | | | | | Actually package kmods in kernel workflow to catch dependency error and other problem that may arise from kmods packaging. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
* oxnas: add testing support for Linux 5.15Daniel Golle2022-09-1115-0/+1295
| | | | | | | Rebase patches and port SATA driver to work with Linux > 5.13. Tested on Shuttle KD-20. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ramips: add config-5.15 for rt3883 subtargetDaniel Golle2022-09-111-0/+179
| | | | | | | Add Kernel config for testing Linux 5.15 for the rt3883 subtarget. Compile tested only. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ramips: add config-5.15 for rt305x subtargetDaniel Golle2022-09-111-0/+179
| | | | | | | Add Kernel config for testing Linux 5.15 for the rt305x subtarget. Tested on ZyXEL NBG-419N, works but bad wireless performance. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ramips: add config-5.15 for rt288x subtargetDaniel Golle2022-09-111-0/+180
| | | | | | | Add Kernel config for testing Linux 5.15 for the rt288x subtarget. Compile tested only. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* ramips: add config-5.15 for mt76x8 subtargetDaniel Golle2022-09-111-0/+193
| | | | | | | Add Kernel config for testing Linux 5.15 for the mt76x8 subtarget. Compile tested only. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* kernel: add and enable MGLRU for Linux 5.15Rui Salvaterra2022-09-1111-0/+5180
| | | | | | | Backport a preliminary version of Yu Zhao's multi-generational LRU, for improved memory management. Refresh the patches while at it. Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-28 07:49:19 +0000