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* ramips: add support for RAISECOM MSG1500 X.00Liangkuan Yang2022-01-085-0/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | RAISECOM MSG1500 X.00 is a 2.4/5 GHz band 11ac (Wi-Fi 5) router. Apart from the general model, there are two ISP customized models: China Mobile and China Telecom. Specifications: - SoC: Mediatek MT7621AT - RAM: 256MiB DDR3 - Flash: 128MiB NAND - Ethernet: 5 * 10/100/1000Mbps: 4 * LAN + 1 * WAN - Switch: MediaTek MT7530 (SoC) - WLAN: 1 * MT7615DN Dual-Band 2.4GHz 2T2R (400Mbps) 5GHz 2T2R (867Mbps) - USB: 1 * USB 2.0 port - Button: 1 * RESET button, 1 * WPS button, 1 * WIFI button - LED: blue color: POWER, WAN, WPS, 2.4G, 5G, LAN1, LAN2, LAN3, LAN4, USB - UART: 1 * serial port header (4-pin) - Power: DC 12V, 1A - Switch: 1 * POWER switch MAC addresses as verified by vendor firmware: use address source LAN C8:XX:XX:3A:XX:E7 Config "protest_lan_mac" ascii (label) WAN C8:XX:XX:3A:XX:EA Config "protest_wan_mac" ascii 5G C8:XX:XX:3A:XX:E8 Factory "0x4" hex 2.4G CA:XX:XX:4A:XX:E8 [not on flash] The increment of the 4th byte for the 2.4g address appears to vary. Reported cases: 5g 2.4g increment C8:XX:XX:90:XX:C3 CA:XX:XX:C0:XX:C3 0x30 C8:XX:XX:3A:XX:08 CA:XX:XX:4A:XX:08 0x10 C8:XX:XX:3A:XX:E8 CA:XX:XX:4A:XX:E8 0x10 Since increment is inconsistent and there is no obvious pattern in swapping bytes, and the 2.4g address has local bit set anyway, it seems safer to use the LAN address with flipped byte here in order to prevent collisions between OpenWrt devices and OEM devices for this interface. This way we at least use an address as base that is definitely owned by the device at hand. Notes: 1. The vendor firmware allows you to connect to the router by telnet. (known version 1.0.0 can open telnet.) There is no official binary firmware available. Backup the important partitions data: "Bootloader", "Config", "Factory", and "firmware". Note that with the vendor firmware the memory is detected only 128MiB and the last 512KiB in NAND flash is not used. 2. The POWER LED is default on after press POWER switch. The WAN and LAN1 - 4 LEDs are wired to ethernet switch. The WPS LED is controlled by MT7615DN's GPIO. Currently there is no proper way to configure it. 3. At the time of adding support the wireless config needs to be set up by editing the wireless config file: * Setting the country code is mandatory, otherwise the router loses connectivity at the next reboot. This is mandatory and can be done from luci. After setting the country code the router boots correctly. A reset with the reset button will fix the issue and the user has to reconfigure. * This is minor since the 5g interface does not come up online although it is not set as disabled. 2 options here: 1- Either run the "wifi" command. Can be added from LuCI in system - startup - local startup and just add wifi above "exit 0". 2- Or add the serialize option in the wireless config file as shown below. This one would work and bring both interfaces automatically at every boot: config wifi-device 'radio0' option serialize '1' config wifi-device 'radio1' option serialize '1' Flash instructions using initramfs image: 1. Press POWER switch to power down if the router is running. 2. Connect PC to one of LAN ports, and set static IP address to "10.10.10.2", netmask to "255.255.255.0", and gateway to "10.10.10.1" manually on the PC. 3. Push and hold the WIFI button, and then power up the router. After about 10s (or you can call the recovery page, see "4" below) you can release the WIFI button. There is no clear indication when the router is entering or has entered into "RAISECOM Router Recovery Mode". 4. Call the recovery page for the router at "http://10.10.10.1". Keep an eye on the "WARNING!! tip" of the recovery page. Click "Choose File" to select initramfs image, then click "Upload". 5. If image is uploaded successfully, you will see the page display "Device is upgrading the firmware... %". Keep an eye on the "WARNING!! tip" of the recovery page. When the page display "Upgrade Successfully", you can set IP address as "automatically obtain". 6. After the rebooting (PC should automatically obtain an IP address), open the SSH connection, then download the sysupgrade image to the router and perform sysupgrade with it. Flash back to vendor firmware: See "Flash instructions 1 - 5" above. The only difference is that in step 4 you should select the vendor firmware which you backup. Signed-off-by: Liangkuan Yang <ylk951207@gmail.com>
* ramips: add support for Joowin WR758AC V1 and V2Rodrigo Araujo2022-01-085-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for Joowin (aka Comfast) WR758AC V1 and V2 devices. Both have the same wall AP/repeater form factor and differ only in the 5Ghz chipset (V1 has MT7662, V2 has MT7663). OpenWrt developers forum page: https://forum.openwrt.org/t/87355 Specifications: - CPU: MediaTek MT7628AN (580MHz) - Flash: 8MB - RAM: 64MB DDR2 - 2.4 GHz: 802.11b/g/n (MT7603) - 5 GHz: 802.11ac (V1 has MT7662, V2 has MT7663) - Antennas: 4x external single band antennas - LAN: 1x 10/100M - LED: Wifi 3x blue. Programmable - Button: WPS MAC addresses as verified by OEM firmware: use address source LAN *:83 factory 0xe000 2g *:85 factory 0x4 5g *:86 factory 0x8004 How to install: 1- Setup a TFTP server on a machine with IP address 192.168.1.10/24 2- Name the image as `firmware_auto.bin` and place it on the root of the TFTP server 3- Connect the device via Ethernet, it should pick and flash the image Signed-off-by: Rodrigo Araujo <araujo.rm@gmail.com>
* utils/mdadm: fix build on hosts without /run dirSergey V. Lobanov2022-01-081-1/+1
| | | | | | | CHECK_RUN_DIR=0 must be a part of MAKE_FLAGS, not MAKE_VARS, otherwise it is not possible to compile mdadm on host without /run dir. Signed-off-by: Sergey V. Lobanov <sergey@lobanov.in>
* kernel: enhance multicast routing supportMatthew Hagan2022-01-081-2/+22
| | | | | | | | | | | | | | Certain utilities, such as smcroute [1], require additional multicast routing options to be enabled, otherwise they will not function correctly. Enable these relevant dependancies when IPv4 and/or IPv6 multicast routing are enabled. [1] https://github.com/troglobit/smcroute/blob/master/README.md#linux-requirements This increases the uncompressed kernel size on MIPS 24kc by 8KBytes and the compressed kernel size by 1.8KBytes. Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
* kernel: bump 5.10 to 5.10.90Rui Salvaterra2022-01-079-22/+13
| | | | | | | | Add and enable a new kconfig knob to disable unprivileged eBPF by default. Patches automatically rebased. Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
* kernel: bump 5.4 to 5.4.170John Audia2022-01-073-17/+7
| | | | | | | | | All patches automatically rebased. Build system: x86_64 Build-tested: ramips/mt7621 Signed-off-by: John Audia <graysky@archlinux.us>
* toolchain: glibc: Enable --enable-bind-nowHauke Mehrtens2022-01-071-0/+1
| | | | | | | Enable --enable-bind-now when CONFIG_PKG_RELRO_FULL is set. This option is activated by default. This will enable full RELRO protection. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* toolchain: glibc: Increase minimum kernel version to 5.4Hauke Mehrtens2022-01-071-1/+1
| | | | | | | | Increase the minimum kernel version needed by the glibc compiled for OpenWrt to version 5.4. With this setting the glibc build will remove all code needed to support older kernel versions. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* toolchain: glibc: Update to version 2.34Hauke Mehrtens2022-01-074-12/+9
| | | | | | | | | | | | glibc version 2.34 does not provide versioned shared libraries any more, it only provides shared libraries using the ABI version. Do not try to copy them any more. The functions from libpthread and librt were integrated into the main binary, the libpthread.so and librt.so are only used for backwards compatibility any more. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
* firewall4: bump to git HEADStijn Tintel2022-01-061-2/+2
| | | | | | main.uc: fix device gathering Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
* firewall4: fix syntax error in dependency specJo-Philipp Wich2022-01-061-1/+1
| | | | | Fixes: ae60af8572 ("firewall4: order DEPENDS alphabetically") Signed-off-by: Jo-Philipp Wich <jo@mein.io>
* firewall/firewall4: provide uci-firewallStijn Tintel2022-01-062-2/+4
| | | | | | | | | | | | | | | | Provide uci-firewall via PROVIDES in both firewall and firewall4. This will allow us to change the dependency of luci-app-firewall to uci-firewall, making it possible to use it with either implementation. Move CONFLICTS from firewall4 to firewall, to solve this recursive dependency problem: tmp/.config-package.in:307:error: recursive dependency detected! tmp/.config-package.in:307: symbol PACKAGE_firewall is selected by PACKAGE_firewall4 tmp/.config-package.in:328: symbol PACKAGE_firewall4 depends on PACKAGE_firewall Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> Reviewed-by: Jo-Philipp Wich <jo@mein.io>
* firewall4: bump to git HEADStijn Tintel2022-01-061-4/+4
| | | | | | | | | | | | | | | | 4ead2a6 treewide: move executables to /sbin 9ebc2f4 fw4.uc: filter duplicates in fw4.set 85b74f3 treewide: support flow offloading be3b4e6 treewide: support hardware flow offloading 38889b7 treewide: support set timeout 31c7550 fw4.uc: do not skip defaults with invalid option 334a127 fw4.uc: introduce DEPRECATED flag 7a0d38f fw4.uc: add _name as deprecated option 5e7ad3b fw4.uc: don't fail on unknown options be5f4e3 fw4.uc: allow use of cidr in ipsets Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> Reviewed-by: Jo-Philipp Wich <jo@mein.io>
* firewall4: order DEPENDS alphabeticallyStijn Tintel2022-01-061-1/+5
| | | | | | | Add some line breaks while at at, to improve readability. Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> Reviewed-by: Jo-Philipp Wich <jo@mein.io>
* firewall4: drop kmod-ipt-nat from CONFLICTSStijn Tintel2022-01-061-1/+1
| | | | | | | | The limitation of not being able to use iptables and nft nat at the same time exists only in kernels before 4.18. Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> Reviewed-by: Jo-Philipp Wich <jo@mein.io>
* ltq-deu: disable arc4 algorithmDaniel Kestrel2022-01-061-4/+4
| | | | | | | ARC4 was used for WEP, which is not secure anymore. Therefor it is disabled in the driver, but the code is not removed for now. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: add aes_gcm algorithmDaniel Kestrel2022-01-061-0/+313
| | | | | | | | | | | | The lantiq AES hardware does not support the gcm algorithm. But it can be implemented in the driver as a combination of the aes_ctr algorithm and the xor plus gfmul operations for the hashing. Due to the wrapping of the several algorithms and the inefficient 16 byte block by 16 byte block invokation in the kernel implementations, this driver is about 3 times faster for the larger block sizes. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: change PKG_RELEASE to AUTORELEASEDaniel Kestrel2022-01-061-1/+1
| | | | | | As per suggestion by adschm, PKG_RELEASE is set to AUTORELEASE. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: remove redundant code for setting the key in aesDaniel Kestrel2022-01-061-120/+4
| | | | | | | | | | After adding xts and cbcmac the aes algorithm source had three sections for setting the aes key to the hardware which are identical. Method aes_set_key_hw was created which is now called from within the spinlock secured control sections in methods ifx_deu_aes, ifx_deu_aes_xts and aes_cbcmac_final_impl and reduces the size of ifxmips_aes.c. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: add shash cbcmac-aes algorithm to the driverDaniel Kestrel2022-01-061-5/+362
| | | | | | | | | | | | | | | | | | | Since commit 53b6783 hostapd is using the kernel api which includes the cbcmac-aes shash algorithm. The kernels implementation is a wrapper around the aes encryption algorithm, which encrypts block (16 bytes) by block. When the ltq-deu driver is present, it uses hardware aes, but every 16 byte encrypt requires setting the key. This is very inefficient and is a huge overhead. Since the cbcmac-aes is simply a hash that uses the cbc aes algorithm starting with an iv set to x'00' with an optional ecb aes encryption of a possible last incomplete block that is padded with the positional bytes of the last cbc encrypted block, this algorithm is now added to the driver. Most of the code is derived from md5-hmac and tailored for aes. Tested with the kernels crypto testmgr including extra tests against the kernels generic ccm module implementation. This patch also fixes the overallocation in the aes_ctx that is caused by using u32 instead of u8 for the aes keys. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: remove driver disablement for kernel 5.4 and aboveDaniel Kestrel2022-01-061-1/+1
| | | | | | | | Remove the dependency on kernel 5.4 from the Makefile to allow the driver to compile with kernel 5.10 or kernel versions higher than 5.4. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: add aes_xts algorithmDaniel Kestrel2022-01-061-0/+324
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lantiq AES hardware does not support the xts algorithm. Apart from the cipher text stealing (XTS), the AES XTS implementation is just an XOR with the IV, followed by AES ECB, followed by another XOR with the IV and as such can be also implemented by using the lantiq hardware's CBC AES implemention plus one additional XOR with the IV in the driver. The output IV by CBC AES is also not usable and the gfmul operation not supported by lantiq hardware. Both need to be done in the driver too in addition to the IV treatment which is the initial encryption by the other half of the input key and to set the IV to the IV registers for every block. In the generic kernel implementation, the block size for XTS is set to 16 bytes, although the algorithm is designed to process any size of input larger than 16 bytes. But since there is no way to indicate a minimum input length, the block size is used. This leads to certain issues when the skcipher walk functions are used, e.g. processing less than block size bytes is not supported by calling skcipher_walk_done. The walksize is 2 AES blocks because otherwise for splitted input or output data, less than blocksize is to be returned in some cases, which cannot be processed. Another issue was that depending on possible split of input/output data, just 16 bytes are returned while less than 16 bytes were remaining, while cipher text stealing requires 17 bytes or more for processing. For example, if the input is 60 bytes and the walk is 48, then processing 48 bytes leads to a return code of -EINVAL for skcipher_walk_done. Therefor the processed counter is used to figure out, when the actual cipher text stealing for the remaining bytes less than blocksize needs to be applied. Measured with cryptsetup benchmark, this XTS AES implementation is about 19% faster than the kernels XTS implementation that uses the hardware ECB AES (ca. 18.6 MiB/s vs. 15.8 MiB/s decryption 256b key). The implementation was tested with the kernels crypto testmgr against the kernels generic XTS AES implementation including extended tests. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: update initialisations for hmac algorithmsDaniel Kestrel2022-01-062-6/+4
| | | | | | | | | | | | The processing in the hmac algorithms depends on the status fields: count, dbn and started. Not all were initialised in the init method and after finishing the final method. Added missing fields to init method and call init method after finishing final. The memsets have the wrong size in the original driver and did not clear everything and are not necessary. Since no memset is done in the kernels generic implementation, memsets were removed. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: remove compiler warning and shorten locked sectionsDaniel Kestrel2022-01-067-43/+7
| | | | | | | | | | | | Removing hash pointer in _hmac_setkey since its not needed and causes a compiler warning. Make the spinlock control sections shorter and move initializations out of the control sections to free the spinlock faster for allowing other threads to use the hash engine. Minor improvements for indentation and removal of blanks and blank lines in some areas. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: fix temp size exceed in hmac algorithmsDaniel Kestrel2022-01-062-71/+146
| | | | | | | | | | | | | | | | | | | | | | | | | Exceeding the temp array size was not checked and instead storage not allocated by the driver was used/overwritten which in most cases resulted in reboots. This patch implements processing the input to the hash algorithm in tempsize chunks. The _hmac_final methods were changed to _hmac_final_impl adding a parameter that indicates intermediate or final processing. The started variable was added to the context to indicate, if there is an intermediate result in the context. For sha1_hmac the variable to store the intermediate hash was added to the context too. In order to avoid md5_hmac_final_impl being recursively called if the padding of the input and the resulting last transform during the hmac algorighms final processing causes the temp array to overflow and to make sure that there is at least one block in the temp array when the _hmac_final for final processing is called, the check for exceeding the temp array in _hmac_transform was moved before copying the block and incrementing dbn. dbn needs to be at least 1 at final processing time to let the hash engine apply the opad operation. To make the hash engine not apply the hmac algorithms final opad operation, for intermediate processing the dbn in the control register is set to a higher value than number of dbns are actually processed. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: fix setkey errors and static shared temp for hmac algosDaniel Kestrel2022-01-062-52/+137
| | | | | | | | | | | | | | | | | | | The hmac algorithms state, that keys larger than the key size should be hashed with the underlying hash algorithms and then those hashes are to be used as keys. This patch implements this. In order to avoid allocating a descriptor during setkey, a shash_desc pointer is added to the context. Another issue for multithreaded callers is the shared temp array. The temp array is static and as such would be shared among multithreaded callers, which obviously would neither work nor produce correct results. The temp array (4k size) is moved to the context and since the size of the context is limited, it can only be defined as pointer otherwise the initialisation of the hash algorithm fails. The allocations and freeing of both the temp and the desc pointer in the context are done by implementing cra_init and cra_exit functions for the hmac algorithms. Also improved indentation in some areas. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: fix ifxdeu-ctr-rfc3686(aes) not matching generic implDaniel Kestrel2022-01-061-1/+2
| | | | | | | | Error ifxdeu-ctr-rfc3686(aes) (16) doesn't match generic impl (20) occurs when running the cryptomgr extra tests that compare against the linux kernels generic implementation. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: changes for hash multithread callers and md5 endianessDaniel Kestrel2022-01-066-79/+45
| | | | | | | | | | | | | | | | | | | | | | | | | The algorithms sha1, sha1_hmac and md5_hmac all use ENDI=1. The md5 algorithm uses ENDI=0 and the endian_swap methods to reverse the endianess switch by using user CPU time, which is unnecessary overhead. Danube and AR9 devices do not set endianess for SHA1, so is done for MD5. Furthermore the patch replaces endian_swap with le32_to_cpu for md5 and md5 hmac algorithms and removes endian_swap for them. The init functions initialize the algorithm in the hardware. The lock is not used to write to the control register. If another thread calls another hash algo before update or final, the result will be wrong. Therefore move the algorithm init to the lock protected sections in the transform or final methods. Setting the hw key for the hmac algorithms is now done from within the lock protected sections in their final methods. The lock protecting is removed from the _hmac_setkey_hw functions. In final for md5 and sha1 the lock section is removed, because all the work was already done in transform (which is called from final). As such only copying the hash to the output is required. MD5 and MD5_HMAC produce 16 byte hashes (4 DWORDS) only, therefor writing register D5R to the hash output is removed for MD5_HMAC. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: make deu hash lock global and remove md5_hmac_ exportsDaniel Kestrel2022-01-066-48/+23
| | | | | | | | | | | All hash algorithms use the same base IFX_HASH_CON to access the hash unit. Parallel threads should not be able to call different hash algorithms and therefor a global lock is required. Fixed linker warning, that md5_hmac_init, md5_hmac_update and md5_hmac_final are static export symbols. The export symbols are not required, because the functions are exposed using shash_alg structure. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: add aes_ofb and aes_cfb algorithmsDaniel Kestrel2022-01-061-0/+194
| | | | | | | | | The functions ifx_deu_aes_cfg and ifx_deu_aes_ofb have been part of the driver ever since. But the functions and definitions to make the algorithms actually usable were missing. This patch adds the neccessary code for aes_ofb and aes_cfb algorithms. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: fix cryptomgr test errors for aesDaniel Kestrel2022-01-061-45/+44
| | | | | | | | | | | When running cryptomgr tests against the driver, there are several occurences of different errors for even and uneven splitted data in the underlying scatterlists for the ctr and ctr_rfc3686 algorithms which are now fixed. Fixed error in ctr_rfc3686_aes_decrypt function which was introduced with the previous commit by using CRYPTO_DIR_ENCRYPT in the decrypt function. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: fix cryptomgr test errors for desDaniel Kestrel2022-01-062-31/+58
| | | | | | | | | | | | | | | | | | | | | | When running cryptomgr tests against the driver, there are several occurences of different errors for setkey of des and des3-ede algorithms. Those key checks are already implemented in the kernels des implementation, so this is added as dependency and the kernel methods are called. It also required adding the kernels des/des3 context definitions to the des_ctx internal structure to be able to call the kernel methods. Fixed ifxdeu-des... setkey unexpectedly succeeded on test vector x; expected_error=-22. Fixed ifxdeu-des... setkey failed on test vector x; expected_error=0, actual_error=-22. Renamed des_ctx internal structure and des_encrypt/des_decrypt methods because they are already defined in the kernel module. Fixed wrong DES_xxx constant definitions in crypto_alg definition for ifxdeu_des3_ede_alg. Fixed method comment errors. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: convert SHA1 after library impl of SHA1 was removedDaniel Kestrel2022-01-062-9/+9
| | | | | | | | | The <linux/cryptohash.h> was removed with Linux 5.8, because it only contained the library implementation of SHA1, which was folded into <crypto/sha.h>. So switch this driver away from using <linux/cryptohash.h>. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: convert blkcipher to skcipherDaniel Kestrel2022-01-063-464/+413
| | | | | | | | | Convert blkcipher to skcipher for the synchronous versions of AES, DES and ARC4. The Block Cipher API was depracated for a while and was removed with Linux 5.5. So switch this driver to the skcipher API. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: set correct control register for AESDaniel Kestrel2022-01-061-1/+1
| | | | | | | | | | | | Some devices initialize AES during boot and AES works out of the box and the correct endianess is set. NDC means (No Danube Compatibility Mode) and the endianess setting has no effect if its set to 0. NDC 0: OFF ENDI bit cannot be written as in Danube To make it work for other devices, the NDC control register needs to be set to 1. Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: make cipher/digest usable by opensslMathias Kresin2022-01-059-28/+28
| | | | | | | | | | OpenSSL with cryptdev support uses the data encryption unit (DEU) driver for hard accelerated processing of ciphers/digests, if the flag CRYPTO_ALG_KERN_DRIVER_ONLY is set. Signed-off-by: Mathias Kresin <dev@kresin.me> [fix commit title prefix] Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: aes-ctr: process all input dataMathias Kresin2022-01-051-31/+21
| | | | | | | | | | | | | | | | | | | | | | | Even if the minimum blocksize is set to 16 (AES_BLOCK_SIZE), the crypto manager tests pass 499 bytes of data to the aes-ctr encryption, from which only 496 bytes are actually encrypted. Reading the comment regarding the minimum blocksize, it only states that it's the "smallest possible unit which can be transformed with this algorithm". Which doesn't necessarily mean, the data have to be a multiple of the minimal blocksize. All kernel hardware crypto driver enforce a minimum blocksize of 1, which perfect fine works for the lantiq data encryption unit as well. Lower the blocksize limit to 1, to process not padded data as well. In AES for processing the remaining bytes, uninitialized pointers were used. This patch fixes using uninitialized pointers and wrong offsets. Signed-off-by: Mathias Kresin <dev@kresin.me> [fix commit title prefix] Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: aes: do not read/write behind bufferMathias Kresin2022-01-051-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When handling non-aligned remaining data (not padded to 16 byte [AES_BLOCK_SIZE]), a full 16 byte block is read from the input buffer and written to the output buffer after en-/decryption. While code already assumes that an input buffer could have less than 16 byte remaining, as it can be seen by the code zeroing the remaining bytes till AES_BLOCK_SIZE, the full AES_BLOCK_SIZE is read. An output buffer size of a multiple of AES_BLOCK_SIZE is expected but never validated. To get rid of the read/write behind buffer, use a temporary buffer when dealing with not padded data and only write as much bytes to the output as we read. Do not memcpy directly to the register, to make used of the endian swap macro and to trigger the crypto start operator via the ID0R to trigger the register. Since we might need an endian swap for the output in future, use a temporary buffer for the output as well. The issue could not be observed so far, since all caller of ifx_deu_aes will ignore the padded (remaining) data. Considering that the minimum blocksize for the algorithm is set to AES_BLOCK_SIZE, the behaviour could be called expected. Signed-off-by: Mathias Kresin <dev@kresin.me> [fix commit title prefix] Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* ltq-deu: init des/aes before registering crpyto algorithmsMathias Kresin2022-01-052-3/+2
| | | | | | | | | | | | | | The crypto algorithms are registered and available to the system before the chip is actually powered on and the generic parameter for the DEU behaviour set. The issue can mainly be observed if the crypto manager tests are enabled in the kernel config. The crypto manager test run directly after an algorithm is registered. Signed-off-by: Mathias Kresin <dev@kresin.me> [fix commit title prefix] Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
* mediatek: Clause-45 MDIO patch accepted upstreamDaniel Golle2022-01-056-255/+310
| | | | | | | To easy future maintainance, replace the local patch with what has been accepted into net-next and is likely to end up in Linux 5.17. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* qoriq: Expand generic subtarget descriptionMatt Fawcett2022-01-051-1/+3
| | | | | | Signed-off-by: Matt Fawcett <mattytap@icloud.com> [remove trailing whitespace] Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
* mediatek: let mtk_eth_soc MAC announce 2500Base-T modeDaniel Golle2022-01-051-0/+10
| | | | | | | | To allows Ethernet phys supporting 2500Base-T mode to announce that speed, enable the corresponding bit in mtk_eth_soc driver. This should hopefully unlock 2500Base-T speed on the UniFi 6 LR. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* kernel: improve driver support for gen-3 Aquantia Ethernet PHYsDaniel Golle2022-01-054-11/+61
| | | | | | | | | | | | | | * correctly set system side interface, the original patch was errornous and there is a follow-up fix for it * enable phy statistics for AQR112(+R/C) and ARQ412 (ethtool --phy-statistics ethX) Tested, including phy-statistics, on - IEI Puzzle M901 (AQR112, AQR112C, AQR112R) - IEI Puzzle M902 (AQR113, AQR112R) - Ubiquiti UniFi 6 LR (AQR112C) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
* uml: drop Kernel 5.4Paul Spooren2022-01-043-477/+0
| | | | | | After the switch to Kernel 5.10 the old files are no longer required. Signed-off-by: Paul Spooren <mail@aparcar.org>
* uml: switch to Kernel 5.10Paul Spooren2022-01-041-2/+1
| | | | | | Switch over from testing version. Signed-off-by: Paul Spooren <mail@aparcar.org>
* ipq807x: drop targetPaul Spooren2022-01-034-705/+0
| | | | | | | | | | | The target is in an incomplete state and will not receive Kernel 5.10 support, ego it should be dropped before the next release. People are working on ipq807x with Kernel 5.15 which is only relevant for the second next release. Once a working patchset exists the target can be added again. Signed-off-by: Paul Spooren <mail@aparcar.org>
* lua: add HOST_FPIC for host buildsPaul Spooren2022-01-032-4/+4
| | | | | | | | | Compiling without fPIC causes linking issues for packages using liblua. Add $(HOST_FPIC) to host builds for both lua and lua5.3. Suggested-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Paul Spooren <mail@aparcar.org>
* kernel: 5.10: backport qca8k new featureAnsuel Smith2022-01-0310-1/+1274
| | | | | | | | | | | Backport qca8k new feature: - Ageing configuration support - Add 2 missing counter on qca8337 - Convert to regmap - Standardize define and code with GENMASK AND BITFILED macro - Add mdb add/del support Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
* kernel: 5.10: backport additional qca8k fixesAnsuel Smith2022-01-033-0/+123
| | | | | | | | | Backport 3 additional fixes for qca8k. - Fix MTU calculation - Fix a bug with config set to the wrong PAD when secondary cpu port is defined. - Fix redundant check in parse_port_config Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
* kernel: bump 5.10 to 5.10.89Rui Salvaterra2022-01-0313-128/+18
| | | | | | | | | | | Deleted (upstreamed): bcm27xx/patches-5.10/950-0186-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch [1] sunxi/patches-5.10/103-arm64-dts-allwinner-orangepi-zero-plus-fix-PHY-mo.patch [2] [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.89&id=ba696b470839d70c6b8290c1f798bac7fb2a584c [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.89&id=93a957bbf46ceb224b959de61fe85cfc6f71b6c7 Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 02:11:42 +0000