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-rw-r--r--tools/mkimage/patches/020-tools-mtk_image-split-gfh-header-verification-into-a.patch89
-rw-r--r--tools/mkimage/patches/021-tools-mtk_image-split-the-code-of-generating-NAND-he.patch821
-rw-r--r--tools/mkimage/patches/022-tools-mtk_image-add-support-for-nand-headers-used-by.patch702
3 files changed, 1612 insertions, 0 deletions
diff --git a/tools/mkimage/patches/020-tools-mtk_image-split-gfh-header-verification-into-a.patch b/tools/mkimage/patches/020-tools-mtk_image-split-gfh-header-verification-into-a.patch
new file mode 100644
index 0000000000..62300af266
--- /dev/null
+++ b/tools/mkimage/patches/020-tools-mtk_image-split-gfh-header-verification-into-a.patch
@@ -0,0 +1,89 @@
+From b6bb61fd3818f4a3025fedbe4d15dbeeaef6ee82 Mon Sep 17 00:00:00 2001
+From: Weijie Gao <weijie.gao@mediatek.com>
+Date: Tue, 2 Aug 2022 17:21:34 +0800
+Subject: [PATCH 28/31] tools: mtk_image: split gfh header verification into a
+ new function
+
+The verification code of gfh header for NAND and non-NAND are identical.
+It's better to define a individual function to reduce redundancy.
+
+Reviewed-by: Simon Glass <sjg@chromium.org>
+Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+---
+ tools/mtk_image.c | 51 +++++++++++++++++++----------------------------
+ 1 file changed, 21 insertions(+), 30 deletions(-)
+
+--- a/tools/mtk_image.c
++++ b/tools/mtk_image.c
+@@ -432,6 +432,25 @@ static int mtk_image_vrec_header(struct
+ return SHA256_SUM_LEN;
+ }
+
++static int mtk_image_verify_gfh(struct gfh_header *gfh, uint32_t type, int print)
++{
++ if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME))
++ return -1;
++
++ if (le32_to_cpu(gfh->file_info.flash_type) != type)
++ return -1;
++
++ if (print)
++ printf("Load Address: %08x\n",
++ le32_to_cpu(gfh->file_info.load_addr) +
++ le32_to_cpu(gfh->file_info.jump_offset));
++
++ if (print)
++ printf("Architecture: %s\n", is_arm64_image ? "ARM64" : "ARM");
++
++ return 0;
++}
++
+ static int mtk_image_verify_gen_header(const uint8_t *ptr, int print)
+ {
+ union gen_boot_header *gbh = (union gen_boot_header *)ptr;
+@@ -494,21 +513,7 @@ static int mtk_image_verify_gen_header(c
+
+ gfh = (struct gfh_header *)(ptr + gfh_offset);
+
+- if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME))
+- return -1;
+-
+- if (le32_to_cpu(gfh->file_info.flash_type) != GFH_FLASH_TYPE_GEN)
+- return -1;
+-
+- if (print)
+- printf("Load Address: %08x\n",
+- le32_to_cpu(gfh->file_info.load_addr) +
+- le32_to_cpu(gfh->file_info.jump_offset));
+-
+- if (print)
+- printf("Architecture: %s\n", is_arm64_image ? "ARM64" : "ARM");
+-
+- return 0;
++ return mtk_image_verify_gfh(gfh, GFH_FLASH_TYPE_GEN, print);
+ }
+
+ static int mtk_image_verify_nand_header(const uint8_t *ptr, int print)
+@@ -562,21 +567,7 @@ static int mtk_image_verify_nand_header(
+
+ gfh = (struct gfh_header *)(ptr + 2 * le16_to_cpu(nh->pagesize));
+
+- if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME))
+- return -1;
+-
+- if (le32_to_cpu(gfh->file_info.flash_type) != GFH_FLASH_TYPE_NAND)
+- return -1;
+-
+- if (print)
+- printf("Load Address: %08x\n",
+- le32_to_cpu(gfh->file_info.load_addr) +
+- le32_to_cpu(gfh->file_info.jump_offset));
+-
+- if (print)
+- printf("Architecture: %s\n", is_arm64_image ? "ARM64" : "ARM");
+-
+- return 0;
++ return mtk_image_verify_gfh(gfh, GFH_FLASH_TYPE_NAND, print);
+ }
+
+ static int mtk_image_verify_header(unsigned char *ptr, int image_size,
diff --git a/tools/mkimage/patches/021-tools-mtk_image-split-the-code-of-generating-NAND-he.patch b/tools/mkimage/patches/021-tools-mtk_image-split-the-code-of-generating-NAND-he.patch
new file mode 100644
index 0000000000..0b4013864e
--- /dev/null
+++ b/tools/mkimage/patches/021-tools-mtk_image-split-the-code-of-generating-NAND-he.patch
@@ -0,0 +1,821 @@
+From 20ebf03eab571b25e9f62b2764ab84932111dcd6 Mon Sep 17 00:00:00 2001
+From: Weijie Gao <weijie.gao@mediatek.com>
+Date: Tue, 2 Aug 2022 17:23:57 +0800
+Subject: [PATCH 29/31] tools: mtk_image: split the code of generating NAND
+ header into a new file
+
+The predefined NAND headers take too much spaces in the mtk_image.c.
+Moving them into a new file can significantly improve the readability of
+both mtk_image.c and the new mtk_nand_headers.c.
+
+This is a preparation for adding more NAND headers.
+
+Reviewed-by: Simon Glass <sjg@chromium.org>
+Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+---
+ tools/Makefile | 1 +
+ tools/mtk_image.c | 305 ++++++---------------------------------
+ tools/mtk_image.h | 25 ----
+ tools/mtk_nand_headers.c | 286 ++++++++++++++++++++++++++++++++++++
+ tools/mtk_nand_headers.h | 61 ++++++++
+ 5 files changed, 389 insertions(+), 289 deletions(-)
+ create mode 100644 tools/mtk_nand_headers.c
+ create mode 100644 tools/mtk_nand_headers.h
+
+--- a/tools/Makefile
++++ b/tools/Makefile
+@@ -147,6 +147,7 @@ dumpimage-mkimage-objs := aisimage.o \
+ gpimage.o \
+ gpimage-common.o \
+ mtk_image.o \
++ mtk_nand_headers.o \
+ $(ECDSA_OBJS-y) \
+ $(RSA_OBJS-y) \
+ $(AES_OBJS-y)
+--- a/tools/mtk_image.c
++++ b/tools/mtk_image.c
+@@ -10,216 +10,7 @@
+ #include <u-boot/sha256.h>
+ #include "imagetool.h"
+ #include "mtk_image.h"
+-
+-/* NAND header for SPI-NAND with 2KB page + 64B spare */
+-static const union nand_boot_header snand_hdr_2k_64_data = {
+- .data = {
+- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+- 0x00, 0x00, 0x00, 0x08, 0x03, 0x00, 0x40, 0x00,
+- 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x7B, 0xC4, 0x17, 0x9D,
+- 0xCA, 0x42, 0x90, 0xD0, 0x98, 0xD0, 0xE0, 0xF7,
+- 0xDB, 0xCD, 0x16, 0xF6, 0x03, 0x73, 0xD2, 0xB8,
+- 0x93, 0xB2, 0x56, 0x5A, 0x84, 0x6E, 0x00, 0x00
+- }
+-};
+-
+-/* NAND header for SPI-NAND with 2KB page + 120B/128B spare */
+-static const union nand_boot_header snand_hdr_2k_128_data = {
+- .data = {
+- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
+- 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x90, 0x28, 0xED, 0x13,
+- 0x7F, 0x12, 0x22, 0xCD, 0x3D, 0x06, 0xF1, 0xB3,
+- 0x6F, 0x2E, 0xD9, 0xA0, 0x9D, 0x7A, 0xBD, 0xD7,
+- 0xB3, 0x28, 0x3C, 0x13, 0xDB, 0x4E, 0x00, 0x00
+- }
+-};
+-
+-/* NAND header for SPI-NAND with 4KB page + 256B spare */
+-static const union nand_boot_header snand_hdr_4k_256_data = {
+- .data = {
+- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+- 0x00, 0x00, 0x00, 0x10, 0x05, 0x00, 0xE0, 0x00,
+- 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x47, 0xED, 0x0E, 0xC3,
+- 0x83, 0xBF, 0x41, 0xD2, 0x85, 0x21, 0x97, 0x57,
+- 0xC4, 0x2E, 0x6B, 0x7A, 0x40, 0xE0, 0xCF, 0x8F,
+- 0x37, 0xBD, 0x17, 0xB6, 0xC7, 0xFE, 0x00, 0x00
+- }
+-};
+-
+-/* NAND header for Parallel NAND 1Gb with 2KB page + 64B spare */
+-static const union nand_boot_header nand_hdr_1gb_2k_64_data = {
+- .data = {
+- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
+- 0x40, 0x00, 0x00, 0x04, 0x0B, 0x00, 0x11, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x12, 0x28, 0x1C, 0x12,
+- 0x8F, 0xFD, 0xF8, 0x32, 0x6F, 0x6D, 0xCF, 0x6C,
+- 0xDA, 0x21, 0x70, 0x8C, 0xDA, 0x0A, 0x22, 0x82,
+- 0xAA, 0x59, 0xFA, 0x7C, 0x42, 0x2D, 0x00, 0x00
+- }
+-};
+-
+-/* NAND header for Parallel NAND 2Gb with 2KB page + 64B spare */
+-static const union nand_boot_header nand_hdr_2gb_2k_64_data = {
+- .data = {
+- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
+- 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x20, 0x9C, 0x3D, 0x2D,
+- 0x7B, 0x68, 0x63, 0x52, 0x2E, 0x04, 0x63, 0xF1,
+- 0x35, 0x4E, 0x44, 0x3E, 0xF8, 0xAC, 0x9B, 0x95,
+- 0xAB, 0xFE, 0xE4, 0xE1, 0xD5, 0xF9, 0x00, 0x00
+- }
+-};
+-
+-/* NAND header for Parallel NAND 4Gb with 2KB page + 64B spare */
+-static const union nand_boot_header nand_hdr_4gb_2k_64_data = {
+- .data = {
+- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
+- 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0xE3, 0x0F, 0x86, 0x32,
+- 0x68, 0x05, 0xD9, 0xC8, 0x13, 0xDF, 0xC5, 0x0B,
+- 0x35, 0x3A, 0x68, 0xA5, 0x3C, 0x0C, 0x73, 0x87,
+- 0x63, 0xB0, 0xBE, 0xCC, 0x84, 0x47, 0x00, 0x00
+- }
+-};
+-
+-/* NAND header for Parallel NAND 2Gb with 2KB page + 128B spare */
+-static const union nand_boot_header nand_hdr_2gb_2k_128_data = {
+- .data = {
+- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
+- 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x01, 0xA5, 0xE9, 0x5A,
+- 0xDF, 0x58, 0x62, 0x41, 0xD6, 0x26, 0x77, 0xBC,
+- 0x76, 0x1F, 0x27, 0x4E, 0x4F, 0x6C, 0xC3, 0xF0,
+- 0x36, 0xDE, 0xD9, 0xB3, 0xFF, 0x93, 0x00, 0x00
+- }
+-};
+-
+-/* NAND header for Parallel NAND 4Gb with 2KB page + 128B spare */
+-static const union nand_boot_header nand_hdr_4gb_2k_128_data = {
+- .data = {
+- 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
+- 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
+- 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
+- 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
+- 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+- 0x00, 0x00, 0x00, 0x00, 0xC2, 0x36, 0x52, 0x45,
+- 0xCC, 0x35, 0xD8, 0xDB, 0xEB, 0xFD, 0xD1, 0x46,
+- 0x76, 0x6B, 0x0B, 0xD5, 0x8B, 0xCC, 0x2B, 0xE2,
+- 0xFE, 0x90, 0x83, 0x9E, 0xAE, 0x2D, 0x00, 0x00
+- }
+-};
+-
+-static const struct nand_header_type {
+- const char *name;
+- const union nand_boot_header *data;
+-} nand_headers[] = {
+- {
+- .name = "2k+64",
+- .data = &snand_hdr_2k_64_data
+- }, {
+- .name = "2k+120",
+- .data = &snand_hdr_2k_128_data
+- }, {
+- .name = "2k+128",
+- .data = &snand_hdr_2k_128_data
+- }, {
+- .name = "4k+256",
+- .data = &snand_hdr_4k_256_data
+- }, {
+- .name = "1g:2k+64",
+- .data = &nand_hdr_1gb_2k_64_data
+- }, {
+- .name = "2g:2k+64",
+- .data = &nand_hdr_2gb_2k_64_data
+- }, {
+- .name = "4g:2k+64",
+- .data = &nand_hdr_4gb_2k_64_data
+- }, {
+- .name = "2g:2k+128",
+- .data = &nand_hdr_2gb_2k_128_data
+- }, {
+- .name = "4g:2k+128",
+- .data = &nand_hdr_4gb_2k_128_data
+- }
+-};
++#include "mtk_nand_headers.h"
+
+ static const struct brom_img_type {
+ const char *name;
+@@ -258,6 +49,7 @@ static char lk_name[32] = "U-Boot";
+
+ /* NAND header selected by user */
+ static const union nand_boot_header *hdr_nand;
++static uint32_t hdr_nand_size;
+
+ /* GFH header + 2 * 4KB pages of NAND */
+ static char hdr_tmp[sizeof(struct gfh_header) + 0x2000];
+@@ -361,12 +153,7 @@ static int mtk_brom_parse_imagename(cons
+ }
+
+ /* parse nand header type */
+- for (i = 0; i < ARRAY_SIZE(nand_headers); i++) {
+- if (!strcmp(nand_headers[i].name, nandinfo)) {
+- hdr_nand = nand_headers[i].data;
+- break;
+- }
+- }
++ hdr_nand = mtk_nand_header_find(nandinfo);
+
+ /* parse device header offset */
+ if (hdr_offs && hdr_offs[0])
+@@ -391,6 +178,9 @@ static int mtk_brom_parse_imagename(cons
+ return -EINVAL;
+ }
+
++ if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
++ hdr_nand_size = mtk_nand_header_size(hdr_nand);
++
+ return 0;
+ }
+
+@@ -420,7 +210,7 @@ static int mtk_image_vrec_header(struct
+ }
+
+ if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
+- tparams->header_size = 2 * le16_to_cpu(hdr_nand->pagesize);
++ tparams->header_size = hdr_nand_size;
+ else
+ tparams->header_size = sizeof(struct gen_device_header);
+
+@@ -518,16 +308,17 @@ static int mtk_image_verify_gen_header(c
+
+ static int mtk_image_verify_nand_header(const uint8_t *ptr, int print)
+ {
+- union nand_boot_header *nh = (union nand_boot_header *)ptr;
+ struct brom_layout_header *bh;
++ struct nand_header_info info;
+ struct gfh_header *gfh;
+ const char *bootmedia;
++ int ret;
+
+- if (strncmp(nh->version, NAND_BOOT_VERSION, sizeof(nh->version)) ||
+- strcmp(nh->id, NAND_BOOT_ID))
+- return -1;
++ ret = mtk_nand_header_info(ptr, &info);
++ if (ret < 0)
++ return ret;
+
+- bh = (struct brom_layout_header *)(ptr + le16_to_cpu(nh->pagesize));
++ bh = (struct brom_layout_header *)(ptr + info.page_size);
+
+ if (strcmp(bh->name, BRLYT_NAME))
+ return -1;
+@@ -538,34 +329,23 @@ static int mtk_image_verify_nand_header(
+ if (le32_to_cpu(bh->type) == BRLYT_TYPE_NAND)
+ bootmedia = "Parallel NAND";
+ else if (le32_to_cpu(bh->type) == BRLYT_TYPE_SNAND)
+- bootmedia = "Serial NAND";
++ bootmedia = "Serial NAND (SNFI/AP)";
+ else
+ return -1;
+ }
+
+ if (print) {
+- printf("Boot Media: %s\n", bootmedia);
+-
+- if (le32_to_cpu(bh->type) == BRLYT_TYPE_NAND) {
+- uint64_t capacity =
+- (uint64_t)le16_to_cpu(nh->numblocks) *
+- (uint64_t)le16_to_cpu(nh->pages_of_block) *
+- (uint64_t)le16_to_cpu(nh->pagesize) * 8;
+- printf("Capacity: %dGb\n",
+- (uint32_t)(capacity >> 30));
+- }
++ printf("Boot Media: %s\n", bootmedia);
+
+- if (le16_to_cpu(nh->pagesize) >= 1024)
+- printf("Page Size: %dKB\n",
+- le16_to_cpu(nh->pagesize) >> 10);
++ if (info.page_size >= 1024)
++ printf("Page Size: %dKB\n", info.page_size >> 10);
+ else
+- printf("Page Size: %dB\n",
+- le16_to_cpu(nh->pagesize));
++ printf("Page Size: %dB\n", info.page_size);
+
+- printf("Spare Size: %dB\n", le16_to_cpu(nh->oobsize));
++ printf("Spare Size: %dB\n", info.spare_size);
+ }
+
+- gfh = (struct gfh_header *)(ptr + 2 * le16_to_cpu(nh->pagesize));
++ gfh = (struct gfh_header *)(ptr + info.gfh_offset);
+
+ return mtk_image_verify_gfh(gfh, GFH_FLASH_TYPE_NAND, print);
+ }
+@@ -581,7 +361,7 @@ static int mtk_image_verify_header(unsig
+
+ img_size = image_size;
+
+- if (!strcmp((char *)ptr, NAND_BOOT_NAME))
++ if (is_mtk_nand_header(ptr))
+ return mtk_image_verify_nand_header(ptr, 0);
+ else
+ return mtk_image_verify_gen_header(ptr, 0);
+@@ -601,7 +381,7 @@ static void mtk_image_print_header(const
+
+ printf("Image Type: MediaTek BootROM Loadable Image\n");
+
+- if (!strcmp((char *)ptr, NAND_BOOT_NAME))
++ if (is_mtk_nand_header(ptr))
+ mtk_image_verify_nand_header(ptr, 1);
+ else
+ mtk_image_verify_gen_header(ptr, 1);
+@@ -732,36 +512,33 @@ static void mtk_image_set_gen_header(voi
+ static void mtk_image_set_nand_header(void *ptr, off_t filesize,
+ uint32_t loadaddr)
+ {
+- union nand_boot_header *nh = (union nand_boot_header *)ptr;
+ struct brom_layout_header *brlyt;
+ struct gfh_header *gfh;
+- uint32_t payload_pages;
+- int i;
++ uint32_t payload_pages, nand_page_size;
+
+- /* NAND device header, repeat 4 times */
+- for (i = 0; i < 4; i++)
+- memcpy(nh + i, hdr_nand, sizeof(union nand_boot_header));
++ /* NAND header */
++ nand_page_size = mtk_nand_header_put(hdr_nand, ptr);
+
+- /* BRLYT header */
+- payload_pages = (filesize + le16_to_cpu(hdr_nand->pagesize) - 1) /
+- le16_to_cpu(hdr_nand->pagesize);
+- brlyt = (struct brom_layout_header *)
+- (ptr + le16_to_cpu(hdr_nand->pagesize));
+- put_brom_layout_header(brlyt, hdr_media);
+- brlyt->header_size = cpu_to_le32(2);
+- brlyt->total_size = cpu_to_le32(payload_pages);
+- brlyt->header_size_2 = brlyt->header_size;
+- brlyt->total_size_2 = brlyt->total_size;
+- brlyt->unused = cpu_to_le32(1);
++ if (nand_page_size) {
++ /* BRLYT header */
++ payload_pages = (filesize + nand_page_size - 1) /
++ nand_page_size;
++ brlyt = (struct brom_layout_header *)(ptr + nand_page_size);
++ put_brom_layout_header(brlyt, hdr_media);
++ brlyt->header_size = cpu_to_le32(2);
++ brlyt->total_size = cpu_to_le32(payload_pages);
++ brlyt->header_size_2 = brlyt->header_size;
++ brlyt->total_size_2 = brlyt->total_size;
++ brlyt->unused = cpu_to_le32(1);
++ }
+
+ /* GFH header */
+- gfh = (struct gfh_header *)(ptr + 2 * le16_to_cpu(hdr_nand->pagesize));
+- put_ghf_header(gfh, filesize, 2 * le16_to_cpu(hdr_nand->pagesize),
+- loadaddr, GFH_FLASH_TYPE_NAND);
++ gfh = (struct gfh_header *)(ptr + hdr_nand_size);
++ put_ghf_header(gfh, filesize, hdr_nand_size, loadaddr,
++ GFH_FLASH_TYPE_NAND);
+
+ /* Generate SHA256 hash */
+- put_hash((uint8_t *)gfh,
+- filesize - 2 * le16_to_cpu(hdr_nand->pagesize) - SHA256_SUM_LEN);
++ put_hash((uint8_t *)gfh, filesize - hdr_nand_size - SHA256_SUM_LEN);
+ }
+
+ static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd,
+--- a/tools/mtk_image.h
++++ b/tools/mtk_image.h
+@@ -26,31 +26,6 @@ union gen_boot_header {
+ #define SF_BOOT_NAME "SF_BOOT"
+ #define SDMMC_BOOT_NAME "SDMMC_BOOT"
+
+-/* Header for NAND */
+-union nand_boot_header {
+- struct {
+- char name[12];
+- char version[4];
+- char id[8];
+- uint16_t ioif;
+- uint16_t pagesize;
+- uint16_t addrcycles;
+- uint16_t oobsize;
+- uint16_t pages_of_block;
+- uint16_t numblocks;
+- uint16_t writesize_shift;
+- uint16_t erasesize_shift;
+- uint8_t dummy[60];
+- uint8_t ecc_parity[28];
+- };
+-
+- uint8_t data[0x80];
+-};
+-
+-#define NAND_BOOT_NAME "BOOTLOADER!"
+-#define NAND_BOOT_VERSION "V006"
+-#define NAND_BOOT_ID "NFIINFO"
+-
+ /* BootROM layout header */
+ struct brom_layout_header {
+ char name[8];
+--- /dev/null
++++ b/tools/mtk_nand_headers.c
+@@ -0,0 +1,286 @@
++// SPDX-License-Identifier: GPL-2.0+
++/*
++ * MediaTek BootROM NAND header definitions
++ *
++ * Copyright (C) 2022 MediaTek Inc.
++ * Author: Weijie Gao <weijie.gao@mediatek.com>
++ */
++
++#include <stdint.h>
++#include <string.h>
++#include "imagetool.h"
++#include "mtk_image.h"
++#include "mtk_nand_headers.h"
++
++/* NAND header for SPI-NAND with 2KB page + 64B spare */
++static const union nand_boot_header snand_hdr_2k_64_data = {
++ .data = {
++ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
++ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
++ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
++ 0x00, 0x00, 0x00, 0x08, 0x03, 0x00, 0x40, 0x00,
++ 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x7B, 0xC4, 0x17, 0x9D,
++ 0xCA, 0x42, 0x90, 0xD0, 0x98, 0xD0, 0xE0, 0xF7,
++ 0xDB, 0xCD, 0x16, 0xF6, 0x03, 0x73, 0xD2, 0xB8,
++ 0x93, 0xB2, 0x56, 0x5A, 0x84, 0x6E, 0x00, 0x00
++ }
++};
++
++/* NAND header for SPI-NAND with 2KB page + 120B/128B spare */
++static const union nand_boot_header snand_hdr_2k_128_data = {
++ .data = {
++ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
++ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
++ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
++ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
++ 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x90, 0x28, 0xED, 0x13,
++ 0x7F, 0x12, 0x22, 0xCD, 0x3D, 0x06, 0xF1, 0xB3,
++ 0x6F, 0x2E, 0xD9, 0xA0, 0x9D, 0x7A, 0xBD, 0xD7,
++ 0xB3, 0x28, 0x3C, 0x13, 0xDB, 0x4E, 0x00, 0x00
++ }
++};
++
++/* NAND header for SPI-NAND with 4KB page + 256B spare */
++static const union nand_boot_header snand_hdr_4k_256_data = {
++ .data = {
++ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
++ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
++ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
++ 0x00, 0x00, 0x00, 0x10, 0x05, 0x00, 0xE0, 0x00,
++ 0x40, 0x00, 0x00, 0x08, 0x10, 0x00, 0x16, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x47, 0xED, 0x0E, 0xC3,
++ 0x83, 0xBF, 0x41, 0xD2, 0x85, 0x21, 0x97, 0x57,
++ 0xC4, 0x2E, 0x6B, 0x7A, 0x40, 0xE0, 0xCF, 0x8F,
++ 0x37, 0xBD, 0x17, 0xB6, 0xC7, 0xFE, 0x00, 0x00
++ }
++};
++
++/* NAND header for Parallel NAND 1Gb with 2KB page + 64B spare */
++static const union nand_boot_header nand_hdr_1gb_2k_64_data = {
++ .data = {
++ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
++ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
++ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
++ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
++ 0x40, 0x00, 0x00, 0x04, 0x0B, 0x00, 0x11, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x12, 0x28, 0x1C, 0x12,
++ 0x8F, 0xFD, 0xF8, 0x32, 0x6F, 0x6D, 0xCF, 0x6C,
++ 0xDA, 0x21, 0x70, 0x8C, 0xDA, 0x0A, 0x22, 0x82,
++ 0xAA, 0x59, 0xFA, 0x7C, 0x42, 0x2D, 0x00, 0x00
++ }
++};
++
++/* NAND header for Parallel NAND 2Gb with 2KB page + 64B spare */
++static const union nand_boot_header nand_hdr_2gb_2k_64_data = {
++ .data = {
++ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
++ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
++ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
++ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
++ 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x20, 0x9C, 0x3D, 0x2D,
++ 0x7B, 0x68, 0x63, 0x52, 0x2E, 0x04, 0x63, 0xF1,
++ 0x35, 0x4E, 0x44, 0x3E, 0xF8, 0xAC, 0x9B, 0x95,
++ 0xAB, 0xFE, 0xE4, 0xE1, 0xD5, 0xF9, 0x00, 0x00
++ }
++};
++
++/* NAND header for Parallel NAND 4Gb with 2KB page + 64B spare */
++static const union nand_boot_header nand_hdr_4gb_2k_64_data = {
++ .data = {
++ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
++ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
++ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
++ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x40, 0x00,
++ 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0xE3, 0x0F, 0x86, 0x32,
++ 0x68, 0x05, 0xD9, 0xC8, 0x13, 0xDF, 0xC5, 0x0B,
++ 0x35, 0x3A, 0x68, 0xA5, 0x3C, 0x0C, 0x73, 0x87,
++ 0x63, 0xB0, 0xBE, 0xCC, 0x84, 0x47, 0x00, 0x00
++ }
++};
++
++/* NAND header for Parallel NAND 2Gb with 2KB page + 128B spare */
++static const union nand_boot_header nand_hdr_2gb_2k_128_data = {
++ .data = {
++ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
++ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
++ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
++ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
++ 0x40, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x11, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x01, 0xA5, 0xE9, 0x5A,
++ 0xDF, 0x58, 0x62, 0x41, 0xD6, 0x26, 0x77, 0xBC,
++ 0x76, 0x1F, 0x27, 0x4E, 0x4F, 0x6C, 0xC3, 0xF0,
++ 0x36, 0xDE, 0xD9, 0xB3, 0xFF, 0x93, 0x00, 0x00
++ }
++};
++
++/* NAND header for Parallel NAND 4Gb with 2KB page + 128B spare */
++static const union nand_boot_header nand_hdr_4gb_2k_128_data = {
++ .data = {
++ 0x42, 0x4F, 0x4F, 0x54, 0x4C, 0x4F, 0x41, 0x44,
++ 0x45, 0x52, 0x21, 0x00, 0x56, 0x30, 0x30, 0x36,
++ 0x4E, 0x46, 0x49, 0x49, 0x4E, 0x46, 0x4F, 0x00,
++ 0x00, 0x00, 0x00, 0x08, 0x05, 0x00, 0x70, 0x00,
++ 0x40, 0x00, 0x00, 0x10, 0x0B, 0x00, 0x11, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0xC2, 0x36, 0x52, 0x45,
++ 0xCC, 0x35, 0xD8, 0xDB, 0xEB, 0xFD, 0xD1, 0x46,
++ 0x76, 0x6B, 0x0B, 0xD5, 0x8B, 0xCC, 0x2B, 0xE2,
++ 0xFE, 0x90, 0x83, 0x9E, 0xAE, 0x2D, 0x00, 0x00
++ }
++};
++
++static const struct nand_header_type {
++ const char *name;
++ const union nand_boot_header *data;
++} nand_headers[] = {
++ {
++ .name = "2k+64",
++ .data = &snand_hdr_2k_64_data
++ }, {
++ .name = "2k+120",
++ .data = &snand_hdr_2k_128_data
++ }, {
++ .name = "2k+128",
++ .data = &snand_hdr_2k_128_data
++ }, {
++ .name = "4k+256",
++ .data = &snand_hdr_4k_256_data
++ }, {
++ .name = "1g:2k+64",
++ .data = &nand_hdr_1gb_2k_64_data
++ }, {
++ .name = "2g:2k+64",
++ .data = &nand_hdr_2gb_2k_64_data
++ }, {
++ .name = "4g:2k+64",
++ .data = &nand_hdr_4gb_2k_64_data
++ }, {
++ .name = "2g:2k+128",
++ .data = &nand_hdr_2gb_2k_128_data
++ }, {
++ .name = "4g:2k+128",
++ .data = &nand_hdr_4gb_2k_128_data
++ }
++};
++
++const union nand_boot_header *mtk_nand_header_find(const char *name)
++{
++ uint32_t i;
++
++ for (i = 0; i < ARRAY_SIZE(nand_headers); i++) {
++ if (!strcmp(nand_headers[i].name, name))
++ return nand_headers[i].data;
++ }
++
++ return NULL;
++}
++
++uint32_t mtk_nand_header_size(const union nand_boot_header *hdr_nand)
++{
++ return 2 * le16_to_cpu(hdr_nand->pagesize);
++}
++
++static int mtk_nand_header_ap_info(const void *ptr,
++ struct nand_header_info *info)
++{
++ union nand_boot_header *nh = (union nand_boot_header *)ptr;
++
++ if (strncmp(nh->version, NAND_BOOT_VERSION, sizeof(nh->version)) ||
++ strcmp(nh->id, NAND_BOOT_ID))
++ return -1;
++
++ info->page_size = le16_to_cpu(nh->pagesize);
++ info->spare_size = le16_to_cpu(nh->oobsize);
++ info->gfh_offset = 2 * info->page_size;
++
++ return 0;
++}
++
++int mtk_nand_header_info(const void *ptr, struct nand_header_info *info)
++{
++ if (!strcmp((char *)ptr, NAND_BOOT_NAME))
++ return mtk_nand_header_ap_info(ptr, info);
++
++ return -1;
++}
++
++bool is_mtk_nand_header(const void *ptr)
++{
++ struct nand_header_info info;
++
++ if (mtk_nand_header_info(ptr, &info) >= 0)
++ return true;
++
++ return false;
++}
++
++uint32_t mtk_nand_header_put(const union nand_boot_header *hdr_nand, void *ptr)
++{
++ union nand_boot_header *nh = (union nand_boot_header *)ptr;
++ int i;
++
++ /* NAND device header, repeat 4 times */
++ for (i = 0; i < 4; i++)
++ memcpy(nh + i, hdr_nand, sizeof(union nand_boot_header));
++
++ return le16_to_cpu(hdr_nand->pagesize);
++}
+--- /dev/null
++++ b/tools/mtk_nand_headers.h
+@@ -0,0 +1,61 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++/*
++ * MediaTek BootROM NAND header definitions
++ *
++ * Copyright (C) 2022 MediaTek Inc.
++ * Author: Weijie Gao <weijie.gao@mediatek.com>
++ */
++
++#ifndef _MTK_NAND_HEADERS_H
++#define _MTK_NAND_HEADERS_H
++
++#include <stdint.h>
++#include <stdbool.h>
++
++struct nand_header_info {
++ uint32_t page_size;
++ uint32_t spare_size;
++ uint32_t gfh_offset;
++};
++
++/* AP BROM Header for NAND */
++union nand_boot_header {
++ struct {
++ char name[12];
++ char version[4];
++ char id[8];
++ uint16_t ioif; /* I/O interface */
++ uint16_t pagesize; /* NAND page size */
++ uint16_t addrcycles; /* Address cycles */
++ uint16_t oobsize; /* NAND page spare size */
++ uint16_t pages_of_block; /* Pages of one block */
++ uint16_t numblocks; /* Total blocks of NAND chip */
++ uint16_t writesize_shift;
++ uint16_t erasesize_shift;
++ uint8_t dummy[60];
++ uint8_t ecc_parity[28]; /* ECC parity of this header */
++ };
++
++ uint8_t data[0x80];
++};
++
++#define NAND_BOOT_NAME "BOOTLOADER!"
++#define NAND_BOOT_VERSION "V006"
++#define NAND_BOOT_ID "NFIINFO"
++
++/* Find nand header data by name */
++const union nand_boot_header *mtk_nand_header_find(const char *name);
++
++/* Device header size using this nand header */
++uint32_t mtk_nand_header_size(const union nand_boot_header *hdr_nand);
++
++/* Get nand info from nand header (page size, spare size, ...) */
++int mtk_nand_header_info(const void *ptr, struct nand_header_info *info);
++
++/* Whether given header data is valid */
++bool is_mtk_nand_header(const void *ptr);
++
++/* Generate Device header using give nand header */
++uint32_t mtk_nand_header_put(const union nand_boot_header *hdr_nand, void *ptr);
++
++#endif /* _MTK_NAND_HEADERS_H */
diff --git a/tools/mkimage/patches/022-tools-mtk_image-add-support-for-nand-headers-used-by.patch b/tools/mkimage/patches/022-tools-mtk_image-add-support-for-nand-headers-used-by.patch
new file mode 100644
index 0000000000..12ff7f32de
--- /dev/null
+++ b/tools/mkimage/patches/022-tools-mtk_image-add-support-for-nand-headers-used-by.patch
@@ -0,0 +1,702 @@
+From fbf296f9ed5daab70020686e9ba072efe663bbab Mon Sep 17 00:00:00 2001
+From: Weijie Gao <weijie.gao@mediatek.com>
+Date: Wed, 3 Aug 2022 11:14:36 +0800
+Subject: [PATCH 30/31] tools: mtk_image: add support for nand headers used by
+ newer chips
+
+This patch adds more nand headers in two new types:
+1. HSM header, used for spi-nand thru SNFI interface
+2. SPIM header, used for spi-nand thru spi-mem interface
+
+The original nand header is renamed to AP header.
+
+Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
+---
+ tools/mtk_image.c | 23 ++-
+ tools/mtk_nand_headers.c | 422 +++++++++++++++++++++++++++++++++++++--
+ tools/mtk_nand_headers.h | 110 +++++++++-
+ 3 files changed, 525 insertions(+), 30 deletions(-)
+
+--- a/tools/mtk_image.c
++++ b/tools/mtk_image.c
+@@ -31,6 +31,9 @@ static const struct brom_img_type {
+ }, {
+ .name = "snand",
+ .type = BRLYT_TYPE_SNAND
++ }, {
++ .name = "spim-nand",
++ .type = BRLYT_TYPE_SNAND
+ }
+ };
+
+@@ -48,7 +51,7 @@ static bool is_arm64_image;
+ static char lk_name[32] = "U-Boot";
+
+ /* NAND header selected by user */
+-static const union nand_boot_header *hdr_nand;
++static const struct nand_header_type *hdr_nand;
+ static uint32_t hdr_nand_size;
+
+ /* GFH header + 2 * 4KB pages of NAND */
+@@ -318,20 +321,26 @@ static int mtk_image_verify_nand_header(
+ if (ret < 0)
+ return ret;
+
+- bh = (struct brom_layout_header *)(ptr + info.page_size);
++ if (!ret) {
++ bh = (struct brom_layout_header *)(ptr + info.page_size);
+
+- if (strcmp(bh->name, BRLYT_NAME))
+- return -1;
++ if (strcmp(bh->name, BRLYT_NAME))
++ return -1;
++
++ if (le32_to_cpu(bh->magic) != BRLYT_MAGIC)
++ return -1;
+
+- if (le32_to_cpu(bh->magic) != BRLYT_MAGIC) {
+- return -1;
+- } else {
+ if (le32_to_cpu(bh->type) == BRLYT_TYPE_NAND)
+ bootmedia = "Parallel NAND";
+ else if (le32_to_cpu(bh->type) == BRLYT_TYPE_SNAND)
+ bootmedia = "Serial NAND (SNFI/AP)";
+ else
+ return -1;
++ } else {
++ if (info.snfi)
++ bootmedia = "Serial NAND (SNFI/HSM)";
++ else
++ bootmedia = "Serial NAND (SPIM)";
+ }
+
+ if (print) {
+--- a/tools/mtk_nand_headers.c
++++ b/tools/mtk_nand_headers.c
+@@ -188,55 +188,346 @@ static const union nand_boot_header nand
+ }
+ };
+
+-static const struct nand_header_type {
++/* HSM BROM NAND header for SPI NAND with 2KB page + 64B spare */
++static const union hsm_nand_boot_header hsm_nand_hdr_2k_64_data = {
++ .data = {
++ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x08, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
++ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
++ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
++ 0xFF, 0x00, 0x00, 0x00, 0x21, 0xD2, 0xEE, 0xF6,
++ 0xAE, 0xDD, 0x5E, 0xC2, 0x82, 0x8E, 0x9A, 0x62,
++ 0x09, 0x8E, 0x80, 0xE2, 0x37, 0x0D, 0xC9, 0xFA,
++ 0xA9, 0xDD, 0xFC, 0x92, 0x34, 0x2A, 0xED, 0x51,
++ 0xA4, 0x1B, 0xF7, 0x63, 0xCC, 0x5A, 0xC7, 0xFB,
++ 0xED, 0x21, 0x02, 0x23, 0x51, 0x31
++ }
++};
++
++/* HSM BROM NAND header for SPI NAND with 2KB page + 128B spare */
++static const union hsm_nand_boot_header hsm_nand_hdr_2k_128_data = {
++ .data = {
++ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x08, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
++ 0x40, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
++ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
++ 0xFF, 0x00, 0x00, 0x00, 0x71, 0x7f, 0x71, 0xAC,
++ 0x42, 0xD0, 0x5B, 0xD2, 0x12, 0x81, 0x15, 0x0A,
++ 0x0C, 0xD4, 0xF6, 0x32, 0x1E, 0x63, 0xE7, 0x81,
++ 0x8A, 0x7F, 0xDE, 0xF9, 0x4B, 0x91, 0xEC, 0xC2,
++ 0x70, 0x00, 0x7F, 0x57, 0xAF, 0xDC, 0xE4, 0x24,
++ 0x57, 0x09, 0xBC, 0xC5, 0x35, 0xDC
++ }
++};
++
++/* HSM BROM NAND header for SPI NAND with 4KB page + 256B spare */
++static const union hsm_nand_boot_header hsm_nand_hdr_4k_256_data = {
++ .data = {
++ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
++ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
++ 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
++ 0xFF, 0x00, 0x00, 0x00, 0x62, 0x04, 0xD6, 0x1F,
++ 0x2B, 0x57, 0x7A, 0x2D, 0xFE, 0xBB, 0x4A, 0x50,
++ 0xEC, 0xF8, 0x70, 0x1A, 0x44, 0x15, 0xF6, 0xA2,
++ 0x8E, 0xB0, 0xFD, 0xFA, 0xDC, 0xAA, 0x5A, 0x4E,
++ 0xCB, 0x8E, 0xC9, 0x72, 0x08, 0xDC, 0x20, 0xB9,
++ 0x98, 0xC8, 0x82, 0xD8, 0xBE, 0x44
++ }
++};
++
++/* HSM2.0 BROM NAND header for SPI NAND with 2KB page + 64B spare */
++static const union hsm20_nand_boot_header hsm20_nand_hdr_2k_64_data = {
++ .data = {
++ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
++ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x08, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
++ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
++ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
++ 0x01, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x5F, 0x4B, 0xB2, 0x5B, 0x8B, 0x1C, 0x35, 0xDA,
++ 0x83, 0xE6, 0x6C, 0xC3, 0xFB, 0x8C, 0x78, 0x23,
++ 0xD0, 0x89, 0x24, 0xD9, 0x6C, 0x35, 0x2C, 0x5D,
++ 0x8F, 0xBB, 0xFC, 0x10, 0xD0, 0xE2, 0x22, 0x7D,
++ 0xC8, 0x97, 0x9A, 0xEF, 0xC6, 0xB5, 0xA7, 0x4E,
++ 0x4E, 0x0E
++ }
++};
++
++/* HSM2.0 BROM NAND header for SPI NAND with 2KB page + 128B spare */
++static const union hsm20_nand_boot_header hsm20_nand_hdr_2k_128_data = {
++ .data = {
++ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
++ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x08, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
++ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
++ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
++ 0x01, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0xF8, 0x7E, 0xC1, 0x5D, 0x61, 0x54, 0xEA, 0x9F,
++ 0x5E, 0x66, 0x39, 0x66, 0x21, 0xFF, 0x8C, 0x3B,
++ 0xBE, 0xA7, 0x5A, 0x9E, 0xD7, 0xBD, 0x9E, 0x89,
++ 0xEE, 0x7E, 0x10, 0x31, 0x9A, 0x1D, 0x82, 0x49,
++ 0xA3, 0x4E, 0xD8, 0x47, 0xD7, 0x19, 0xF4, 0x2D,
++ 0x8E, 0x53
++ }
++};
++
++/* HSM2.0 BROM NAND header for SPI NAND with 4KB page + 256B spare */
++static const union hsm20_nand_boot_header hsm20_nand_hdr_4k_256_data = {
++ .data = {
++ 0x4E, 0x41, 0x4E, 0x44, 0x43, 0x46, 0x47, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
++ 0x00, 0x04, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
++ 0x40, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00,
++ 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
++ 0x01, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00,
++ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x79, 0x01, 0x1F, 0x86, 0x62, 0x6A, 0x43, 0xAE,
++ 0xE6, 0xF8, 0xDD, 0x5B, 0x29, 0xB7, 0xA2, 0x7F,
++ 0x29, 0x72, 0x54, 0x37, 0xBE, 0x50, 0xD4, 0x24,
++ 0xAB, 0x60, 0xF4, 0x44, 0x97, 0x3B, 0x65, 0x21,
++ 0x73, 0x24, 0x1F, 0x93, 0x0E, 0x9E, 0x96, 0x88,
++ 0x78, 0x6C
++ }
++};
++
++/* SPIM-NAND header for SPI NAND with 2KB page + 64B spare */
++static const union spim_nand_boot_header spim_nand_hdr_2k_64_data = {
++ .data = {
++ 0x53, 0x50, 0x49, 0x4e, 0x41, 0x4e, 0x44, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
++ 0x00, 0x08, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
++ 0x40, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x20, 0x30,
++ 0x01, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
++ }
++};
++
++/* SPIM-NAND header for SPI NAND with 2KB page + 128B spare */
++static const union spim_nand_boot_header spim_nand_hdr_2k_128_data = {
++ .data = {
++ 0x53, 0x50, 0x49, 0x4e, 0x41, 0x4e, 0x44, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
++ 0x00, 0x08, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
++ 0x40, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x20, 0x30,
++ 0x01, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
++ }
++};
++
++/* SPIM-NAND header for SPI NAND with 4KB page + 256B spare */
++static const union spim_nand_boot_header spim_nand_hdr_4k_256_data = {
++ .data = {
++ 0x53, 0x50, 0x49, 0x4e, 0x41, 0x4e, 0x44, 0x21,
++ 0x01, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
++ 0x00, 0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
++ 0x40, 0x00, 0x0d, 0x00, 0x00, 0x00, 0x20, 0x30,
++ 0x01, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
++ }
++};
++
++struct nand_header_type {
+ const char *name;
+- const union nand_boot_header *data;
++ enum nand_boot_header_type type;
++ union {
++ const union nand_boot_header *ap;
++ const union hsm_nand_boot_header *hsm;
++ const union hsm20_nand_boot_header *hsm20;
++ const union spim_nand_boot_header *spim;
++ };
+ } nand_headers[] = {
+ {
+ .name = "2k+64",
+- .data = &snand_hdr_2k_64_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &snand_hdr_2k_64_data,
+ }, {
+ .name = "2k+120",
+- .data = &snand_hdr_2k_128_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &snand_hdr_2k_128_data,
+ }, {
+ .name = "2k+128",
+- .data = &snand_hdr_2k_128_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &snand_hdr_2k_128_data,
+ }, {
+ .name = "4k+256",
+- .data = &snand_hdr_4k_256_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &snand_hdr_4k_256_data,
+ }, {
+ .name = "1g:2k+64",
+- .data = &nand_hdr_1gb_2k_64_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &nand_hdr_1gb_2k_64_data,
+ }, {
+ .name = "2g:2k+64",
+- .data = &nand_hdr_2gb_2k_64_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &nand_hdr_2gb_2k_64_data,
+ }, {
+ .name = "4g:2k+64",
+- .data = &nand_hdr_4gb_2k_64_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &nand_hdr_4gb_2k_64_data,
+ }, {
+ .name = "2g:2k+128",
+- .data = &nand_hdr_2gb_2k_128_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &nand_hdr_2gb_2k_128_data,
+ }, {
+ .name = "4g:2k+128",
+- .data = &nand_hdr_4gb_2k_128_data
++ .type = NAND_BOOT_AP_HEADER,
++ .ap = &nand_hdr_4gb_2k_128_data,
++ }, {
++ .name = "hsm:2k+64",
++ .type = NAND_BOOT_HSM_HEADER,
++ .hsm = &hsm_nand_hdr_2k_64_data,
++ }, {
++ .name = "hsm:2k+128",
++ .type = NAND_BOOT_HSM_HEADER,
++ .hsm = &hsm_nand_hdr_2k_128_data,
++ }, {
++ .name = "hsm:4k+256",
++ .type = NAND_BOOT_HSM_HEADER,
++ .hsm = &hsm_nand_hdr_4k_256_data,
++ }, {
++ .name = "hsm20:2k+64",
++ .type = NAND_BOOT_HSM20_HEADER,
++ .hsm20 = &hsm20_nand_hdr_2k_64_data,
++ }, {
++ .name = "hsm20:2k+128",
++ .type = NAND_BOOT_HSM20_HEADER,
++ .hsm20 = &hsm20_nand_hdr_2k_128_data,
++ }, {
++ .name = "hsm20:4k+256",
++ .type = NAND_BOOT_HSM20_HEADER,
++ .hsm20 = &hsm20_nand_hdr_4k_256_data,
++ }, {
++ .name = "spim:2k+64",
++ .type = NAND_BOOT_SPIM_HEADER,
++ .spim = &spim_nand_hdr_2k_64_data,
++ }, {
++ .name = "spim:2k+128",
++ .type = NAND_BOOT_SPIM_HEADER,
++ .spim = &spim_nand_hdr_2k_128_data,
++ }, {
++ .name = "spim:4k+256",
++ .type = NAND_BOOT_SPIM_HEADER,
++ .spim = &spim_nand_hdr_4k_256_data,
+ }
+ };
+
+-const union nand_boot_header *mtk_nand_header_find(const char *name)
++const struct nand_header_type *mtk_nand_header_find(const char *name)
+ {
+ uint32_t i;
+
+ for (i = 0; i < ARRAY_SIZE(nand_headers); i++) {
+ if (!strcmp(nand_headers[i].name, name))
+- return nand_headers[i].data;
++ return &nand_headers[i];
+ }
+
+ return NULL;
+ }
+
+-uint32_t mtk_nand_header_size(const union nand_boot_header *hdr_nand)
++uint32_t mtk_nand_header_size(const struct nand_header_type *hdr_nand)
+ {
+- return 2 * le16_to_cpu(hdr_nand->pagesize);
++ switch (hdr_nand->type) {
++ case NAND_BOOT_HSM_HEADER:
++ return le32_to_cpu(hdr_nand->hsm->page_size);
++
++ case NAND_BOOT_HSM20_HEADER:
++ return le32_to_cpu(hdr_nand->hsm20->page_size);
++
++ case NAND_BOOT_SPIM_HEADER:
++ return le32_to_cpu(hdr_nand->spim->page_size);
++
++ default:
++ return 2 * le16_to_cpu(hdr_nand->ap->pagesize);
++ }
+ }
+
+ static int mtk_nand_header_ap_info(const void *ptr,
+@@ -251,14 +542,45 @@ static int mtk_nand_header_ap_info(const
+ info->page_size = le16_to_cpu(nh->pagesize);
+ info->spare_size = le16_to_cpu(nh->oobsize);
+ info->gfh_offset = 2 * info->page_size;
++ info->snfi = true;
+
+ return 0;
+ }
+
++static int mtk_nand_header_hsm_info(const void *ptr,
++ struct nand_header_info *info)
++{
++ union hsm_nand_boot_header *nh = (union hsm_nand_boot_header *)ptr;
++
++ info->page_size = le16_to_cpu(nh->page_size);
++ info->spare_size = le16_to_cpu(nh->spare_size);
++ info->gfh_offset = info->page_size;
++ info->snfi = true;
++
++ return 1;
++}
++
++static int mtk_nand_header_spim_info(const void *ptr,
++ struct nand_header_info *info)
++{
++ union spim_nand_boot_header *nh = (union spim_nand_boot_header *)ptr;
++
++ info->page_size = le16_to_cpu(nh->page_size);
++ info->spare_size = le16_to_cpu(nh->spare_size);
++ info->gfh_offset = info->page_size;
++ info->snfi = false;
++
++ return 1;
++}
++
+ int mtk_nand_header_info(const void *ptr, struct nand_header_info *info)
+ {
+ if (!strcmp((char *)ptr, NAND_BOOT_NAME))
+ return mtk_nand_header_ap_info(ptr, info);
++ else if (!strncmp((char *)ptr, HSM_NAND_BOOT_NAME, 8))
++ return mtk_nand_header_hsm_info(ptr, info);
++ else if (!strncmp((char *)ptr, SPIM_NAND_BOOT_NAME, 8))
++ return mtk_nand_header_spim_info(ptr, info);
+
+ return -1;
+ }
+@@ -273,14 +595,74 @@ bool is_mtk_nand_header(const void *ptr)
+ return false;
+ }
+
+-uint32_t mtk_nand_header_put(const union nand_boot_header *hdr_nand, void *ptr)
++static uint16_t crc16(const uint8_t *p, uint32_t len)
++{
++ uint16_t crc = 0x4f4e;
++ uint32_t i;
++
++ while (len--) {
++ crc ^= *p++ << 8;
++ for (i = 0; i < 8; i++)
++ crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
++ }
++
++ return crc;
++}
++
++static uint32_t mtk_nand_header_put_ap(const struct nand_header_type *hdr_nand,
++ void *ptr)
+ {
+- union nand_boot_header *nh = (union nand_boot_header *)ptr;
+ int i;
+
+ /* NAND device header, repeat 4 times */
+- for (i = 0; i < 4; i++)
+- memcpy(nh + i, hdr_nand, sizeof(union nand_boot_header));
++ for (i = 0; i < 4; i++) {
++ memcpy(ptr, hdr_nand->ap, sizeof(*hdr_nand->ap));
++ ptr += sizeof(*hdr_nand->ap);
++ }
++
++ return le16_to_cpu(hdr_nand->ap->pagesize);
++}
+
+- return le16_to_cpu(hdr_nand->pagesize);
++static uint32_t mtk_nand_header_put_hsm(const struct nand_header_type *hdr_nand,
++ void *ptr)
++{
++ memcpy(ptr, hdr_nand->hsm, sizeof(*hdr_nand->hsm));
++ return 0;
++}
++
++static uint32_t mtk_nand_header_put_hsm20(const struct nand_header_type *hdr_nand,
++ void *ptr)
++{
++ memcpy(ptr, hdr_nand->hsm20, sizeof(*hdr_nand->hsm20));
++ return 0;
++}
++
++static uint32_t mtk_nand_header_put_spim(const struct nand_header_type *hdr_nand,
++ void *ptr)
++{
++ uint16_t crc;
++
++ memcpy(ptr, hdr_nand->spim, sizeof(*hdr_nand->spim));
++
++ crc = crc16(ptr, 0x4e);
++ memcpy(ptr + 0x4e, &crc, sizeof(uint16_t));
++
++ return 0;
++}
++
++uint32_t mtk_nand_header_put(const struct nand_header_type *hdr_nand, void *ptr)
++{
++ switch (hdr_nand->type) {
++ case NAND_BOOT_HSM_HEADER:
++ return mtk_nand_header_put_hsm(hdr_nand, ptr);
++
++ case NAND_BOOT_HSM20_HEADER:
++ return mtk_nand_header_put_hsm20(hdr_nand, ptr);
++
++ case NAND_BOOT_SPIM_HEADER:
++ return mtk_nand_header_put_spim(hdr_nand, ptr);
++
++ default:
++ return mtk_nand_header_put_ap(hdr_nand, ptr);
++ }
+ }
+--- a/tools/mtk_nand_headers.h
++++ b/tools/mtk_nand_headers.h
+@@ -16,6 +16,7 @@ struct nand_header_info {
+ uint32_t page_size;
+ uint32_t spare_size;
+ uint32_t gfh_offset;
++ bool snfi;
+ };
+
+ /* AP BROM Header for NAND */
+@@ -39,15 +40,117 @@ union nand_boot_header {
+ uint8_t data[0x80];
+ };
+
++/* HSM BROM Header for NAND */
++union hsm_nand_boot_header {
++ struct {
++ char id[8];
++ uint32_t version; /* Header version */
++ uint32_t config; /* Header config */
++ uint32_t sector_size; /* ECC step size */
++ uint32_t fdm_size; /* User OOB size of a step */
++ uint32_t fdm_ecc_size; /* ECC parity size of a step */
++ uint32_t lbs;
++ uint32_t page_size; /* NAND page size */
++ uint32_t spare_size; /* NAND page spare size */
++ uint32_t page_per_block; /* Pages of one block */
++ uint32_t blocks; /* Total blocks of NAND chip */
++ uint32_t plane_sel_position; /* Plane bit position */
++ uint32_t pll; /* Value of pll reg */
++ uint32_t acccon; /* Value of access timing reg */
++ uint32_t strobe_sel; /* Value of DQS selection reg*/
++ uint32_t acccon1; /* Value of access timing reg */
++ uint32_t dqs_mux; /* Value of DQS mux reg */
++ uint32_t dqs_ctrl; /* Value of DQS control reg */
++ uint32_t delay_ctrl; /* Value of delay ctrl reg */
++ uint32_t latch_lat; /* Value of latch latency reg */
++ uint32_t sample_delay; /* Value of sample delay reg */
++ uint32_t driving; /* Value of driving reg */
++ uint32_t bl_start; /* Bootloader start addr */
++ uint32_t bl_end; /* Bootloader end addr */
++ uint8_t ecc_parity[42]; /* ECC parity of this header */
++ };
++
++ uint8_t data[0x8E];
++};
++
++/* HSM2.0 BROM Header for NAND */
++union hsm20_nand_boot_header {
++ struct {
++ char id[8];
++ uint32_t version; /* Header version */
++ uint32_t config; /* Header config */
++ uint32_t sector_size; /* ECC step size */
++ uint32_t fdm_size; /* User OOB size of a step */
++ uint32_t fdm_ecc_size; /* ECC parity size of a step */
++ uint32_t lbs;
++ uint32_t page_size; /* NAND page size */
++ uint32_t spare_size; /* NAND page spare size */
++ uint32_t page_per_block; /* Pages of one block */
++ uint32_t blocks; /* Total blocks of NAND chip */
++ uint32_t plane_sel_position; /* Plane bit position */
++ uint32_t pll; /* Value of pll reg */
++ uint32_t acccon; /* Value of access timing reg */
++ uint32_t strobe_sel; /* Value of DQS selection reg*/
++ uint32_t acccon1; /* Value of access timing reg */
++ uint32_t dqs_mux; /* Value of DQS mux reg */
++ uint32_t dqs_ctrl; /* Value of DQS control reg */
++ uint32_t delay_ctrl; /* Value of delay ctrl reg */
++ uint32_t latch_lat; /* Value of latch latency reg */
++ uint32_t sample_delay; /* Value of sample delay reg */
++ uint32_t driving; /* Value of driving reg */
++ uint32_t reserved;
++ uint32_t bl0_start; /* Bootloader start addr */
++ uint32_t bl0_end; /* Bootloader end addr */
++ uint32_t bl0_type; /* Bootloader type */
++ uint8_t bl_reserve[84];
++ uint8_t ecc_parity[42]; /* ECC parity of this header */
++ };
++
++ uint8_t data[0xEA];
++};
++
++/* SPIM BROM Header for SPI-NAND */
++union spim_nand_boot_header {
++ struct {
++ char id[8];
++ uint32_t version; /* Header version */
++ uint32_t config; /* Header config */
++ uint32_t page_size; /* NAND page size */
++ uint32_t spare_size; /* NAND page spare size */
++ uint16_t page_per_block; /* Pages of one block */
++ uint16_t plane_sel_position; /* Plane bit position */
++ uint16_t reserve_reg;
++ uint16_t reserve_val;
++ uint16_t ecc_error; /* ECC error reg addr */
++ uint16_t ecc_mask; /* ECC error bit mask */
++ uint32_t bl_start; /* Bootloader start addr */
++ uint32_t bl_end; /* Bootloader end addr */
++ uint8_t ecc_parity[32]; /* ECC parity of this header */
++ uint32_t integrity_crc; /* CRC of this header */
++ };
++
++ uint8_t data[0x50];
++};
++
++enum nand_boot_header_type {
++ NAND_BOOT_AP_HEADER,
++ NAND_BOOT_HSM_HEADER,
++ NAND_BOOT_HSM20_HEADER,
++ NAND_BOOT_SPIM_HEADER
++};
++
+ #define NAND_BOOT_NAME "BOOTLOADER!"
+ #define NAND_BOOT_VERSION "V006"
+ #define NAND_BOOT_ID "NFIINFO"
+
++#define HSM_NAND_BOOT_NAME "NANDCFG!"
++#define SPIM_NAND_BOOT_NAME "SPINAND!"
++
+ /* Find nand header data by name */
+-const union nand_boot_header *mtk_nand_header_find(const char *name);
++const struct nand_header_type *mtk_nand_header_find(const char *name);
+
+ /* Device header size using this nand header */
+-uint32_t mtk_nand_header_size(const union nand_boot_header *hdr_nand);
++uint32_t mtk_nand_header_size(const struct nand_header_type *hdr_nand);
+
+ /* Get nand info from nand header (page size, spare size, ...) */
+ int mtk_nand_header_info(const void *ptr, struct nand_header_info *info);
+@@ -56,6 +159,7 @@ int mtk_nand_header_info(const void *ptr
+ bool is_mtk_nand_header(const void *ptr);
+
+ /* Generate Device header using give nand header */
+-uint32_t mtk_nand_header_put(const union nand_boot_header *hdr_nand, void *ptr);
++uint32_t mtk_nand_header_put(const struct nand_header_type *hdr_nand,
++ void *ptr);
+
+ #endif /* _MTK_NAND_HEADERS_H */
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-30 22:07:42 +0000