diff options
Diffstat (limited to 'toolchain/gcc/patches')
3 files changed, 33 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch new file mode 100644 index 0000000000..4b7770d5d9 --- /dev/null +++ b/toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch @@ -0,0 +1,11 @@ +--- a/gcc/config/arm/arm.h ++++ b/gcc/config/arm/arm.h +@@ -232,7 +232,7 @@ extern void (*arm_lang_output_object_att + #define TARGET_BACKTRACE (leaf_function_p () \ + ? TARGET_TPCS_LEAF_FRAME \ + : TARGET_TPCS_FRAME) +-#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN) ++#define TARGET_LDRD (arm_arch6 && ARM_DOUBLEWORD_ALIGN) + #define TARGET_AAPCS_BASED \ + (arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS) + diff --git a/toolchain/gcc/patches/4.8-linaro/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches/4.8-linaro/800-arm_v5te_no_ldrd_strd.patch new file mode 100644 index 0000000000..ae4f6516ad --- /dev/null +++ b/toolchain/gcc/patches/4.8-linaro/800-arm_v5te_no_ldrd_strd.patch @@ -0,0 +1,11 @@ +--- a/gcc/config/arm/arm.h ++++ b/gcc/config/arm/arm.h +@@ -271,7 +271,7 @@ extern void (*arm_lang_output_object_att + /* Thumb-1 only. */ + #define TARGET_THUMB1_ONLY (TARGET_THUMB1 && !arm_arch_notm) + +-#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN \ ++#define TARGET_LDRD (arm_arch6 && ARM_DOUBLEWORD_ALIGN \ + && !TARGET_THUMB1) + + /* The following two macros concern the ability to execute coprocessor diff --git a/toolchain/gcc/patches/4.8.0/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches/4.8.0/800-arm_v5te_no_ldrd_strd.patch new file mode 100644 index 0000000000..ae4f6516ad --- /dev/null +++ b/toolchain/gcc/patches/4.8.0/800-arm_v5te_no_ldrd_strd.patch @@ -0,0 +1,11 @@ +--- a/gcc/config/arm/arm.h ++++ b/gcc/config/arm/arm.h +@@ -271,7 +271,7 @@ extern void (*arm_lang_output_object_att + /* Thumb-1 only. */ + #define TARGET_THUMB1_ONLY (TARGET_THUMB1 && !arm_arch_notm) + +-#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN \ ++#define TARGET_LDRD (arm_arch6 && ARM_DOUBLEWORD_ALIGN \ + && !TARGET_THUMB1) + + /* The following two macros concern the ability to execute coprocessor |