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-rw-r--r--toolchain/gcc/patches/4.3.5/946-avr32_fix_32bit_div_2.patch27
1 files changed, 27 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/4.3.5/946-avr32_fix_32bit_div_2.patch b/toolchain/gcc/patches/4.3.5/946-avr32_fix_32bit_div_2.patch
new file mode 100644
index 0000000000..4170219a6a
--- /dev/null
+++ b/toolchain/gcc/patches/4.3.5/946-avr32_fix_32bit_div_2.patch
@@ -0,0 +1,27 @@
+--- a/gcc/config/avr32/lib1funcs.S
++++ b/gcc/config/avr32/lib1funcs.S
+@@ -2271,7 +2271,7 @@ __avr32_f32_div:
+
+ tst r12, r12
+ moveq r9, 0
+- breq 12
++ breq 12f
+
+ /* Unpack op1*/
+ /* exp: r9 */
+@@ -2467,9 +2467,14 @@ __divsf_return_op1:
+ reteq 0 /* Return zero if number/inf*/
+ ret -1 /* Return NaN*/
+ 4:
+- /* Op2 is zero ? */
++ /* Op1 is zero ? */
+ tst r12,r12
+ reteq -1 /* 0.0/0.0 is NaN */
++ /* Op1 is Nan? */
++ lsr r9, r12, 24
++ breq 11f /*If number is subnormal*/
++ cp r9, 0xff
++ brhs 2b /* Check op1 for NaN or Inf */
+ /* Nonzero/0.0 is Inf. Sign bit will be shifted in before returning*/
+ mov_imm r12, 0xff000000
+ rjmp __divsf_return_op1