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-rw-r--r--target/linux/generic/backport-4.19/101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch46
1 files changed, 46 insertions, 0 deletions
diff --git a/target/linux/generic/backport-4.19/101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch b/target/linux/generic/backport-4.19/101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch
new file mode 100644
index 0000000000..2b3384391a
--- /dev/null
+++ b/target/linux/generic/backport-4.19/101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch
@@ -0,0 +1,46 @@
+From 4cc30de79d293f1e8c5f50ae3a9c005def9564a0 Mon Sep 17 00:00:00 2001
+From: Koen Vandeputte <koen.vandeputte@ncentric.com>
+Date: Mon, 7 Jan 2019 14:14:27 +0100
+Subject: [PATCH 2/2] arm: cns3xxx: use actual size reads for PCIe
+
+commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
+reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(),
+which preserved the property of only doing 32-bit reads.
+
+It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(),
+so it changed writes from always being 32 bits to being the actual size,
+which works just fine.
+
+Due to:
+- The documentation does not mention that only 32 bit access is allowed.
+- Writes are already executed using the actual size
+- Extensive testing shows that 8b, 16b and 32b reads work as intended
+
+It makes perfectly sense to also swap 32 bit reading in favor of actual size.
+
+Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
+Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
+Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
+CC: Arnd Bergmann <arnd@arndb.de>
+CC: Krzysztof Halasa <khalasa@piap.pl>
+CC: Olof Johansson <olof@lixom.net>
+CC: Robin Leblon <robin.leblon@ncentric.com>
+CC: Rob Herring <robh@kernel.org>
+CC: Russell King <linux@armlinux.org.uk>
+CC: Tim Harvey <tharvey@gateworks.com>
+CC: stable@vger.kernel.org # v4.0+
+---
+ arch/arm/mach-cns3xxx/pcie.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/mach-cns3xxx/pcie.c
++++ b/arch/arm/mach-cns3xxx/pcie.c
+@@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struc
+ u32 mask = (0x1ull << (size * 8)) - 1;
+ int shift = (where % 4) * 8;
+
+- ret = pci_generic_config_read32(bus, devfn, where, size, val);
++ ret = pci_generic_config_read(bus, devfn, where, size, val);
+
+ if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn &&
+ (where & 0xffc) == PCI_CLASS_REVISION)