diff options
Diffstat (limited to 'target')
9 files changed, 80 insertions, 52 deletions
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ARV4518PWR01.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/ARV4518PWR01.dtsi index 6d9f974bff..3998f1f13f 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/ARV4518PWR01.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/ARV4518PWR01.dtsi @@ -135,11 +135,6 @@ }; }; -&gpiomm { - status = "okay"; - lantiq,shadow = <0x0>; -}; - &gsw { phy-mode = "mii"; mtd-mac-address = <&boardconfig 0x16>; @@ -180,6 +175,16 @@ }; }; }; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + lantiq,shadow = <0x0>; + }; }; &pci0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ARV4519PW.dts b/target/linux/lantiq/files/arch/mips/boot/dts/ARV4519PW.dts index 8f50ee27e2..d7263eb104 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/ARV4519PW.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/ARV4519PW.dts @@ -132,11 +132,6 @@ }; }; -&gpiomm { - status = "okay"; - lantiq,shadow = <0x400>; -}; - &gsw { phy-mode = "mii"; mtd-mac-address = <&boardconfig 0x16>; @@ -176,6 +171,16 @@ }; }; }; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + lantiq,shadow = <0x400>; + }; }; &pci0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ARV4520PW.dts b/target/linux/lantiq/files/arch/mips/boot/dts/ARV4520PW.dts index ad5d65a1e6..275abdd0aa 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/ARV4520PW.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/ARV4520PW.dts @@ -155,11 +155,6 @@ }; }; -&gpiomm { - status = "okay"; - lantiq,shadow = <0x400>; -}; - &gsw { /* gpiomm 10 - switch */ phy-mode = "rmii"; @@ -201,6 +196,16 @@ }; }; }; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + lantiq,shadow = <0x400>; + }; }; &pci0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ARV452CQW.dts b/target/linux/lantiq/files/arch/mips/boot/dts/ARV452CQW.dts index 2dcf42ff62..64bde23383 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/ARV452CQW.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/ARV452CQW.dts @@ -171,11 +171,6 @@ }; }; -&gpiomm { - status = "okay"; - lantiq,shadow = <0x77f>; -}; - /* #define ARV452CPW_SWITCH_RESET 110 */ @@ -219,6 +214,16 @@ }; }; }; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + lantiq,shadow = <0x77f>; + }; }; &pci0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ARV7518PW.dts b/target/linux/lantiq/files/arch/mips/boot/dts/ARV7518PW.dts index b8ab0282e6..9459fe0072 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/ARV7518PW.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/ARV7518PW.dts @@ -159,11 +159,6 @@ }; }; -&gpiomm { - status = "okay"; - lantiq,shadow = <0x0>; -}; - /* #define SWITCH_RESET 13 */ @@ -206,6 +201,16 @@ }; }; }; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + lantiq,shadow = <0x0>; + }; }; &pci0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ARV752DPW.dts b/target/linux/lantiq/files/arch/mips/boot/dts/ARV752DPW.dts index c4ca4b4e1a..c66df234fb 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/ARV752DPW.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/ARV752DPW.dts @@ -166,11 +166,6 @@ }; }; -&gpiomm { - status = "okay"; - lantiq,shadow = <0x3>; -}; - &gsw { phy-mode = "rmii"; mtd-mac-address = <&boardconfig 0x16>; @@ -211,6 +206,16 @@ }; }; }; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + lantiq,shadow = <0x3>; + }; }; &pci0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ARV752DPW22.dts b/target/linux/lantiq/files/arch/mips/boot/dts/ARV752DPW22.dts index 8e1d5248b8..f809bcb19d 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/ARV752DPW22.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/ARV752DPW22.dts @@ -181,12 +181,6 @@ }; }; - -&gpiomm { - status = "okay"; - lantiq,shadow = <3>; -}; - &gsw { phy-mode = "mii"; mtd-mac-address = <&boardconfig 0x16>; @@ -227,6 +221,16 @@ }; }; }; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + lantiq,shadow = <3>; + }; }; &pci0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/GIGASX76X.dts b/target/linux/lantiq/files/arch/mips/boot/dts/GIGASX76X.dts index aeadb2fceb..794dc76a5d 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/GIGASX76X.dts +++ b/target/linux/lantiq/files/arch/mips/boot/dts/GIGASX76X.dts @@ -64,12 +64,6 @@ }; }; - -&gpiomm { - status = "okay"; - lantiq,shadow = <0x3>; -}; - &gpios { status = "okay"; }; @@ -105,6 +99,16 @@ }; }; }; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + lantiq,shadow = <0x3>; + }; }; &pci0 { diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi index e1d8a39335..cadfb80750 100644 --- a/target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi +++ b/target/linux/lantiq/files/arch/mips/boot/dts/danube.dtsi @@ -130,16 +130,6 @@ ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ 1 0 0x4000000 0x4000010>; /* addsel1 */ compatible = "lantiq,localbus", "simple-bus"; - - gpiomm: gpiomm@1 { - compatible = "lantiq,gpio-mm"; - reg = <1 0x0 0x10 >; - #address-cells = <1>; - #size-cells = <1>; - #gpio-cells = <2>; - gpio-controller; - status = "disabled"; - }; }; gptu@e100a00 { |