diff options
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch | 131 | ||||
| -rw-r--r-- | target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch | 7 |
2 files changed, 92 insertions, 46 deletions
diff --git a/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch index ca92d0ec87..888a7b699f 100644 --- a/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch +++ b/target/linux/ar71xx/patches-4.1/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch @@ -129,7 +129,7 @@ qca953x_clocks_init(); else if (soc_is_qca955x()) qca955x_clocks_init(); -+ else if (soc_is_qca956x()) ++ else if (soc_is_qca956x() || soc_is_tp9343()) + qca956x_clocks_init(); else BUG(); @@ -140,7 +140,7 @@ reg = QCA953X_RESET_REG_RESET_MODULE; else if (soc_is_qca955x()) reg = QCA955X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca956x()) ++ else if (soc_is_qca956x() || soc_is_tp9343()) + reg = QCA956X_RESET_REG_RESET_MODULE; else panic("Reset register not defined for this SOC"); @@ -149,20 +149,30 @@ reg = QCA953X_RESET_REG_RESET_MODULE; else if (soc_is_qca955x()) reg = QCA955X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca956x()) ++ else if (soc_is_qca956x() || soc_is_tp9343()) + reg = QCA956X_RESET_REG_RESET_MODULE; else panic("Reset register not defined for this SOC"); +@@ -133,6 +137,8 @@ u32 ath79_device_reset_get(u32 mask) + reg = AR933X_RESET_REG_RESET_MODULE; + else if (soc_is_ar934x()) + reg = AR934X_RESET_REG_RESET_MODULE; ++ else if (soc_is_qca956x() || soc_is_tp9343()) ++ reg = QCA956X_RESET_REG_RESET_MODULE; + else + BUG(); + --- a/arch/mips/ath79/dev-common.c +++ b/arch/mips/ath79/dev-common.c -@@ -94,7 +94,8 @@ void __init ath79_register_uart(void) +@@ -94,7 +94,9 @@ void __init ath79_register_uart(void) soc_is_ar913x() || soc_is_ar934x() || soc_is_qca953x() || - soc_is_qca955x()) { + soc_is_qca955x() || -+ soc_is_qca956x()) { ++ soc_is_qca956x() || ++ soc_is_tp9343()) { ath79_uart_data[0].uartclk = uart_clk_rate; platform_device_register(&ath79_uart_device); } else if (soc_is_ar933x()) { @@ -192,14 +202,14 @@ qca953x_usb_setup(); else if (soc_is_qca955x()) qca955x_usb_setup(); -+ else if (soc_is_qca9561()) ++ else if (soc_is_qca956x()) + qca956x_usb_setup(); else BUG(); } --- a/arch/mips/ath79/dev-wmac.c +++ b/arch/mips/ath79/dev-wmac.c -@@ -189,6 +189,24 @@ static void qca955x_wmac_setup(void) +@@ -189,6 +189,26 @@ static void qca955x_wmac_setup(void) ath79_wmac_data.is_clk_25mhz = true; } @@ -219,6 +229,8 @@ + ath79_wmac_data.is_clk_25mhz = false; + else + ath79_wmac_data.is_clk_25mhz = true; ++ ++ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; +} + static bool __init @@ -228,7 +240,7 @@ qca953x_wmac_setup(); else if (soc_is_qca955x()) qca955x_wmac_setup(); -+ else if (soc_is_qca956x()) ++ else if (soc_is_qca956x() || soc_is_tp9343()) + qca956x_wmac_setup(); else BUG(); @@ -240,27 +252,38 @@ case REV_ID_MAJOR_QCA9556: case REV_ID_MAJOR_QCA9558: + case REV_ID_MAJOR_TP9343: -+ case REV_ID_MAJOR_QCA9561: ++ case REV_ID_MAJOR_QCA956X: _prom_putchar = prom_putchar_ar71xx; break; --- a/arch/mips/ath79/gpio.c +++ b/arch/mips/ath79/gpio.c -@@ -148,7 +148,8 @@ static void __iomem *ath79_gpio_get_func +@@ -148,7 +148,10 @@ static void __iomem *ath79_gpio_get_func soc_is_ar913x() || soc_is_ar933x()) reg = AR71XX_GPIO_REG_FUNC; - else if (soc_is_ar934x() || soc_is_qca953x()) + else if (soc_is_ar934x() || -+ soc_is_qca953x() || soc_is_qca956x()) ++ soc_is_qca953x() || ++ soc_is_qca956x() || ++ soc_is_tp9343()) reg = AR934X_GPIO_REG_FUNC; else BUG(); -@@ -228,12 +229,15 @@ void __init ath79_gpio_init(void) +@@ -187,7 +190,7 @@ void __init ath79_gpio_output_select(uns + unsigned int reg; + u32 t, s; + +- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x()); ++ BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x()); + + if (gpio >= AR934X_GPIO_COUNT) + return; +@@ -228,12 +231,15 @@ void __init ath79_gpio_init(void) ath79_gpio_count = QCA953X_GPIO_COUNT; else if (soc_is_qca955x()) ath79_gpio_count = QCA955X_GPIO_COUNT; -+ else if (soc_is_qca956x()) ++ else if (soc_is_qca956x() || soc_is_tp9343()) + ath79_gpio_count = QCA956X_GPIO_COUNT; else BUG(); @@ -269,23 +292,24 @@ ath79_gpio_chip.ngpio = ath79_gpio_count; - if (soc_is_ar934x() || soc_is_qca953x() || soc_is_qca955x()) { + if (soc_is_ar934x() || soc_is_qca953x() || soc_is_qca955x() || -+ soc_is_qca956x()) { ++ soc_is_qca956x() || soc_is_tp9343()) { ath79_gpio_chip.direction_input = ar934x_gpio_direction_input; ath79_gpio_chip.direction_output = ar934x_gpio_direction_output; } --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c -@@ -107,7 +107,8 @@ static void __init ath79_misc_irq_init(v +@@ -107,7 +107,9 @@ static void __init ath79_misc_irq_init(v soc_is_ar933x() || soc_is_ar934x() || soc_is_qca953x() || - soc_is_qca955x()) + soc_is_qca955x() || -+ soc_is_qca956x()) ++ soc_is_qca956x() || ++ soc_is_tp9343()) ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; else BUG(); -@@ -268,6 +269,97 @@ static void qca955x_irq_init(void) +@@ -268,6 +270,97 @@ static void qca955x_irq_init(void) irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); } @@ -383,21 +407,21 @@ asmlinkage void plat_irq_dispatch(void) { unsigned long pending; -@@ -397,6 +489,9 @@ void __init arch_init_irq(void) +@@ -397,6 +490,9 @@ void __init arch_init_irq(void) } else if (soc_is_qca955x()) { ath79_ip2_handler = ath79_default_ip2_handler; ath79_ip3_handler = ath79_default_ip3_handler; -+ } else if (soc_is_qca956x()) { ++ } else if (soc_is_qca956x() || soc_is_tp9343()) { + ath79_ip2_handler = ath79_default_ip2_handler; + ath79_ip3_handler = ath79_default_ip3_handler; } else { BUG(); } -@@ -410,4 +505,6 @@ void __init arch_init_irq(void) +@@ -410,4 +506,6 @@ void __init arch_init_irq(void) qca953x_irq_init(); else if (soc_is_qca955x()) qca955x_irq_init(); -+ else if (soc_is_qca956x()) ++ else if (soc_is_qca956x() || soc_is_tp9343()) + qca956x_irq_init(); } --- a/arch/mips/ath79/pci.c @@ -428,7 +452,7 @@ } else if (soc_is_qca955x()) { ath79_pci_irq_map = qca955x_pci_irq_map; ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); -+ } else if (soc_is_qca9561()) { ++ } else if (soc_is_qca956x()) { + ath79_pci_irq_map = qca956x_pci_irq_map; + ath79_pci_nr_irqs = ARRAY_SIZE(qca956x_pci_irq_map); } else { @@ -438,7 +462,7 @@ QCA955X_PCI_MEM_SIZE, 1, ATH79_IP3_IRQ(2)); -+ } else if (soc_is_qca9561()) { ++ } else if (soc_is_qca956x()) { + pdev = ath79_register_pci_ar724x(0, + QCA956X_PCI_CFG_BASE1, + QCA956X_PCI_CTRL_BASE1, @@ -456,15 +480,15 @@ rev = id & QCA955X_REV_ID_REVISION_MASK; break; -+ case REV_ID_MAJOR_TP9343: -+ ath79_soc = ATH79_SOC_TP9343; -+ chip = "9343"; ++ case REV_ID_MAJOR_QCA956X: ++ ath79_soc = ATH79_SOC_QCA956X; ++ chip = "956X"; + rev = id & QCA956X_REV_ID_REVISION_MASK; + break; + -+ case REV_ID_MAJOR_QCA9561: -+ ath79_soc = ATH79_SOC_QCA9561; -+ chip = "9561"; ++ case REV_ID_MAJOR_TP9343: ++ ath79_soc = ATH79_SOC_TP9343; ++ chip = "9343"; + rev = id & QCA956X_REV_ID_REVISION_MASK; + break; + @@ -476,7 +500,7 @@ ath79_soc_rev = rev; - if (soc_is_qca953x() || soc_is_qca955x()) -+ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca9561()) ++ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca956x()) sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", chip, ver, rev); + else if (soc_is_tp9343()) @@ -511,7 +535,21 @@ #define AR9300_OTP_BASE 0x14000 #define AR9300_OTP_STATUS 0x15f18 #define AR9300_OTP_STATUS_TYPE 0x7 -@@ -375,6 +392,49 @@ +@@ -152,6 +169,13 @@ + #define AR9300_OTP_READ_DATA 0x15f1c + + /* ++ * Hidden Registers ++ */ ++#define QCA956X_DAM_RESET_OFFSET 0xb90001bc ++#define QCA956X_DAM_RESET_SIZE 0x4 ++#define QCA956X_INLINE_CHKSUM_ENG BIT(27) ++ ++/* + * DDR_CTRL block + */ + #define AR71XX_DDR_REG_PCI_WIN0 0x7c +@@ -375,6 +399,49 @@ #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) @@ -561,7 +599,7 @@ /* * USB_CONFIG block */ -@@ -422,6 +482,11 @@ +@@ -422,6 +489,11 @@ #define QCA955X_RESET_REG_BOOTSTRAP 0xb0 #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac @@ -573,7 +611,7 @@ #define MISC_INT_ETHSW BIT(12) #define MISC_INT_TIMER4 BIT(10) #define MISC_INT_TIMER3 BIT(9) -@@ -596,6 +661,8 @@ +@@ -596,6 +668,8 @@ #define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) @@ -582,7 +620,7 @@ #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) -@@ -663,6 +730,37 @@ +@@ -663,6 +737,37 @@ QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \ QCA955X_EXT_INT_PCIE_RC2_INT3) @@ -620,16 +658,16 @@ #define REV_ID_MAJOR_MASK 0xfff0 #define REV_ID_MAJOR_AR71XX 0x00a0 #define REV_ID_MAJOR_AR913X 0x00b0 -@@ -678,6 +776,8 @@ +@@ -678,6 +783,8 @@ #define REV_ID_MAJOR_QCA9533_V2 0x0160 #define REV_ID_MAJOR_QCA9556 0x0130 #define REV_ID_MAJOR_QCA9558 0x1130 +#define REV_ID_MAJOR_TP9343 0x0150 -+#define REV_ID_MAJOR_QCA9561 0x1150 ++#define REV_ID_MAJOR_QCA956X 0x1150 #define AR71XX_REV_ID_MINOR_MASK 0x3 #define AR71XX_REV_ID_MINOR_AR7130 0x0 -@@ -702,6 +802,8 @@ +@@ -702,6 +809,8 @@ #define QCA955X_REV_ID_REVISION_MASK 0xf @@ -638,7 +676,7 @@ /* * SPI block */ -@@ -766,6 +868,19 @@ +@@ -766,6 +875,19 @@ #define QCA953X_GPIO_OUT_MUX_LED_LINK4 44 #define QCA953X_GPIO_OUT_MUX_LED_LINK5 45 @@ -658,7 +696,7 @@ #define AR71XX_GPIO_COUNT 16 #define AR7240_GPIO_COUNT 18 #define AR7241_GPIO_COUNT 20 -@@ -774,6 +889,7 @@ +@@ -774,6 +896,7 @@ #define AR934X_GPIO_COUNT 23 #define QCA953X_GPIO_COUNT 18 #define QCA955X_GPIO_COUNT 24 @@ -673,11 +711,11 @@ ATH79_SOC_QCA9556, ATH79_SOC_QCA9558, + ATH79_SOC_TP9343, -+ ATH79_SOC_QCA9561, ++ ATH79_SOC_QCA956X, }; extern enum ath79_soc_type ath79_soc; -@@ -126,6 +128,21 @@ static inline int soc_is_qca955x(void) +@@ -126,6 +128,26 @@ static inline int soc_is_qca955x(void) return soc_is_qca9556() || soc_is_qca9558(); } @@ -685,15 +723,20 @@ +{ + return ath79_soc == ATH79_SOC_TP9343; +} -+ ++ +static inline int soc_is_qca9561(void) +{ -+ return ath79_soc == ATH79_SOC_QCA9561; ++ return ath79_soc == ATH79_SOC_QCA956X; ++} ++ ++static inline int soc_is_qca9563(void) ++{ ++ return ath79_soc == ATH79_SOC_QCA956X; +} + +static inline int soc_is_qca956x(void) +{ -+ return soc_is_tp9343() || soc_is_qca9561(); ++ return soc_is_qca9561() || soc_is_qca9563(); +} + extern void __iomem *ath79_ddr_base; diff --git a/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch index 23425dca65..e60cd44bb4 100644 --- a/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch +++ b/target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch @@ -1,6 +1,6 @@ --- a/arch/mips/ath79/gpio.c +++ b/arch/mips/ath79/gpio.c -@@ -221,15 +221,27 @@ void __init ath79_gpio_output_select(uns +@@ -221,15 +221,30 @@ void __init ath79_gpio_output_select(uns { void __iomem *base = ath79_gpio_base; unsigned long flags; @@ -9,7 +9,7 @@ + unsigned long gpio_count; u32 t, s; -- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x()); +- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x()); + if (soc_is_ar934x()) { + gpio_count = AR934X_GPIO_COUNT; + reg_base = AR934X_GPIO_REG_OUT_FUNC0; @@ -19,6 +19,9 @@ + } else if (soc_is_qca955x()) { + gpio_count = QCA955X_GPIO_COUNT; + reg_base = QCA955X_GPIO_REG_OUT_FUNC0; ++ } else if (soc_is_qca956x()) { ++ gpio_count = QCA956X_GPIO_COUNT; ++ reg_base = QCA956X_GPIO_REG_OUT_FUNC0; + } else { + BUG(); + } |