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-rw-r--r--target/linux/sunxi/patches-4.9/0019-arm64-allwinner-a64-Add-MMC-nodes.patch69
1 files changed, 0 insertions, 69 deletions
diff --git a/target/linux/sunxi/patches-4.9/0019-arm64-allwinner-a64-Add-MMC-nodes.patch b/target/linux/sunxi/patches-4.9/0019-arm64-allwinner-a64-Add-MMC-nodes.patch
deleted file mode 100644
index 1f91e9bead..0000000000
--- a/target/linux/sunxi/patches-4.9/0019-arm64-allwinner-a64-Add-MMC-nodes.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From f3dff3478a8a7b09f9a92023955a151584658893 Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Thu, 6 Oct 2016 02:25:22 +0100
-Subject: arm64: allwinner: a64: Add MMC nodes
-
-The A64 has 3 MMC controllers, one of them being especially targeted to
-eMMC. Among other things, it has a data strobe signal and a 8 bits data
-width.
-
-The two other are more usual controllers that will have a 4 bits width at
-most and no data strobe signal, which limits it to more usual SD or MMC
-peripherals.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 39 +++++++++++++++++++++++++++
- 1 file changed, 39 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -121,6 +121,45 @@
- #size-cells = <1>;
- ranges;
-
-+ mmc0: mmc@1c0f000 {
-+ compatible = "allwinner,sun50i-a64-mmc";
-+ reg = <0x01c0f000 0x1000>;
-+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
-+ clock-names = "ahb", "mmc";
-+ resets = <&ccu RST_BUS_MMC0>;
-+ reset-names = "ahb";
-+ interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+
-+ mmc1: mmc@1c10000 {
-+ compatible = "allwinner,sun50i-a64-mmc";
-+ reg = <0x01c10000 0x1000>;
-+ clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
-+ clock-names = "ahb", "mmc";
-+ resets = <&ccu RST_BUS_MMC1>;
-+ reset-names = "ahb";
-+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+
-+ mmc2: mmc@1c11000 {
-+ compatible = "allwinner,sun50i-a64-emmc";
-+ reg = <0x01c11000 0x1000>;
-+ clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
-+ clock-names = "ahb", "mmc";
-+ resets = <&ccu RST_BUS_MMC2>;
-+ reset-names = "ahb";
-+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+
- usb_otg: usb@01c19000 {
- compatible = "allwinner,sun8i-a33-musb";
- reg = <0x01c19000 0x0400>;