diff options
Diffstat (limited to 'target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch')
| -rw-r--r-- | target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch | 134 |
1 files changed, 134 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch b/target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch new file mode 100644 index 0000000000..1719b682b3 --- /dev/null +++ b/target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch @@ -0,0 +1,134 @@ +From f98121f3ef3d36f4d040b11ab38f15387f6eefa2 Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann <arnd@arndb.de> +Date: Wed, 30 Nov 2016 15:08:55 +0100 +Subject: arm64: dts: fix build errors from missing dependencies + +Two branches were incorrectly sent without having the necessary +header file changes. Rather than back those out now, I'm replacing +the symbolic names for the clks and resets with the numeric +values to get 'make allmodconfig dtbs' back to work. + +After the header file changes are merged, we can revert this +patch. + +Fixes: 6bc37fa ("arm64: dts: add Allwinner A64 SoC .dtsi") +Fixes: 50784e6 ("dts: arm64: db820c: add pmic pins specific dts file") +Acked-by: Andre Przywara <andre.przywara@arm.com> +Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> +Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> +Signed-off-by: Arnd Bergmann <arnd@arndb.de> +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 36 ++++++++++------------ + .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi | 2 +- + 2 files changed, 18 insertions(+), 20 deletions(-) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -42,10 +42,8 @@ + * OTHER DEALINGS IN THE SOFTWARE. + */ + +-#include <dt-bindings/clock/sun50i-a64-ccu.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/pinctrl/sun4i-a10.h> +-#include <dt-bindings/reset/sun50i-a64-ccu.h> + + / { + interrupt-parent = <&gic>; +@@ -137,7 +135,7 @@ + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; +- clocks = <&ccu CLK_BUS_PIO>; ++ clocks = <&ccu 58>; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; +@@ -160,8 +158,8 @@ + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART0>; +- resets = <&ccu RST_BUS_UART0>; ++ clocks = <&ccu 67>; ++ resets = <&ccu 46>; + status = "disabled"; + }; + +@@ -171,8 +169,8 @@ + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART1>; +- resets = <&ccu RST_BUS_UART1>; ++ clocks = <&ccu 68>; ++ resets = <&ccu 47>; + status = "disabled"; + }; + +@@ -182,8 +180,8 @@ + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART2>; +- resets = <&ccu RST_BUS_UART2>; ++ clocks = <&ccu 69>; ++ resets = <&ccu 48>; + status = "disabled"; + }; + +@@ -193,8 +191,8 @@ + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART3>; +- resets = <&ccu RST_BUS_UART3>; ++ clocks = <&ccu 70>; ++ resets = <&ccu 49>; + status = "disabled"; + }; + +@@ -204,8 +202,8 @@ + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + reg-shift = <2>; + reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART4>; +- resets = <&ccu RST_BUS_UART4>; ++ clocks = <&ccu 71>; ++ resets = <&ccu 50>; + status = "disabled"; + }; + +@@ -213,8 +211,8 @@ + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2ac00 0x400>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; +- clocks = <&ccu CLK_BUS_I2C0>; +- resets = <&ccu RST_BUS_I2C0>; ++ clocks = <&ccu 63>; ++ resets = <&ccu 42>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; +@@ -224,8 +222,8 @@ + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b000 0x400>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; +- clocks = <&ccu CLK_BUS_I2C1>; +- resets = <&ccu RST_BUS_I2C1>; ++ clocks = <&ccu 64>; ++ resets = <&ccu 43>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; +@@ -235,8 +233,8 @@ + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b400 0x400>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; +- clocks = <&ccu CLK_BUS_I2C2>; +- resets = <&ccu RST_BUS_I2C2>; ++ clocks = <&ccu 65>; ++ resets = <&ccu 44>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; |